Linux/AM4378: RTC time is getting reset when system reboot

Arockia winiston

Expert 2035 points

Part Number: AM4378

Tool/software: Linux

Dear,

We designed a board broadly based on AM4378-gp-evm and we use SDK4.02.

My problem is, RTC TIME got reset when i reboot the system.

I followed "RTC timer functionality but no RTC-only mode" from the below link. But when i disconnect "PMIC_POWER_EN" . i am not getting any PMIC output voltage. so i connected "PMIC_POWER_EN" (AM4378 side) to PMIC IC.

I set fseal bit in the PMIC ic. Now i am able to get DCDC-5 , DCDC-6 and PGOOD_BU even in power off condition also.

I set time as given below

date 100816452018 (date MMDDhhmmyyyy)

hwclock -w (for writing date)

hwclock -r (for reading time)

If i set time, it got set properly. But when i reset the system, i has gone to the old value.

How do i keep the time after reset the system?

Regards,

Winiston.P

over 5 years ago

0 Biser Gatchev-XID over 5 years ago

TI__Guru**** 393215 points

Please follow this checklist: processors.wiki.ti.com/.../AM437x_Schematic_Checklist specifically the "RTC-only mode" column.

0 Arockia winiston over 5 years ago in reply to Biser Gatchev-XID

Expert 2035 points

Dear Biser,

I set my board as per the " RTC-only mode" which you have sent. But problem remain same. Time is getting reset after reboot the board. But now i am not getting DCDC-5 , DCDC-6 and PGOOD_BU voltages after power off.

But "RTC timer functionality But no RTC only " mode, i got DCDC-5 , DCDC-6 and PGOOD_BU voltages after power off.

I checked texas am437x-gp-evm board also. Same problem persist there also.

How do i solve my RTC issue?

Regards,
Winiston.P

0 Biser Gatchev-XID over 5 years ago in reply to Arockia winiston

TI__Guru**** 393215 points

Can you post the PMIC and processor power supplies part of the schematic, as well as connections between them?

0 Arockia winiston over 5 years ago in reply to Biser Gatchev-XID

Expert 2035 points

Dear Biser,

Please find attached schematic. I set fseal=1 . I tried to give wakeup0 = ground and tried to give wakeup0 = VDDS_RTC. but problem remain same.

If i disconnected "PMIC_PWR_EN",I am not getting any PMIC output voltages. so i connected "PMIC_PWR_EN"and checked.

I followed " RTC timer functionality but no RTC only mode" and i tried "RTC only mode" also. But problem remain same.

Regards,

Winiston.P

0 Arockia winiston over 5 years ago in reply to Biser Gatchev-XID

Expert 2035 points

Dear Biser,

I am waiting for your reply.

Regards,
Winiston.P

0 Biser Gatchev-XID over 5 years ago in reply to Arockia winiston

TI__Guru**** 393215 points

I have asked the PMIC experts to look at this. They will post their comments here.

0 Ahmad_Rashed over 5 years ago in reply to Arockia winiston

TI__Genius 13567 points

Winiston,
I do not see a problem with the schematics. It appears that you verified DCDC5 and DCDC6 remain on so that is good. Can you also make sure the RTC_PORz is never toggled? My troubleshooting suggestion is to double check if RTC_PORz is ever toggled as this will reset the RTC domain.

An engineer from the software team will need to comment on whether it's possible the OS is sending a reset to the RTC domain at boot up causing the time to erase. Would your product have internet access? A work around would be to pull the time via NTP at boot and save it to the RTC.

Regards,
Ahmad

0 Arockia winiston over 5 years ago in reply to Ahmad_Rashed

Expert 2035 points

Dear Ahmad,

I have checked RTC_PORz when i reset the board.It is never toggled and always gives 1.8V even in power off condition also.

Out product does not have internet access. So i can not pull the time via NTP.

My dts file has following entries related to RTC.

/* fixed 32k external oscillator clock */
clk_32k_rtc: clk_32k_rtc {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <32768>;
};

&rtc {
clocks = <&clk_32k_rtc>, <&clk_32768_ck>;
clock-names = "ext-clk", "int-clk";
status = "okay";
};

Does the above code sufficient to Enable RTC and keep the time?

Note : I am getting 32.768 Khz clock all the time even in power off condition also.

Please find attached my dts file.

2620.am437x-gp-evm.txt

/*
* Author: Rajat Rao
* Company: Futura Automation
* Product: SBC_AM4378 v1.1
*/

/* This file was auto-generated by TI PinMux on ‎22‎-‎07‎-‎2016 at ‎15‎:‎43‎:‎54. */
/* This file should only be used as a reference.  Some pins/peripherals, */
/* depending on your use case, may need additional configuration. */

/* Some or all the pins from the following groups are not used by device tree 
   myrtc1
   usb_otg
   usb_host
   myadc1
   ram
*/

/dts-v1/;

#include "am4372.dtsi"
#include <dt-bindings/pinctrl/am43xx.h>
#include <dt-bindings/pwm/pwm.h>
#include <dt-bindings/gpio/gpio.h>

/ {
	model = "TI AM437x GP EVM";
	compatible = "ti,am437x-gp-evm","ti,am4372","ti,am43";

	aliases {
		display0 = &lcd0;
		serial3 = &uart3;
		/*newly added */
		serial1 = &uart1;
		serial2 = &uart2;
		serial4 = &uart4;
		serial5 = &uart5;
	};

	evm_v3_3d: fixedregulator-v3_3d {
		compatible = "regulator-fixed";
		regulator-name = "evm_v3_3d";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		enable-active-high;
	};

	vtt_fixed: fixedregulator-vtt {
		compatible = "regulator-fixed";
		regulator-name = "vtt_fixed";
		regulator-min-microvolt = <1500000>;
		regulator-max-microvolt = <1500000>;
		regulator-always-on;
		regulator-boot-on;
		enable-active-high;
		gpio = <&gpio2 1 GPIO_ACTIVE_HIGH>;
	};

	vmmcwl_fixed: fixedregulator-mmcwl {
		compatible = "regulator-fixed";
		regulator-name = "vmmcwl_fixed";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		startup-delay-us = <70000>;
		/* WLAN_EN GPIO for this board - A8, Bank1, pin29 */
		gpio = <&gpio1 29 GPIO_ACTIVE_HIGH>;  
		enable-active-high;
		
	};

	lcd_bl: backlight {
		compatible = "pwm-backlight";
		pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>;
		brightness-levels = <0 51 53 56 62 75 101 152 255>;
		default-brightness-level = <8>;
	};
	
	lcd0: display {
		compatible = "panel-dpi";
		label = "lcd";		
/*panel timing for 1024x768 display */
      /*
		panel-timing {
			clock-frequency = <65000000>;
			hactive = <1024>;
			vactive = <768>;
			hfront-porch = <24>;
			hback-porch = <160>;
			hsync-len = <136>;
			vback-porch = <29>;
			vfront-porch = <3>;
			vsync-len = <6>;
			hsync-active = <0>;
			vsync-active = <0>;
			de-active = <1>;
			pixelclk-active = <1>;
		};
		*/
		
  /*panel timing for 1920x1200 (dual pixel/channel lvds) display(LM240WU8) */
		/*
		panel-timing {
			clock-frequency = <77000000>;
			hactive = <1920>;
			vactive = <1200>;
			hfront-porch = <48>;
			hback-porch = <80>;
			hsync-len = <32>;
			vback-porch = <26>;
			vfront-porch = <3>;
			vsync-len = <6>;
			hsync-active = <0>;
			vsync-active = <0>;
			de-active = <1>;
			pixelclk-active = <1>;
		};
		*/

	/*panel timing for 800x600 display */
        
		panel-timing {
			clock-frequency = <40000000>;
			hactive = <800>;
			vactive = <600>;
			hfront-porch = <40>;
			hback-porch = <88>;
			hsync-len = <128>;
			vback-porch = <23>;
			vfront-porch = <1>;
			vsync-len = <4>;
			hsync-active = <0>;
			vsync-active = <0>;
			de-active = <1>;
			pixelclk-active = <1>;
		};
		
		
		port {
			lcd_in: endpoint {
				remote-endpoint = <&dpi_out>;
			};
		};
	};

	/* fixed 12MHz oscillator */
	refclk: oscillator {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-frequency = <12000000>;
	};

	/* fixed 32k external oscillator clock */
	clk_32k_rtc: clk_32k_rtc {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-frequency = <32768>;
	};


	sound0: sound@0 {
		compatible = "simple-audio-card";
		simple-audio-card,name = "AM437x-GP-EVM";
		simple-audio-card,widgets =
			"Headphone", "Headphone Jack",
			"Microphone", "Microphone Jack",
			"Speaker", "External Speaker";
		simple-audio-card,routing =
			"Headphone Jack",	"HPLOUT",
			"Headphone Jack",	"HPROUT",
			"MIC3L",		"Microphone Jack",
			"MIC3R",		"Microphone Jack",
			"External Speaker",	"MONO_LOUT";
		simple-audio-card,format = "dsp_b";
		simple-audio-card,bitclock-master = <&sound0_master>;
		simple-audio-card,frame-master = <&sound0_master>;
		simple-audio-card,bitclock-inversion;

		simple-audio-card,cpu {
			sound-dai = <&mcasp1>;
			system-clock-frequency = <12000000>;
		};

		sound0_master: simple-audio-card,codec {
			sound-dai = <&tlv320aic3106>;
			system-clock-frequency = <12000000>;
		};
	};

	audio_mstrclk: mclk_osc {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <12000000>;
	};

};

&am43xx_pinmux {
	pinctrl-names = "default", "sleep";
	/* pinctrl-0 = <&wlan_irq_pins_default &ddr3_vtt_toggle_default &debugss_pins>;  */
	pinctrl-0 = <&wlan_irq_pins_default &ddr3_vtt_toggle_default>;
	pinctrl-1 = <&wlan_irq_pins_sleep>; 
	ddr3_vtt_toggle_default: ddr_vtt_toggle_default {
		pinctrl-single,pins = <
			0x8C (DS0_PULL_UP_DOWN_EN | PIN_OUTPUT_PULLUP | DS0_FORCE_OFF_MODE | MUX_MODE7) /* (A12) gpmc_clk.gpio2[1] */
		>;
	};
	
	i2c0_pins: i2c0_pins {
		pinctrl-single,pins = <
			0x18c (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)  /* (Y22) i2c0_scl.i2c0_scl */
			0x188 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)  /* (AB24) i2c0_sda.i2c0_sda */
			
		>;
	};
	
	i2c1_pins_default: i2c1_pins_default {
		pinctrl-single,pins = <
			0x240 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE1) /* (G20) gpio5_10.I2C1_SCL */
			0x248 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE1) /* (E25) gpio5_12.I2C1_SDA */
		>;
	};
	
	sd_card_pins_default: sd_card_pins_default {
		pinctrl-single,pins = <
			0x100 (PIN_INPUT_PULLUP | MUX_MODE0 ) /* (D1) mmc0_clk.mmc0_clk */
			0x104 (PIN_INPUT_PULLUP | MUX_MODE0 ) /* (D2) mmc0_cmd.mmc0_cmd */
			0xfc (PIN_INPUT_PULLUP | MUX_MODE0 ) /* (C1) mmc0_dat0.mmc0_dat0 */
			0xf8 (PIN_INPUT_PULLUP | MUX_MODE0 ) /* (C2) mmc0_dat1.mmc0_dat1 */
			0xf4 (PIN_INPUT_PULLUP | MUX_MODE0 ) /* (B2) mmc0_dat2.mmc0_dat2 */
			0xf0 (PIN_INPUT_PULLUP | MUX_MODE0 ) /* (B1) mmc0_dat3.mmc0_dat3 */
			0x160 (PIN_INPUT_PULLUP | MUX_MODE5 ) /* (R25) spi0_cs1.mmc0_sdcd */
		>;
	};
	
	/* Optional sleep pin settings. Must manually enter values in 	the below skeleton. */
	sd_card_pins_sleep: sd_card_pins_sleep {
		pinctrl-single,pins = <
			0x100 (PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (D1) mmc0_clk.mmc0_clk */
			0x104 (PIN_INPUT | PULL_DISABLE | MUX_MODE7 ) /* (D2) mmc0_cmd.mmc0_cmd */
			0xfc (PIN_INPUT | PULL_DISABLE | MUX_MODE7 ) /* (C1) mmc0_dat0.mmc0_dat0 */
			0xf8 (PIN_INPUT | PULL_DISABLE | MUX_MODE7 ) /* (C2) mmc0_dat1.mmc0_dat1 */
			0xf4 (PIN_INPUT | PULL_DISABLE | MUX_MODE7 ) /* (B2) mmc0_dat2.mmc0_dat2 */
			0xf0 (PIN_INPUT | PULL_DISABLE | MUX_MODE7 ) /* (B1) mmc0_dat3.mmc0_dat3 */
			0x160 (PIN_INPUT | PULL_DISABLE | MUX_MODE7 ) /* (R25) spi0_cs1.mmc0_sdcd */
		>;
	};
	
	emmc_pins_default: emmc_pins_default {
		pinctrl-single,pins = <
			0x80 (PIN_INPUT_PULLUP | MUX_MODE2 ) /* (B9) gpmc_csn1.mmc1_clk */
			0x84 (PIN_INPUT_PULLUP | MUX_MODE2 ) /* (F10) gpmc_csn2.mmc1_cmd */
			0x20 (PIN_INPUT_PULLUP | MUX_MODE2 ) /* (B10) gpmc_ad8.mmc1_dat0 */
			0x24 (PIN_INPUT_PULLUP | MUX_MODE2 ) /* (A10) gpmc_ad9.mmc1_dat1 */
			0x28 (PIN_INPUT_PULLUP | MUX_MODE2 ) /* (F11) gpmc_ad10.mmc1_dat2 */
			0x2c (PIN_INPUT_PULLUP | MUX_MODE2 ) /* (D11) gpmc_ad11.mmc1_dat3 */
			0x30 (PIN_INPUT_PULLUP | MUX_MODE2 ) /* (E11) gpmc_ad12.mmc1_dat4 */
			0x34 (PIN_INPUT_PULLUP | MUX_MODE2 ) /* (C11) gpmc_ad13.mmc1_dat5 */
			0x38 (PIN_INPUT_PULLUP | MUX_MODE2 ) /* (B11) gpmc_ad14.mmc1_dat6 */
			0x3c (PIN_INPUT_PULLUP | MUX_MODE2 ) /* (A11) gpmc_ad15.mmc1_dat7 */
		>;
	};

	/* Optional sleep pin settings. Must manually enter values in 	the below skeleton. */
	emmc_pins_sleep: emmc_pins_sleep {
		pinctrl-single,pins = <
			0x80 (PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (B9) gpmc_csn1.mmc1_clk */
			0x84 (PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (F10) gpmc_csn2.mmc1_cmd */
			0x20 (PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (B10) gpmc_ad8.mmc1_dat0 */
			0x24 (PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (A10) gpmc_ad9.mmc1_dat1 */
			0x28 (PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (F11) gpmc_ad10.mmc1_dat2 */
			0x2c (PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (D11) gpmc_ad11.mmc1_dat3 */
			0x30 (PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (E11) gpmc_ad12.mmc1_dat4 */
			0x34 (PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (C11) gpmc_ad13.mmc1_dat5 */
			0x38 (PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (B11) gpmc_ad14.mmc1_dat6 */
			0x3c (PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (A11) gpmc_ad15.mmc1_dat7 */
		>;
	};

	ecap0_pins_default: backlight_pins_default {
		pinctrl-single,pins = <
			0x164 ( PIN_INPUT | MUX_MODE0 )       /* (G24) eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */
		>;
	};

	ecap0_pins_sleep: backlight_pins_sleep {
		pinctrl-single,pins = <
			0x164 (PIN_INPUT_PULLDOWN | MUX_MODE7)
		>;
	};
	
	cpsw_default: cpsw_default {
		pinctrl-single,pins = <
			0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE2 ) /* (C3) gpmc_a0.rgmii2_tctl */
			0x44 (PIN_INPUT_PULLDOWN | MUX_MODE2 ) /* (C5) gpmc_a1.rgmii2_rctl */
			0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE2 ) /* (E8) gpmc_a6.rgmii2_tclk */
			0x5c (PIN_INPUT_PULLDOWN | MUX_MODE2 ) /* (F6) gpmc_a7.rgmii2_rclk */
			0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE2 ) /* (E7) gpmc_a5.rgmii2_td0 */
			0x50 (PIN_OUTPUT_PULLDOWN | MUX_MODE2 ) /* (D7) gpmc_a4.rgmii2_td1 */
			0x4c (PIN_OUTPUT_PULLDOWN | MUX_MODE2 ) /* (A4) gpmc_a3.rgmii2_td2 */
			0x48 (PIN_OUTPUT_PULLDOWN | MUX_MODE2 ) /* (C6) gpmc_a2.rgmii2_td3 */
			0x6c (PIN_INPUT_PULLDOWN | MUX_MODE2 ) /* (D8) gpmc_a11.rgmii2_rd0 */
			0x68 (PIN_INPUT_PULLDOWN | MUX_MODE2 ) /* (G8) gpmc_a10.rgmii2_rd1 */
			0x64 (PIN_INPUT_PULLDOWN | MUX_MODE2 ) /* (B4) gpmc_a9.rgmii2_rd2 */
			0x60 (PIN_INPUT_PULLDOWN | MUX_MODE2 ) /* (F7) gpmc_a8.rgmii2_rd3 */	
		>;
	};

	/* Optional sleep pin settings. Must manually enter values in 	the below skeleton. */
	cpsw_sleep: cpsw_sleep {
		pinctrl-single,pins = <
			0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (C3) gpmc_a0.rgmii2_tctl */
			0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (C5) gpmc_a1.rgmii2_rctl */
			0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (E8) gpmc_a6.rgmii2_tclk */
			0x5c (PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (F6) gpmc_a7.rgmii2_rclk */
			0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (E7) gpmc_a5.rgmii2_td0 */
			0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (D7) gpmc_a4.rgmii2_td1 */
			0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (A4) gpmc_a3.rgmii2_td2 */
			0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (C6) gpmc_a2.rgmii2_td3 */
			0x6c (PIN_INPUT | PULL_DISABLE | MUX_MODE7 ) /* (D8) gpmc_a11.rgmii2_rd0 */
			0x68 (PIN_INPUT | PULL_DISABLE | MUX_MODE7 ) /* (G8) gpmc_a10.rgmii2_rd1 */
			0x64 (PIN_INPUT | PULL_DISABLE | MUX_MODE7 ) /* (B4) gpmc_a9.rgmii2_rd2 */
			0x60 (PIN_INPUT | PULL_DISABLE | MUX_MODE7 ) /* (F7) gpmc_a8.rgmii2_rd3 */
			
		>;
	};
	
		cpsw_default1: cpsw_default1 {
		pinctrl-single,pins = <	
		0x114 ( PIN_OUTPUT_PULLDOWN | MUX_MODE2 ) /* (A13) mii1_tx_en.rgmii1_tctl */
		0x118 ( PIN_INPUT_PULLDOWN | MUX_MODE2 ) /* (A15) mii1_rx_dv.rgmii1_rctl */
		0x12c ( PIN_OUTPUT_PULLDOWN | MUX_MODE2 ) /* (D14) mii1_tx_clk.rgmii1_tclk */
		0x130 ( PIN_INPUT_PULLDOWN | MUX_MODE2 ) /* (D13) mii1_rx_clk.rgmii1_rclk */
		0x128 ( PIN_OUTPUT_PULLDOWN | MUX_MODE2 ) /* (B15) mii1_txd0.rgmii1_td0 */
		0x124 ( PIN_OUTPUT_PULLDOWN | MUX_MODE2 ) /* (A14) mii1_txd1.rgmii1_td1 */
		0x120 ( PIN_OUTPUT_PULLDOWN | MUX_MODE2 ) /* (C13) mii1_txd2.rgmii1_td2 */
		0x11c ( PIN_OUTPUT_PULLDOWN | MUX_MODE2 ) /* (C16) mii1_txd3.rgmii1_td3 */
		0x140 ( PIN_INPUT_PULLDOWN | MUX_MODE2 ) /* (F17) mii1_rxd0.rgmii1_rd0 */
		0x13c ( PIN_INPUT_PULLDOWN | MUX_MODE2 ) /* (B16) mii1_rxd1.rgmii1_rd1 */
		0x138 ( PIN_INPUT_PULLDOWN | MUX_MODE2 ) /* (E16) mii1_rxd2.rgmii1_rd2 */
		0x134 ( PIN_INPUT_PULLDOWN | MUX_MODE2 ) /* (C14) mii1_rxd3.rgmii1_rd3 */
			
		>;
	};
		/* Optional sleep pin settings. Must manually enter values in 	the below skeleton. */
	cpsw_sleep1: cpsw_sleep1 {
		pinctrl-single,pins = <
		0x114 (PIN_INPUT_PULLDOWN  ) /* (A13) mii1_tx_en.rgmii1_tctl */
		0x118 (PIN_INPUT_PULLDOWN  ) /* (A15) mii1_rx_dv.rgmii1_rctl */
		0x12c (PIN_INPUT_PULLDOWN  ) /* (D14) mii1_tx_clk.rgmii1_tclk */
		0x130 (PIN_INPUT_PULLDOWN  ) /* (D13) mii1_rx_clk.rgmii1_rclk */
		0x128 (PIN_INPUT_PULLDOWN  ) /* (B15) mii1_txd0.rgmii1_td0 */
		0x124 (PIN_INPUT_PULLDOWN  ) /* (A14) mii1_txd1.rgmii1_td1 */
		0x120 (PIN_INPUT_PULLDOWN  ) /* (C13) mii1_txd2.rgmii1_td2 */
		0x11c (PIN_INPUT_PULLDOWN  ) /* (C16) mii1_txd3.rgmii1_td3 */
		0x140 (PIN_INPUT | PULL_DISABLE  ) /* (F17) mii1_rxd0.rgmii1_rd0 */
		0x13c (PIN_INPUT | PULL_DISABLE  ) /* (B16) mii1_rxd1.rgmii1_rd1 */
		0x138 (PIN_INPUT | PULL_DISABLE  ) /* (E16) mii1_rxd2.rgmii1_rd2 */
		0x134 (PIN_INPUT | PULL_DISABLE  ) /* (C14) mii1_rxd3.rgmii1_rd3 */	
		>;
	};
	
		
	davinci_mdio_default: davinci_mdio_default {
		pinctrl-single,pins = <
			0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)	/* (A17) mdio_data.mdio_data */
			0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0)			/* (B17) mdio_clk.mdio_clk */
		>;
	};

	/* Optional sleep pin settings. Must manually enter values in 	the below skeleton. */
	davinci_mdio_sleep: davinci_mdio_sleep {
		pinctrl-single,pins = <
			0x148 (PIN_INPUT | PULL_DISABLE | MUX_MODE7 ) /* (A17) mdio_data.mdio_data */
			0x14c (PIN_INPUT | PULL_DISABLE | MUX_MODE7 ) /* (B17) mdio_clk.mdio_clk */
			
		>;
	};

wlan_irq_pins_default: wlan_irq_pins_default {
	pinctrl-single,pins = <
		0x7c ( PIN_INPUT | WAKEUP_ENABLE | MUX_MODE7 ) /* (A8) gpmc_csn0.gpio1[29] */
		
	>;
};
/* Optional sleep pin settings. Must manually enter values in the below skeleton. */
wlan_irq_pins_sleep: wlan_irq_pins_sleep {
	pinctrl-single,pins = <
		0x7c ( PIN_INPUT | WAKEUP_ENABLE | MUX_MODE7 ) /* (A8) gpmc_csn0.gpio1[29] */
	>;
};
	
	dss_pinctrl_default: dss_pinctrl_default {
		pinctrl-single,pins = <
			0xe0 (PIN_OUTPUT_PULLUP | MUX_MODE0 ) /* (B23) dss_vsync.dss_vsync */
			0xe4 (PIN_OUTPUT_PULLUP | MUX_MODE0 ) /* (A23) dss_hsync.dss_hsync */
			0xe8 (PIN_OUTPUT_PULLUP | MUX_MODE0 ) /* (A22) dss_pclk.dss_pclk */
			0xec (PIN_OUTPUT_PULLUP | MUX_MODE0 ) /* (A24) dss_ac_bias_en.dss_ac_bias_en */
			0xa0 (PIN_OUTPUT_PULLUP | MUX_MODE0 ) /* (B22) dss_data0.dss_data0 */
			0xa4 (PIN_OUTPUT_PULLUP | MUX_MODE0 ) /* (A21) dss_data1.dss_data1 */
			0xa8 (PIN_OUTPUT_PULLUP | MUX_MODE0 ) /* (B21) dss_data2.dss_data2 */
			0xac (PIN_OUTPUT_PULLUP | MUX_MODE0 ) /* (C21) dss_data3.dss_data3 */
			0xb0 (PIN_OUTPUT_PULLUP | MUX_MODE0 ) /* (A20) dss_data4.dss_data4 */
			0xb4 (PIN_OUTPUT_PULLUP | MUX_MODE0 ) /* (B20) dss_data5.dss_data5 */
			0xb8 (PIN_OUTPUT_PULLUP | MUX_MODE0 ) /* (C20) dss_data6.dss_data6 */
			0xbc (PIN_OUTPUT_PULLUP | MUX_MODE0 ) /* (E19) dss_data7.dss_data7 */
			0xc0 (PIN_OUTPUT_PULLUP | MUX_MODE0 ) /* (A19) dss_data8.dss_data8 */
			0xc4 (PIN_OUTPUT_PULLUP | MUX_MODE0 ) /* (B19) dss_data9.dss_data9 */
			0xc8 (PIN_OUTPUT_PULLUP | MUX_MODE0 ) /* (A18) dss_data10.dss_data10 */
			0xcc (PIN_OUTPUT_PULLUP | MUX_MODE0 ) /* (B18) dss_data11.dss_data11 */
			0xd0 (PIN_OUTPUT_PULLUP | MUX_MODE0 ) /* (C19) dss_data12.dss_data12 */
			0xd4 (PIN_OUTPUT_PULLUP | MUX_MODE0 ) /* (D19) dss_data13.dss_data13 */
			0xd8 (PIN_OUTPUT_PULLUP | MUX_MODE0 ) /* (C17) dss_data14.dss_data14 */
			0xdc (PIN_OUTPUT_PULLUP | MUX_MODE0 ) /* (D17) dss_data15.dss_data15 */
			0x1cc (PIN_OUTPUT_PULLUP | MUX_MODE2 ) /* (AC24) cam1_data9.dss_data16 */
			0x1c8 (PIN_OUTPUT_PULLUP | MUX_MODE2 ) /* (AA19) cam0_data9.dss_data17 */
			0x1c4 (PIN_OUTPUT_PULLUP | MUX_MODE2 ) /* (AB19) cam0_data8.dss_data18 */
			0x1c0 (PIN_OUTPUT_PULLUP | MUX_MODE2 ) /* (AC20) cam0_pclk.dss_data19 */
			0x1bc (PIN_OUTPUT_PULLUP | MUX_MODE2 ) /* (AD17) cam0_wen.dss_data20 */
			0x1b8 (PIN_OUTPUT_PULLUP | MUX_MODE2 ) /* (AC18) cam0_field.dss_data21 */
			0x1b4 (PIN_OUTPUT_PULLUP | MUX_MODE2 ) /* (AD18) cam0_vd.dss_data22 */
			0x1b0 (PIN_OUTPUT_PULLUP | MUX_MODE2 ) /* (AE17) cam0_hd.dss_data23 */
		>;
	};

	/* Optional sleep pin settings. Must manually enter values in 	the below skeleton. */
	dss_pinctrl_sleep: dss_pinctrl_sleep {
		pinctrl-single,pins = <
			0xe0 (DS0_PULL_UP_DOWN_EN | PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (B23) dss_vsync.dss_vsync */
			0xe4 (DS0_PULL_UP_DOWN_EN | PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (A23) dss_hsync.dss_hsync */
			0xe8 (DS0_PULL_UP_DOWN_EN | PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (A22) dss_pclk.dss_pclk */
			0xec (DS0_PULL_UP_DOWN_EN | PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (A24) dss_ac_bias_en.dss_ac_bias_en */
			0xa0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | PULL_DISABLE | MUX_MODE7 ) /* (B22) dss_data0.dss_data0 */
			0xa4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | PULL_DISABLE | MUX_MODE7 ) /* (A21) dss_data1.dss_data1 */
			0xa8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | PULL_DISABLE | MUX_MODE7 ) /* (B21) dss_data2.dss_data2 */
			0xac (DS0_PULL_UP_DOWN_EN | INPUT_EN | PULL_DISABLE | MUX_MODE7 ) /* (C21) dss_data3.dss_data3 */
			0xb0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | PULL_DISABLE | MUX_MODE7 ) /* (A20) dss_data4.dss_data4 */
			0xb4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | PULL_DISABLE | MUX_MODE7 ) /* (B20) dss_data5.dss_data5 */
			0xb8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | PULL_DISABLE | MUX_MODE7 ) /* (C20) dss_data6.dss_data6 */
			0xbc (DS0_PULL_UP_DOWN_EN | PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (E19) dss_data7.dss_data7 */
			0xc0 (DS0_PULL_UP_DOWN_EN | PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (A19) dss_data8.dss_data8 */
			0xc4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | PULL_DISABLE | MUX_MODE7 ) /* (B19) dss_data9.dss_data9 */
			0xc8 (DS0_PULL_UP_DOWN_EN | PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (A18) dss_data10.dss_data10 */
			0xcc (DS0_PULL_UP_DOWN_EN | PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (B18) dss_data11.dss_data11 */
			0xd0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | PULL_DISABLE | MUX_MODE7 ) /* (C19) dss_data12.dss_data12 */
			0xd4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | PULL_DISABLE | MUX_MODE7 ) /* (D19) dss_data13.dss_data13 */
			0xd8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | PULL_DISABLE | MUX_MODE7 ) /* (C17) dss_data14.dss_data14 */
			0xdc (DS0_PULL_UP_DOWN_EN | PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (D17) dss_data15.dss_data15 */
			0x1cc (DS0_PULL_UP_DOWN_EN | PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (AC24) cam1_data9.dss_data16 */
			0x1c8 (DS0_PULL_UP_DOWN_EN | PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (AA19) cam0_data9.dss_data17 */
			0x1c4 (DS0_PULL_UP_DOWN_EN | PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (AB19) cam0_data8.dss_data18 */
			0x1c0 (DS0_PULL_UP_DOWN_EN | PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (AC20) cam0_pclk.dss_data19 */
			0x1bc (DS0_PULL_UP_DOWN_EN | PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (AD17) cam0_wen.dss_data20 */
			0x1b8 (DS0_PULL_UP_DOWN_EN | PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (AC18) cam0_field.dss_data21 */
			0x1b4 (DS0_PULL_UP_DOWN_EN | PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (AD18) cam0_vd.dss_data22 */
			0x1b0 (DS0_PULL_UP_DOWN_EN | PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (AE17) cam0_hd.dss_data23 */
		>;
	};
	
	dcan0_pins_default: dcan0_pins_default {
		pinctrl-single,pins = <
			0x17c ( PIN_INPUT_PULLUP | MUX_MODE2 ) /* (L22) uart1_rtsn.dcan0_rx */
			0x178 ( PIN_OUTPUT | MUX_MODE2 ) /* (K22) uart1_ctsn.dcan0_tx */
		>;
	};

	/* Optional sleep pin settings. Must manually enter values in 	the below skeleton. */
	dcan0_pins_sleep: dcan0_pins_sleep {
		pinctrl-single,pins = <
			0x17c (PIN_INPUT_PULLUP | MUX_MODE7 ) /* (L22) uart1_rtsn.dcan0_rx */
			0x178 (PIN_INPUT_PULLUP | MUX_MODE7 ) /* (K22) uart1_ctsn.dcan0_tx */
		>;
	};

	dcan1_pins_default: dcan1_pins_default {
		pinctrl-single,pins = <
			0x16c ( PIN_INPUT_PULLUP | MUX_MODE2 ) /* (J25) uart0_rtsn.dcan1_rx */
			0x168 ( PIN_OUTPUT | MUX_MODE2 ) /* (L25) uart0_ctsn.dcan1_tx */
		>;
	};

	/* Optional sleep pin settings. Must manually enter values in 	the below skeleton. */
	dcan1_pins_sleep: dcan1_pins_sleep {
		pinctrl-single,pins = <
			0x16c (PIN_INPUT_PULLUP | MUX_MODE7 ) /* (J25) uart0_rtsn.dcan1_rx */
			0x168 (PIN_INPUT_PULLUP | MUX_MODE7 ) /* (L25) uart0_ctsn.dcan1_tx */
		>;
	};
	
	cam1_pins_default: cam1_pins_default {
		pinctrl-single,pins = <
			0x1dc ( PIN_INPUT | MUX_MODE0 ) /* (AE21) cam1_pclk.cam1_pclk */
			0x1e8 ( PIN_INPUT | MUX_MODE0 ) /* (AB20) cam1_data0.cam1_data0 */
			0x1ec ( PIN_INPUT | MUX_MODE0 ) /* (AC21) cam1_data1.cam1_data1 */
			0x1f0 ( PIN_INPUT | MUX_MODE0 ) /* (AD21) cam1_data2.cam1_data2 */
			0x1f4 ( PIN_INPUT | MUX_MODE0 ) /* (AE22) cam1_data3.cam1_data3 */
			0x1f8 ( PIN_INPUT | MUX_MODE0 ) /* (AD22) cam1_data4.cam1_data4 */
			0x1fc ( PIN_INPUT | MUX_MODE0 ) /* (AE23) cam1_data5.cam1_data5 */
			0x200 ( PIN_INPUT | MUX_MODE0 ) /* (AD23) cam1_data6.cam1_data6 */
			0x204 ( PIN_INPUT | MUX_MODE0 ) /* (AE24) cam1_data7.cam1_data7 */
		>;
	};

	/* Optional sleep pin settings. Must manually enter values in 	the below skeleton. */
	cam1_pins_sleep: cam1_pins_sleep {
		pinctrl-single,pins = <
			0x1dc (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7 ) /* (AE21) cam1_pclk.cam1_pclk */
			0x1e8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7 ) /* (AB20) cam1_data0.cam1_data0 */
			0x1ec (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7 ) /* (AC21) cam1_data1.cam1_data1 */
			0x1f0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7 ) /* (AD21) cam1_data2.cam1_data2 */
			0x1f4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7 ) /* (AE22) cam1_data3.cam1_data3 */
			0x1f8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7 ) /* (AD22) cam1_data4.cam1_data4 */
			0x1fc (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7 ) /* (AE23) cam1_data5.cam1_data5 */
			0x200 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7 ) /* (AD23) cam1_data6.cam1_data6 */
			0x204 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7 ) /* (AE24) cam1_data7.cam1_data7 */
			>;
	};
	
	mcasp1_pins: mcasp1_pins {
		pinctrl-single,pins = <
			0x10c ( PIN_INPUT_PULLDOWN | MUX_MODE4 ) /* (B14) mii1_crs.mcasp1_aclkx */
			0x110 ( PIN_INPUT_PULLDOWN | MUX_MODE4 ) /* (B13) mii1_rx_er.mcasp1_fsx */
			0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE3 ) /* (B15) mii1_txd0.mcasp1_axr2 */
			0x144 ( PIN_INPUT_PULLDOWN | MUX_MODE4 ) /* (A16) rmii1_ref_clk.mcasp1_axr3 */
		>;
	};
	
	/* Optional sleep pin settings. Must manually enter values in 	the below skeleton. */
	mcasp1_sleep_pins: mcasp1_sleep_pins {
		pinctrl-single,pins = <
			0x10c (PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (B14) mii1_crs.mcasp1_aclkx */
			0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (B13) mii1_rx_er.mcasp1_fsx */
			0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (B15) mii1_txd0.mcasp1_axr2 */
			0x144 (PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (A16) rmii1_ref_clk.mcasp1_axr3 */
		>;
	};
	
	uart0_pins_default: uart0_pins_default {
		pinctrl-single,pins = <
			0x170 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0 ) /* (K25) uart0_rxd.uart0_rxd */
			0x174 (PIN_OUTPUT_PULLUP | PULL_DISABLE | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0 ) /* (J24) uart0_txd.uart0_txd */
		>;
	};

	/* Optional sleep pin settings. Must manually enter values in 	the below skeleton. */
	uart0_pins_sleep: uart0_pins_sleep {
		pinctrl-single,pins = <
			0x170 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0 ) /* (K25) uart0_rxd.uart0_rxd */
			0x174 (PIN_INPUT_PULLDOWN | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0 ) /* (J24) uart0_txd.uart0_txd */
		>;
	};
	
	/*
	mmc2_pins_default: mmc2_pins_default {
		pinctrl-single,pins = <
			0x13c (PIN_INPUT_PULLUP | MUX_MODE6 ) // (B16) mii1_rxd1.mmc2_clk 
			0x114 (PIN_INPUT_PULLUP | MUX_MODE6 ) // (A13) mii1_tx_en.mmc2_cmd 
			0x118 (PIN_INPUT_PULLUP | MUX_MODE5 ) // (A15) mii1_rx_dv.mmc2_dat0 
			0x11c (PIN_INPUT_PULLUP | MUX_MODE5 ) // (C16) mii1_txd3.mmc2_dat1 
			0x120 (PIN_INPUT_PULLUP | MUX_MODE5 ) // (C13) mii1_txd2.mmc2_dat2 
			0x108 (PIN_INPUT_PULLUP | MUX_MODE5 ) // (D16) mii1_col.mmc2_dat3 
		>;
	};
    */
	/* Optional sleep pin settings. Must manually enter values in 	the below skeleton. */
	
	/*
	mmc2_pins_sleep: mmc2_pins_sleep {
		pinctrl-single,pins = <
			0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7 )  //(B16) mii1_rxd1.mmc2_clk 
			0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7 )  //(A13) mii1_tx_en.mmc2_cmd 
			0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7 ) //(A15) mii1_rx_dv.mmc2_dat0 
			0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7 ) // (C16) mii1_txd3.mmc2_dat1 
			0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7 ) // (C13) mii1_txd2.mmc2_dat2 
			0x108 (PIN_INPUT_PULLDOWN | MUX_MODE7 ) // (D16) mii1_col.mmc2_dat3 
		>;
	};
	*/
	uart3_pins: uart3_pins {
		pinctrl-single,pins = <
			0x228 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0 )		/* uart3_rxd.uart3_rxd */
			0x22c (PIN_INPUT_PULLDOWN | SLEWCTRL_FAST | MUX_MODE0) /* uart3_txd.uart3_txd */
			0x230 (PIN_INPUT_PULLUP | MUX_MODE0)	/* uart3_ctsn.uart3_ctsn */
			0x234 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* uart3_rtsn.uart3_rtsn */
		>;
	};
	
	debugss_pins: pinmux_debugss_pins {
		pinctrl-single,pins = <
			0x290 ( PIN_INPUT | MUX_MODE0 ) /* (Y24) TMS.TMS */
			0x294 ( PIN_INPUT | MUX_MODE0 ) /* (Y20) TDI.TDI */
			0x298 ( PIN_OUTPUT | MUX_MODE0 ) /* (AA24) TDO.TDO */
			0x29c ( PIN_INPUT | MUX_MODE0 ) /* (AA25) TCK.TCK */
			0x2a0 ( PIN_INPUT | MUX_MODE0 ) /* (Y25) nTRST.nTRST */
		>;
	};
	
	usb_host1_pins_default: usb_host1_pins_default {
	pinctrl-single,pins = <
			0x2c0 (DS0_PULL_UP_DOWN_EN | PIN_INPUT_PULLDOWN | MUX_MODE0 ) /* (G21) USB0_DRVVBUS.USB0_DRVVBUS */
		>;
	};

	/* Optional sleep pin settings. Must manually enter values in 	the below skeleton. */
	usb_host1_pins_sleep: usb_host1_pins_sleep {
		pinctrl-single,pins = <
			0x2c0 (DS0_PULL_UP_DOWN_EN | PIN_INPUT_PULLDOWN ) /* (G21) USB0_DRVVBUS.USB0_DRVVBUS */
		>;
	};

	usb_host2_pins_default: usb_host2_pins_default {
		pinctrl-single,pins = <
			0x2c4 (DS0_PULL_UP_DOWN_EN | PIN_INPUT_PULLDOWN | MUX_MODE0 ) /* (F25) USB1_DRVVBUS.USB1_DRVVBUS */
		>;
	};

	/* Optional sleep pin settings. Must manually enter values in 	the below skeleton. */
	usb_host2_pins_sleep: usb_host2_pins_sleep {
		pinctrl-single,pins = <
			0x2c4 (DS0_PULL_UP_DOWN_EN | PIN_INPUT_PULLDOWN ) /* (F25) USB1_DRVVBUS.USB1_DRVVBUS */
		>;
	};
	
	spi_pins_default: spi_pins_default {
		pinctrl-single,pins = <
			0x190 ( PIN_INPUT | MUX_MODE3 ) /* (N24) mcasp0_aclkx.spi1_sclk */
			0x194 ( PIN_INPUT | MUX_MODE3 ) /* (N22) mcasp0_fsx.spi1_d0 */
			0x198 ( PIN_INPUT | MUX_MODE3 ) /* (H23) mcasp0_axr0.spi1_d1 */
			0x19c ( PIN_OUTPUT | MUX_MODE3 ) /* (M24) mcasp0_ahclkr.spi1_cs0 */
		>;
	};

	gpio2_pins_default: gpio2_pins_default {
		pinctrl-single,pins = <
			0x88 ( PIN_OUTPUT_PULLUP | MUX_MODE7 ) /* (B12) gpmc_csn3.gpio2[0] */
			0x8c ( PIN_OUTPUT_PULLUP | MUX_MODE7 ) /* (A12) gpmc_clk.gpio2[1] */
			0x90 ( PIN_INPUT_PULLUP | MUX_MODE7 ) /* (A9) gpmc_advn_ale.gpio2[2] */
			//0x94 ( PIN_OUTPUT_PULLUP | MUX_MODE7 ) /* (E10) gpmc_oen_ren.gpio2[3] *//* USB OTG Config */
		>;
	};

	gpio1_pins_default: gpio1_pins_default {
		pinctrl-single,pins = <
			//0x0 ( PIN_INPUT | MUX_MODE7 ) /* (B5) gpmc_ad0.gpio1[0] *//* Connected to power controlling uC */
			//0x4 ( PIN_INPUT | MUX_MODE7 ) /* (A5) gpmc_ad1.gpio1[1] *//* Connected to power controlling uC */
			0xc ( PIN_INPUT_PULLUP | MUX_MODE7 ) /* (A6) gpmc_ad3.gpio1[3] */
			0x14 ( PIN_INPUT_PULLUP | MUX_MODE7 ) /* (A7) gpmc_ad5.gpio1[5] */
			0x78 ( PIN_OUTPUT_PULLUP | MUX_MODE7 ) /* (A3) gpmc_be1n.gpio1[28] */
		>;
	};

	gpio0_pins_default: gpio0_pins_default {
		pinctrl-single,pins = <
			0x1a8 ( PIN_INPUT_PULLUP | MUX_MODE9 ) /* (M25) mcasp0_axr1.gpio0[2] */
			0x1ac ( PIN_INPUT_PULLUP | MUX_MODE9 ) /* (L24) mcasp0_ahclkx.gpio0[3] */
			0x158 ( PIN_INPUT_PULLUP | MUX_MODE7 ) /* (T21) spi0_d1.gpio0[4] */
			0x15c ( PIN_INPUT_PULLUP | MUX_MODE7 ) /* (T20) spi0_cs0.gpio0[5] */
			0x1a0 ( PIN_INPUT_PULLUP | MUX_MODE9 ) /* (L23) mcasp0_aclkr.gpio0[18] */
			
			0x268 ( PIN_INPUT_PULLUP | MUX_MODE9 ) /* (P20) spi2_d1.gpio0[21] */
			0x278 ( PIN_OUTPUT_PULLUP | MUX_MODE7 ) /* (H20) clkreq.gpio0[24]   8th iso gp out pin*/
		>;
	};

	
	gpio4_pins_default: gpio4_pins_default {
		pinctrl-single,pins = <
			0x210 ( PIN_OUTPUT_PULLUP | MUX_MODE7 ) /* (Y18) cam0_data2.gpio4[24] */
			0x214 ( PIN_OUTPUT_PULLUP | MUX_MODE7 ) /* (AA18) cam0_data3.gpio4[25] */
			0x218 ( PIN_OUTPUT_PULLUP | MUX_MODE7 ) /* (AE19) cam0_data4.gpio4[26] */
			0x21c ( PIN_OUTPUT_PULLUP | MUX_MODE7 ) /* (AD19) cam0_data5.gpio4[27] */
			0x220 ( PIN_OUTPUT_PULLUP | MUX_MODE7 ) /* (AE20) cam0_data6.gpio4[28] */
			0x224 ( PIN_OUTPUT_PULLUP | MUX_MODE7 ) /* (AD20) cam0_data7.gpio4[29] */
			/*extra 2 digital input entry for adding 8 gpi */      
			0x1d0 ( PIN_INPUT_PULLUP | MUX_MODE7 ) /* (AD24) cam1_data8.gpio4[8] */
			0x1e0 ( PIN_INPUT_PULLUP | MUX_MODE7 ) /* (AC25) cam1_field.gpio4[12] */
		>;
	};

	gpio3_pins_default: gpio3_pins_default {
		pinctrl-single,pins = <
			0x260 ( PIN_INPUT_PULLUP | MUX_MODE7 ) /* (N20) spi2_sclk.gpio3[24] */
			/*extra 3 digital input entry for adding 8 gpi */
			0x2a4 ( PIN_INPUT_PULLUP | MUX_MODE7 ) /* (N23) EMU0.gpio3[7] */
			0x2a8 ( PIN_INPUT_PULLUP | MUX_MODE7 ) /* (T24) EMU1.gpio3[8] */
			0x26c ( PIN_INPUT_PULLUP | MUX_MODE7 ) /* (T23) spi2_cs0.gpio3[25] */
			0x1a4 ( PIN_INPUT_PULLUP | MUX_MODE7 ) /* (K23) mcasp0_fsr.gpio3[19] */
			0x264 ( PIN_INPUT_PULLUP | MUX_MODE7 ) /* (P22) spi2_d0.gpio3[22] */
		>;
	};


	gpio5_pins_default: gpio5_pins_default {
		pinctrl-single,pins = <
		    0x250 ( PIN_OUTPUT_PULLUP | MUX_MODE7 ) /* (P25) spi4_sclk.gpio5[4] */
			0x254 ( PIN_OUTPUT_PULLUP | MUX_MODE7 ) /* (R24) spi4_d0.gpio5[5] */
			0x258 ( PIN_OUTPUT_PULLUP | MUX_MODE7 ) /* (P24) spi4_d1.gpio5[6] */
			0x25c ( PIN_OUTPUT_PULLUP | MUX_MODE7 ) /* (N25) spi4_cs0.gpio5[7] */
			0x238 ( PIN_OUTPUT_PULLUP | MUX_MODE7 ) /* (D25) gpio5_8.gpio5[8] */
			0x23c ( PIN_OUTPUT_PULLUP | MUX_MODE7 ) /* (F24) gpio5_9.gpio5[9] */
			0x244 ( PIN_OUTPUT_PULLUP | MUX_MODE7 ) /* (F23) gpio5_11.gpio5[11] */
		>;
	};
	
	rtc1_pins_default: rtc1_pins_default {
	pinctrl-single,pins = <
			0x2b4 ( PIN_INPUT_PULLUP | MUX_MODE0 ) 
			0x2b8 ( PIN_INPUT_PULLUP | MUX_MODE0 ) 
			0x2bc ( PIN_OUTPUT_PULLUP | MUX_MODE0 ) 
		>;
	};

	glue1_pins_default: glue1_pins_default {
		pinctrl-single,pins = <
			0x27c ( PIN_INPUT_PULLUP | MUX_MODE0 ) /* (G22) WARMRSTn.nRESETIN_OUT */
			0x280 ( PIN_INPUT_PULLUP | MUX_MODE0 ) /* (Y23) PWRONRSTn.porz */
		>;
	};

	osc1_pins_default: osc1_pins_default {
		pinctrl-single,pins = <
			0x288 ( PIN_INPUT | MUX_MODE0 ) /* (C25) XTALIN.OSC0_IN */
			0x28c ( PIN_OUTPUT | MUX_MODE0 ) /* (B25) XTALOUT.OSC0_OUT */
		>;
	};

	osc2_pins_default: osc2_pins_default {
		pinctrl-single,pins = <
			0x2ac ( PIN_INPUT | MUX_MODE0 ) 
			0x2b0 ( PIN_OUTPUT | MUX_MODE0 ) 
		>;
	};


	uart1_pins_default: uart1_pins_default {
		pinctrl-single,pins = <
			0x180 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0 ) /* (K21) uart1_rxd.uart1_rxd */
			0x184 (PIN_OUTPUT_PULLUP | PULL_DISABLE | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN  | MUX_MODE0 ) /* (L21) uart1_txd.uart1_txd */
		>;
	};

	uart2_pins_default: uart2_pins_default {
		pinctrl-single,pins = <
			0x150 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE1 ) /* (P23) spi0_sclk.uart2_rxd */
			0x154 (PIN_OUTPUT_PULLUP | PULL_DISABLE | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN  | MUX_MODE1 ) /* (T22) spi0_d0.uart2_txd */
		>;
	};

	uart4_pins_default: uart4_pins_default {
		pinctrl-single,pins = <
			0x70 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE6 ) /* (A2) gpmc_wait0.uart4_rxd */
			0x74 (PIN_OUTPUT_PULLUP | PULL_DISABLE | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN  | MUX_MODE6 ) /* (B3) gpmc_wpn.uart4_txd */
		>;
	};
	
	uart5_pins_default: uart5_pins_default {
	pinctrl-single,pins = <
		0x108 ( PIN_INPUT | MUX_MODE3 ) /* (D16) mii1_col.uart5_rxd */
		0x144 ( PIN_OUTPUT | MUX_MODE3 ) /* (A16) rmii1_ref_clk.uart5_txd */
	>;
};
	

	myarm1_pins_default: myarm1_pins_default {
		pinctrl-single,pins = <
			0x284 ( PIN_INPUT_PULLUP | MUX_MODE0 ) /* (G25) EXTINTn.nNMI */
		>;
	};
};

&i2c0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&i2c0_pins>;
	clock-frequency = <100000>;

	tps65218: tps65218@24 {
		reg = <0x24>;
		compatible = "ti,tps65218";
		interrupts = <GIC_SPI 7 IRQ_TYPE_NONE>; /* NMIn */
		interrupt-controller;
		#interrupt-cells = <2>;

		dcdc1: regulator-dcdc1 {
			compatible = "ti,tps65218-dcdc1";
			regulator-name = "vdd_core";
			regulator-min-microvolt = <912000>;
			regulator-max-microvolt = <1144000>;
			regulator-boot-on;
			regulator-always-on;
		};

		dcdc2: regulator-dcdc2 {
			compatible = "ti,tps65218-dcdc2";
			regulator-name = "vdd_mpu";
			regulator-min-microvolt = <912000>;
			regulator-max-microvolt = <1378000>;
			regulator-boot-on;
			regulator-always-on;
		};

		dcdc3: regulator-dcdc3 {
			compatible = "ti,tps65218-dcdc3";
			regulator-name = "vdcdc3";
			regulator-min-microvolt = <1500000>;
			regulator-max-microvolt = <1500000>;
			regulator-boot-on;
			regulator-always-on;
			regulator-state-mem {
				regulator-on-in-suspend;
			};
			regulator-state-disk {
				regulator-off-in-suspend;
			};
		};

		dcdc5: regulator-dcdc5 {
			compatible = "ti,tps65218-dcdc5";
			regulator-name = "v1_0bat";
			regulator-min-microvolt = <1000000>;
			regulator-max-microvolt = <1000000>;
			regulator-boot-on;
			regulator-always-on;
			regulator-state-mem {
				regulator-on-in-suspend;
			};
		};

		dcdc6: regulator-dcdc6 {
			compatible = "ti,tps65218-dcdc6";
			regulator-name = "v1_8bat";
			regulator-min-microvolt = <1800000>;
			regulator-max-microvolt = <1800000>;
			regulator-boot-on;
			regulator-always-on;
			regulator-state-mem {
				regulator-on-in-suspend;
			};
		};

		ldo1: regulator-ldo1 {
			compatible = "ti,tps65218-ldo1";
			regulator-min-microvolt = <1800000>;
			regulator-max-microvolt = <1800000>;
			regulator-boot-on;
			regulator-always-on;
		};
	};
	
	adv7180: adv7180@21 {
    compatible = "adi,adv7180";
    reg = <0x21>;
    status = "okay";
    port {
				adv7180_1: endpoint {
					remote-endpoint = <&vpfe1_ep>;
					num-channels = <1>;
				};
    };
	};
	
	tlv320aic3106: tlv320aic3106@18 {
		#sound-dai-cells = <0>;
		compatible = "ti,tlv320aic3x";
		reg = <0x18>;
		status = "okay";

		/* Regulators */
		IOVDD-supply = <&evm_v3_3d>; /* V3_3D -> <tps63031> EN: V1_8D -> VBAT */
		AVDD-supply = <&evm_v3_3d>; /* v3_3AUD -> V3_3D -> ... */
		DRVDD-supply = <&evm_v3_3d>; /* v3_3AUD -> V3_3D -> ... */
		DVDD-supply = <&ldo1>; /* V1_8D -> LDO1 */
	};
};

&vpfe1 {
	 status = "okay";
    	pinctrl-names = "default";
    	pinctrl-0 = <&cam1_pins_default>;    
       
	port {
		vpfe1_ep: endpoint {
			slave-mode;
			remote-endpoint = <&adv7180_1>;
			ti,am437x-vpfe-interface = <1>;
			bus-width = <8>;
				
		};
	};
};


&i2c1 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&i2c1_pins_default>;
	clock-frequency = <100000>;
	
	tca8418:tca8418@47 {
     compatible = "ti,tca8418"; 
     reg = <0x47>;
     irq-gpio = <&gpio1 3 GPIO_ACTIVE_HIGH>;
     status = "okay";
     };
	
};

&epwmss0 {
	status = "okay";
};

&tscadc {
	status = "okay";

	adc {
		ti,adc-channels = <0 1 2 3 4 5 6 7>;
	};
};

&ecap0 {
	status = "okay";
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&ecap0_pins_default>;
	pinctrl-1 = <&ecap0_pins_sleep>;
};

&gpio0 {
	pinctrl-names = "default";
	pinctrl-0 = <&gpio0_pins_default>;
	status = "okay";
/*	
	p19 {
		gpio-hog;
		gpios = <19 GPIO_ACTIVE_HIGH>;
		output-high;
		line-name = "rs-tx";
	};	
	p20 {
		gpio-hog;
		gpios = <20 GPIO_ACTIVE_HIGH>;
		output-high;
		line-name = "rs-rx";
	};
	
	*/
};

/*
&gpio2 {
	pinctrl-names = "default";
	pinctrl-0 = <&gpio2_pins_default>;
	status = "okay";
	
	p0 {
		gpio-hog;
		gpios = <0 GPIO_ACTIVE_HIGH>;
		output-high;
		line-name = "LCD_BK_EN";
	};
	
	p1 {
		gpio-hog;
		gpios = <1 GPIO_ACTIVE_HIGH>;
		output-high;
		line-name = "GPIO_VTTEN";
	};
	
	p2 {
		gpio-hog;
		gpios = <2 GPIO_ACTIVE_HIGH>;
		input;
		line-name = "TIMEPULSE";
	};
};
*/

&gpio1 {
	pinctrl-names = "default";
	pinctrl-0 = <&gpio1_pins_default>;
	status = "okay";
	/*
	p3 {
		gpio-hog;
		gpios = <3 GPIO_ACTIVE_HIGH>;
		input;
		line-name = "I2C1_Ext IRQ";
	};
	
	p5 {
		gpio-hog;
		gpios = <5 GPIO_ACTIVE_HIGH>;
		input;
		line-name = "Keypd IRQ";
	};
	*/
	p28 {
		gpio-hog;
		gpios = <28 GPIO_ACTIVE_LOW>;
		output-high;
		line-name = "eMMC Resetn";
	};
};

&gpio3 {
	pinctrl-names = "default";
	pinctrl-0 = <&gpio3_pins_default>;
	status = "okay";
	/*
	p24 {
		gpio-hog;
		gpios = <24 GPIO_ACTIVE_LOW>;
		output-high;
		lines-name = "VidIn PWDN";
	};*/
};

&gpio4 {
	pinctrl-names = "default";
	pinctrl-0 = <&gpio4_pins_default>;
	status = "okay";
	
	p24 {
		gpio-hog;
		gpios = <24 GPIO_ACTIVE_HIGH>;
		output-high;
		line-name = "485sel1";
	};
	p25 {
		gpio-hog;
		gpios = <25 GPIO_ACTIVE_HIGH>;
		output-high;
		line-name = "485sel2";
	};
	p26 {
		gpio-hog;
		gpios = <26 GPIO_ACTIVE_HIGH>;
		output-high;
		line-name = "422seln";
	};
	p27 {
		gpio-hog;
		gpios = <27 GPIO_ACTIVE_HIGH>;
		output-low;
		line-name = "485sel3";
	};
	p28 {
		gpio-hog;
		gpios = <28 GPIO_ACTIVE_HIGH>;
		output-high;
		line-name = "485sel4";
	};
	p29 {
		gpio-hog;
		gpios = <29 GPIO_ACTIVE_HIGH>;
		output-low;
		line-name = "422selnn";
	};
	
	
};

&gpio5 {
    pinctrl-names = "default";
	pinctrl-0 = <&gpio5_pins_default>;
	status = "okay";
};


&mmc1 {
	status = "okay";
	vmmc-supply = <&evm_v3_3d>;
	bus-width = <4>;
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&sd_card_pins_default>;
	pinctrl-1 = <&sd_card_pins_sleep>;
};

&mmc2 {
	status = "okay";
	vmmc-supply = <&evm_v3_3d>;
	bus-width = <8>;
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&emmc_pins_default>;
	pinctrl-1 = <&emmc_pins_sleep>;
	ti,non-removable;
};

&mmc3 {
	status = "okay";
	/* these are on the crossbar and are outlined in the
	   xbar-event-map element */
	dmas = <&edma 30
		&edma 31>; 
/*modified by wini */
	/*dmas = <&edma_xbar 30 0 1>,
		<&edma_xbar 31 0 2>;*/
	dma-names = "tx", "rx";
	vmmc-supply = <&vmmcwl_fixed>;
	bus-width = <4>;
	pinctrl-names = "default", "sleep";
	/*pinctrl-0 = <&mmc2_pins_default>;
	pinctrl-1 = <&mmc2_pins_sleep>;  */
	
	cap-power-off-card;
	keep-power-in-suspend;
	ti,non-removable;

	#address-cells = <1>;
	#size-cells = <0>;
	wlcore: wlcore@0 {
		compatible = "ti,wl1835";
		reg = <2>;
		/*below 2 lines wini*/ 
                interrupt-parent = <&gpio0>;
		interrupts = <18 IRQ_TYPE_LEVEL_HIGH>;
                
	};
};

&edma {
	ti,edma-xbar-event-map = /bits/ 16 <1 30
					    2 31>;
};

&uart3 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&uart3_pins>;
};
/* newly added */
&uart1 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&uart1_pins_default>;
};
&uart2 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&uart2_pins_default>;
};
&uart4 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&uart4_pins_default>;
};

&uart5 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&uart5_pins_default>;
};

/* ******        */

&usb2_phy1 {
	status = "okay";
};

&usb1 {
	dr_mode = "host";
	status = "okay";
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&usb_host1_pins_default>;
	pinctrl-1 = <&usb_host1_pins_sleep>;
};

&usb2_phy2 {
	status = "okay";
};

&usb2 {
	dr_mode = "host";
	status = "okay";
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&usb_host2_pins_default>;
	pinctrl-1 = <&usb_host2_pins_sleep>;
};

&mac { 
	slaves = <2>;  
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&cpsw_default &cpsw_default1>;
	pinctrl-1 = <&cpsw_sleep &cpsw_sleep1>;   
    active_slave = <2>;  
    dual_emac;
	status = "okay";  
};

&davinci_mdio {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&davinci_mdio_default>;
	pinctrl-1 = <&davinci_mdio_sleep>;
	status = "okay";
};

/*&cpsw_emac1 to emac0    --wini */

&cpsw_emac0 { 
	phy_id = <&davinci_mdio>, <0>;
	phy-mode = "rgmii";
	dual_emac_res_vlan = <1>;
};

&cpsw_emac1 {
	phy_id = <&davinci_mdio>, <1>;
	phy-mode = "rgmii";
	dual_emac_res_vlan = <2>;
};


&elm {
	status = "okay";
};

&uart0 {
	status = "okay";
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&uart0_pins_default>;
	pinctrl-1 = <&uart0_pins_sleep>;
};

&dss {
	status = "ok";

	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&dss_pinctrl_default>;
	pinctrl-1 = <&dss_pinctrl_sleep>;

	port {
		dpi_out: endpoint@0 {
			remote-endpoint = <&lcd_in>;
			data-lines = <24>;
		};
	};
};

&dcan0 {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&dcan0_pins_default>;
	pinctrl-1 = <&dcan0_pins_sleep>;
	status = "okay";
};

&dcan1 {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&dcan1_pins_default>;
	pinctrl-1 = <&dcan1_pins_sleep>;
	status = "okay";
};

&mcasp1 {
	#sound-dai-cells = <0>;
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&mcasp1_pins>;
	pinctrl-1 = <&mcasp1_sleep_pins>;

	status = "okay";

	op-mode = <0>; /* MCASP_IIS_MODE */
	tdm-slots = <2>;
	/* 4 serializers */
	serial-dir = <  /* 0: INACTIVE, 1: TX, 2: RX */
		0 0 1 2
	>;
	tx-num-evt = <32>;
	rx-num-evt = <32>;
};

&wkup_m3_ipc {
	ti,set-io-isolation;
	ti,scale-data-fw = "am43x-evm-scale-data.bin";
};

&cpu {
	cpu0-supply = <&dcdc2>;
};

/*
&rtc {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&rtc1_pins_default>;
};
*/
/* changed by wini */
&rtc {
	clocks = <&clk_32k_rtc>, <&clk_32768_ck>;
	clock-names = "ext-clk", "int-clk";
	status = "okay";
};

&sgx {
	status = "okay";
};

I followed below commands to read and write time ?

date MMDDhhmmyyyy (set time)

hwclock -w (write time )

hwclock -r (Read time )

Can you now suggest, Why RTC time does not store after restarting my board?

Regards,

Winiston.P

0 RonB over 5 years ago in reply to Arockia winiston

TI__Mastermind 30276 points

Winiston,

If you read back the RTC before shutdown, is the time set correct?

Do you see any activity on the I2C bus to indicate that the time is being written to the RTC?

0 Arockia winiston over 5 years ago in reply to RonB

Expert 2035 points

Dear,

I have read back the time before shut down. The time sets properly. But if i reset my board, time is also got reset.

I have set FSEAL REGISTER using the following command.

i2cset -f -y 0 0x24 0x10 0xb1

i2cset -f -y 0 0x24 0x10 0xfe

i2cset -f -y 0 0x24 0x10 0xa3

I have read FSEAL REGISTER status using the following command.

i2cget -f -y 0 0x24 0x05

I got the following value when i use above command.

0xa8

What is the command to see RTC activity on I2C bus ?

Regards,

Winiston.P

0 RonB over 5 years ago in reply to Arockia winiston

TI__Mastermind 30276 points

Winiston,

I"m sorry, I mislead you on I2C as I forgot that we are using the integrated RTC module. Thus, I2C does not come into play.

I booted up an AM437x Starter Kit EVM and tried what you were seeing.

I was able to set the system time, set the RTC, read the RTC, etc.

When I rebooted, system time (the time retrieved with date) was again incorrect. However, when I read the RTC, it was still correct.

So, based on this, I believe you need to setup a startup or shutdown script to sync the system time to the RTC using hwclock --hctosys (at startup for example).

I hope this is helpful.

0 Arockia winiston over 5 years ago in reply to RonB

Expert 2035 points

Dear,

I do not have much idea to setup startup script to sync time to the RTC.

How do i set a startup script to sync the system time to the RTC?

Regards,

Winiston.P

0 Arockia winiston over 5 years ago in reply to RonB

Expert 2035 points

Dear Ron,

I am waiting for your reply.
How do i set startup script to sync system time to RTC ?

Regards,
Winiston.

0 Arockia winiston over 5 years ago in reply to RonB

Expert 2035 points

Dear,

I tried with the following command for troubleshooting rtc and got below messages.

root@am437x-evm:~# dmesg | grep rtc

[ 1.943767] hctosys: unable to open rtc device (rtc0)

[ 6.459505] omap_rtc 44e3e000.rtc: already running

[ 6.499090] rtc rtc0: 44e3e000.rtc: dev (253:0)

[ 6.499119] omap_rtc 44e3e000.rtc: rtc core: registered 44e3e000.rtc as rtc0

[ 15.410205] PM: bootloader does not support rtc-only!

root@am437x-evm:

Does "hctosys: unable to open rtc device (rtc0) " OR "[ 15.410205] PM: bootloader does not support rtc-only! " creates any problem?

Regards,

Winiston.P

0 Ahmad_Rashed over 5 years ago in reply to Arockia winiston

TI__Genius 13567 points

Those messages likely can be ignored. For the "hctosys" warning, try running this command after you log in.

hwclock --debug

If the hwclock command runs successfully, this means the Linux OS is able to access the RTC without issue and the hctosys command was run too soon before the RTC was ready to access. The hctosys command reads the RTC and updates the Linux OS time but if this update fails then it explains the behavior you are seeing (incorrect time after reboot).

Let's see if you can get the hwclock command to read the RTC without issue. If so then just add a script on start-up to run "hwclock --hctosys" command once at boot after the RTC is ready. Please see this reference on adding start-up scripts to your rc.local file: stackexchange.com

0 Arockia winiston over 5 years ago in reply to Ahmad_Rashed

Expert 2035 points

Dear Ahmad,

I ran "hwclock --debug" but it says unrecognized option '--debug' ".

"hwclock -r" , "hwclock -w" , "hwclock --hctosys" , "hwclock --systohc" commands are working.

I set the date as given below.

date 102315282018 (date MMDDhhmmyyyy)
Then read date using "hwclock -r" command. It gives old date and gave below command
"hwclock --hctosys" or "hwclock -w"

Then i read the date by using " hwclock -r" . It gives correct date.

I restarted the board and checked the date using "hwclock -r". It gives old date(wrong value).

Then i have given the command like "hwclock --hctosys" after restarting. But still gives old date only.

I tried giving "hwclock --hctosys" at startup also. But it read old date when i issue " hwclock -r".

I hope hardware clock itself is getting reset when the board reset.

How do make hardware clock stable when i reset the board?

Regards,

Winiston.P

0 Arockia winiston over 5 years ago in reply to Ahmad_Rashed

Expert 2035 points

Dear Ahmad,
I am waiting for your reply. Basically the problem is, hwclock is getting reset when board reset.
So if i give "hwclock --hctosys" at startup, it takes the wrong date.

How do i make hwclock stable(without reset) after board reset?

Regards,
Winiston.P

0 Ahmad_Rashed over 5 years ago in reply to Arockia winiston

TI__Genius 13567 points

How are you performing the board reset? As Ron tested previously, this feature you want should be working.

Let's double check the sequence of commands

boot to OS for the first time
log in and set the Linux time using this example command: date -s "2018-10-26 13:20"
You can check the date again by running: date
Then write the date to the hardware RTC: hwclock -w
Then read the date from the RTC: hwclock -r
Now you can reboot: reboot
After log in, check the Linux time (it will be wrong): date
Then read the RTC time (this should be correct): hwclock -r
Now set Linux time to RTC time: hwclock -s
Check Linux time (it should be correct): date

Hope this helps.

0 Arockia winiston over 5 years ago in reply to Ahmad_Rashed

Expert 2035 points

Dear Ahmad,

As you said i followed and double check the sequence as given below.

boot to OS for the first time Response : Boots properly
log in and set the Linux time using this example command: date -s "2018-10-29 09:20" Response : Time got set
You can check the date again by running: date Response : Gives correct date : Mon Oct 29 09:20 UTC 2018
Then write the date to the hardware RTC: hwclock -w Response : Done
Then read the date from the RTC: hwclock -r Response : Gives correct date : Mon Oct 29 09:20 0.0000 seconds
Now you can reboot: reboot Response : Done
After log in, check the Linux time (it will be wrong): date Response : Wrong date
Then read the RTC time (this should be correct): hwclock -r Response : Wrong date
Now set Linux time to RTC time: hwclock -s Response : Done
Check Linux time (it should be correct): date Response : Wrong date

Kindly check above points 8,9 and 10 .I hope hardware clock got reset while performing reset. What could be the problem?

If you want me to perform any hardware check, please suggest me.

Regards,

Winiston.P

0 Arockia winiston over 5 years ago in reply to Ahmad_Rashed

Expert 2035 points

Dear Ahmad,

I tried two modes as per the below link.

Please see below voltage details after removing the power (Power off).

1. RTC Only Mode:

VDD_RTC => 1.8V
CAP_VDD_RTC => 1uf capacitor to ground.
RTC_KALDO_EN => GROUND
RTC_PWRON_RST =.> 1.8V (It keeps the voltage 1.8v all the time even in power on or power off condition. No power sequence occur here).
PMIC_PWR_EN => 1.8V
EXT_WAKEUP => 1.8V
RTC clock => 32.768 Khz

Result : RTC clock got reset after board reset. I tried your previous mail guideline also and got the same result as my previous mail i sent.

2. RTC Timer Functionality but no RTC only Mode:

VDD_RTC => 1.8V
CAP_VDD_RTC => 1.0 V
RTC_KALDO_EN => 1.8V
RTC_PWRON_RST =.> 1.8V (It keeps the voltage 1.8v all the time even in power on or power off condition. No power sequence occur here).
PMIC_PWR_EN => 1.8V (As per texas check list, PMIC_PWR_EN = no connect. But if I remove "PMIC_PWR_EN" voltage from "RTC_PMIC_EN", Board does not boot because of PMIC IC shuts down and there are no primary voltages in PMIC. So i connected "PMIC_PWR_EN" to "RTC_PMIC_EN" )
EXT_WAKEUP => ground
RTC clock => 32.768 Khz

Result : RTC clock got reset after board reset. I tried your previous mail guideline also and got the same result as my previous mail i sent.

Please let me know if you need more details.

Regards,

Winiston.P

0 Ahmad_Rashed over 5 years ago in reply to Arockia winiston

TI__Genius 13567 points

The AM335x schematic checklist likely isn't going to work for the AM437x. Check that your PMIC and SoC connections match the GP EVM schematic. It's been tested on this board and verified by both Ron and I.

0 Arockia winiston over 5 years ago in reply to Ahmad_Rashed

Expert 2035 points

Dear Ahmad,

I followed AM437x-gp-evm v1.5b schematic But problem remain same. hwclock get reset if i reset the board.

RTC related connection as per AM437X-GP-EVM V1.5b as given below.

VDDS_RTC = 1.8V (output of TPS78101 IC. and input of TPS78101 IC is "SYS_BU" of PMIC)

CAP_VDD_RTC = VDD CORE (1.0V) (L5 output of PMIC)

RTC_KALDO_ENn = VDDS_RTC (1.8V) and RTC_KALDO_ENn is vonnected to VDDS_RTC via 10k resistor.

RTC_PWRONRSTn = PGOOD_BU of PMIC IC (1.8V).

PMIC_POWER_EN = RTC_PMIC_EN (1.8V).

EXT_WAKEUP (RTC_WAKEUP ) = WAKEUPn pin of PMIC with 10K pullup to VDDS_RTC.

Is there any mistake in above configuration?

We are ready to send our board to you if you can troubleshoot this RTC issue. Kindly send your shipping address. We will send our board with schematic and all components mounted.

Regards,

Winiston.P

0 Arockia winiston over 5 years ago in reply to Ahmad_Rashed

Expert 2035 points

Dear Ahmad,

I feel, the system (Linux) time is getting updated to hardware clock instead of updating hardware clock to system time.

This has been proven by following scenarios.

System time always show as "Fri Oct 5 07:52:00 UTC 2018" by "date" command.

Note : I copied all Linux file to SD card on "Oct 5 2018"

hardware clock is also show the same date as "Fri Oct 5 07:52:00 UTC 2018" by "hwclock -r" when i reboot the board.

If hardware clock resets while board reset, Hardware clock should be a "Sat Jan 1 0:00:00 UTC 2000". But i always get hardware clock as "Fri Oct 5 07:52:00 UTC 2018" by "hwclock -r " all the time when i boots.

So there are possibilities, system (Linux) time is getting updated to hardware clock instead of updating hardware clock to system time.

But i am not sure How system time is getting updated to hardware clock.

What file causes system time to hardware time updation at bootup?

Regards,

Winiston.P

0 Ahmad_Rashed over 5 years ago in reply to Arockia winiston

TI__Genius 13567 points

Hi Winiston,

Unfortunately I can't help you there. I'm able to verify that it is working with our Processor SDK. Plus it seems like you are able to verify that the RTC hardware does not clear on its own. You'll need to find out more on the software interaction. Perhaps see if you can disable hctosys at start-up since this is the driver that is responsible for syncing Linux to the RTC at boot.

0 Arockia winiston over 5 years ago in reply to Ahmad_Rashed

Expert 2035 points

Dear Ahmad,

Thanks for your quick answer and sorry for asking so many questions to you.

How to disable hctosys at startup? What file is responsible to perform hctosys activity?

Regards,

Winiston.P

0 Arockia winiston over 5 years ago in reply to Ahmad_Rashed

Expert 2035 points

Dear Ahmad,

We have your AM437X-gp-evm board also. I checked with that board and SDK4.02 based pre-built image(Available inside SDK4.02). But I faced the same RTC problem with your AM437X-gp-evm board.

Have you checked RTC with AM437X-gp-evm board ? Did RTC work with your environment? If yes, What version of board you are using ?

Regards,

Winiston.P

0 Ahmad_Rashed over 5 years ago in reply to Arockia winiston

TI__Genius 13567 points

Hi Winiston,

I can confirm that the RTC is working on the AM437x GP EVM rev 1.5 using Processor SDK 4.3 (Kernel v4.9).

Regards,
Ahmad

0 Arockia winiston over 5 years ago in reply to Ahmad_Rashed

Expert 2035 points

Dear Ahmad,

Thanks for your confirmation. Can you please provide your RTC testing method by answering the following questions?

Prebuilt sdk or your modified kernel?

What are the commands you used to set RTC /

Did you burn fseal using the following command ?

i2cset -f -y 0 0x24 0x10 0xb1

i2cset -f -y 0 0x24 0x10 0xfe

i2cset -f -y 0 0x24 0x10 0xa3

After setting above command, I can read RTC status register as given below

i2cget -f -y 0 0x24 0x05

I got 0xa8 (register status value) as output if i issue above command.

What is your RTC status register value if you issue the above command?

Regards,

Winiston.P

0 Ahmad_Rashed over 5 years ago in reply to Arockia winiston

TI__Genius 13567 points

Winiston,

I used the unmodified SDK. No I2C commands are sent to the PMIC. There is no RTC in the PMIC.

Regards,
Ahmad

0 Arockia winiston over 5 years ago in reply to Ahmad_Rashed

Expert 2035 points

Dear Ahmad,

I also used AM437X-GP-EVM, Rev1.5A evaluation board with SDK 4.03, unmodified SDK (Kernel 4.9 )with no I2C command sent to the PMIC. But Time got reset when board is getting reset.

I tried even SDK 5.0 also. But the same RTC problem persists.

Is there any AM4378 chip revision has this RTC problem? May be we are using the chip version with no RTC support.

Regards,

Winiston.P

0 Ahmad_Rashed over 5 years ago in reply to Arockia winiston

TI__Genius 13567 points

The time should only remain if you performed a "reboot" command from the terminal. Can you please describe how you are resetting the board? That method may be clearing the RTC.

0 Arockia winiston over 5 years ago in reply to Ahmad_Rashed

Expert 2035 points

Dear Ahmad,

I also performed via "reboot" command only. But it still shows old date(wrong date) only.

I gave the following commands,

date -s "2018-11-08 16:45"
hwclock -w
reboot

Once i set date -s "2018-11-08 16:45" and "hwclock -w" , I read RTC using "date" command. It gives correct date. If i give "hwclock -r" , it gives correct value.

After that I rebooted board using "reboot" command. and checked RTC using " date" and " hwclock -r" . Both commands gives wrong value.

Is there any AM4378 chip revision which does not support RTC? We may use old revision of chip. My AM437X-GP-EVM evaluation board revision is 1.5A. kindly check whether this version supports RTC and confirm.

Regards,

Winiston.P

0 RonB over 5 years ago in reply to Arockia winiston

TI__Mastermind 30276 points

Winiston,

I dug into this some more and believe I have found a solution. Be default, we build the RTC Driver as a module. Could you please try building it into the kernel by changing the Device Drivers > Real Time Clock > TI OMAP Real Time Clock to built-in (* instead of M). This should make the RTC available at start up and allow the kernel's built-in HCTOSYS to sync the system time from the RTC. This will all by done with menuconfig or some other utility to modify the .config of the kernel. Or course, you'll then need to rebuild the kernel as well.

I just did some testing on this for several "reboot"s and it seemed to work very reliably. Can you give it a try?

0 Arockia winiston over 5 years ago in reply to RonB

Expert 2035 points

Dear RonB,

Thank you very very much.It solved my problem. As you told, I changed and rebuilt kernel with TI OMAP Real Time Clock to built-in (* instead of M). It works well. But we need to burn fseal register to keep the time if we want to remove power or hardware reset to the board.

If fseal register not set, it works only soft reset ("reset" command).

Thanks to all of you who tried this problem.

Regards,

Winiston.P

0 Arockia winiston over 5 years ago in reply to RonB

Expert 2035 points

Dear Ahmad,

Thank you very much .You also tried a lot on this problem. Finally problem got solved.

Regards,
Winiston.P

0 RonB over 5 years ago in reply to Arockia winiston

TI__Mastermind 30276 points

Winiston,

On behalf of myself and Ahmad, thanks for letting us know this solved your problem.

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Linux/AM4378: RTC time is getting reset when system reboot