RTOS/AM5728: Connecting 2 IDK Boards for DCAN External Loopback Communication

This diagram is from TI's Wiki page for Linux Core DCAN User's Guide as linked above. If this is an error, it probably should be revised.
I have not hooked anything up between the boards; I am inquiring how to do it before I get started today.
Please explain what you mean by "Signals must be connected 1:1". CANH to CANH and CANL to CANL?

Thank you.

Alec,

How do I distinguish them with different CAN Identifiers? I have seen the AM335x with profile switches, but I do not have those on my AM5728 IDK.

The AM335x has the CPLD dip switches which connect through an FPGA to control the pin muxing depending on the profile selected.

In the case of the AM57x IDK, the CAN pins are connected directly to J38 as you have already stated. Does that clarify? not sure if I answered your question.

Lali

Hi Lali,

Sorry, but that does not clarify anything for me. Maybe I am asking the wrong question. Here's what I want:

I have my two AM5728 IDKs sitting next to me. I want to test external loopback capabilities through TI-RTOS; external meaning between the boards as 2 nodes.

What is the process?

In terms of physical connection, I understand CAN-H connects to CAN-H and CAN-L to CAN-L on the J38 header pins.

1. Do I need a connection to 5V or ground on the J38 connection?
2. Do I connect both boards through JTAG to USB to my computer or do I only need to use one connection to the PC?
3. Where does the 120 Ohm termination connect to?
4. Is a separate transceiver required or is this part of the DCAN block?

In terms of software:

1. How do I distinguish one node from another? 
2. What software needs to be running on each board to make it work? (Do I need to load TI-RTOS on both boards?)
3. Should/Can I use an SD card with the DCAN Loopback Example loaded on each board?

I'm sure I will have more software questions once I get going.

Thank you,

Alec

Lali,

I am uncertain (doubt) that the DCAN Loopback Application is actually going external to the other board when selecting the DCAN External Loopback Test.  

I left only one board connected and it still was "successful". 

Please assist me in determining how to fix the Loopback Application software to generate a TRUE External Loopback Test.

Thank you,

Alec 

Alec,

I have been trying to reproduce this issue.

In dcan_loopback_app.c I noticed that the DCAN mode is "test" in the example.

Did you modify it like below (dcan_loopback_app.c around line ~505)?

pDcanCfgPrms->testModeEnable = FALSE;
pDcanCfgPrms->testMode = DCAN_TEST_MODE_NONE; 

Lali

    /*Initialize DCAN Config Params*/

    if (DCAN_PARITY_ECC_TEST == pMainMenuOption)
    {
        pDcanCfgPrms->parityEnable    = TRUE;
        pDcanCfgPrms->intrLine0Enable = FALSE;
#if defined (SOC_TDA3XX) || defined (SOC_DRA78x)
        pDcanCfgPrms->eccModeEnable     = TRUE;
        pDcanCfgPrms->eccDiagModeEnable = FALSE;
        pDcanCfgPrms->sbeEventEnable    = TRUE;
#endif
        pDcanCfgPrms->testModeEnable = FALSE;
    }
    else
    {
        pDcanCfgPrms->parityEnable    = FALSE;
        pDcanCfgPrms->intrLine0Enable = TRUE;
#if defined (SOC_TDA3XX) || defined (SOC_DRA78x)
        pDcanCfgPrms->eccModeEnable = FALSE;
#endif
        pDcanCfgPrms->testModeEnable = TRUE;
        if (pMainMenuOption == DCAN_INT_LOOPBACK_TEST)
        {
            pDcanCfgPrms->testMode = DCAN_TEST_MODE_LPBACK;
        }
        else
        {
            pDcanCfgPrms->testMode = DCAN_TEST_MODE_EXT_LPBACK;
        }
    }

I have not modified any portion of this code. Since Parity mode is not enabled on my SOC, it goes to the ELSE-> and testModeEnable is set to TRUE. Are you saying to set to FALSE?

Lali,

I am attempting to use breakpoints to debug the transfer sequence but I am not getting a pause. It's definitely running the code because I put it on the UART output, and the output still gets printed.

Is there a setting I'm missing when running my Target Config, or something when connecting to the target core? I've tried adjusting the Global Breakpoints setting, and the OS Debugging options, but neither seem to effect what I'm doing. 

Thank you again for your assistance so far. 

Regards,

Alec

Alec,

Did you import the project into your workspace and build?

I assume you have full symbolic debug enabled in the project properties

Lali

Yes... I built the project as shown from my output screenshot above. 

Yes full symbolic debug is active.

Hmmm...strange.

I'm able to hit breakpoints.

Of course you have a GEL that runs on the A15 and C66x DSP?

https://e2e.ti.com/support/tools/ccs/f/81/t/313685?CCS-does-not-recognize-breakpoints-gives-GEL-Expression-window-when-trying-run-to-line 

My test flow is that I connect the A15 first with a GEL, then connect the C66x with a GEL.

Lali

Yes, the GEL runs A15 when I connect to the target. It also connects to C66x DSP. I also first connect to the A15 (As required as this is the master boot core) then connect to the DSP1. 

A major difference I notice is my breakpoints do not create the Action to remain halted. Why does this happen? How can I fix it?

When I add the breakpoints while in Editing Mode, they get added as in my screenshot above. Either by double-clicking left of the line numbers, or by right clicking and selecting Breakpoint(CCS)-> Breakpoint.
If I add the breakpoint while connected to target config and in debug mode, it adds it like yours but it's inactive due to being in debug mode. Then when I activate it in edit mode, it becomes active. Then I connect to the target again, and it goes to the blank conditions as in my above screenshot.

What does this mean "Breakpoint is not attached to an active debug context. Please launch the debug session where this breakpoint is attached."?

Here is the visual representation of what I tried to explain. Line 847 was the existing breakpoint, and you can see its "active" but does not have any actions associated with it. Line 849 I added a breakpoint while in Debug mode; you can see it is Inactive, but it has the appropriate characteristics of a breakpoint. I am confused why this is happening.

I did confirm that software breakpoints are enabled in the project properties.

Does this help? https://e2e.ti.com/support/tools/ccs/f/81/t/266952?CCSv5-SW-Breackpoints-dont-work

Please try to rebuild the project and load to see if that helps.

If nothing works, I will loop in the CCS team to chime in.

Lali

Hi Lali,

Thanks for the good suggestion. However, I do not have any options besides CCS breakpoints. Please have the CCS team assist in activating the C/C++ Breakpoints. 

I tried rebuilding the project just in case and no changes occurred.

Thank you,

Alec 

e2e.ti.com/.../613349

But we don't see very much customers going the other way (CCS projects with GDB)

Lalindra Jayatilleke said:

Alec,
I have looped in the CCS team to help understand the BP issue.

Lali

CCS team, please provide clarification and solution for the breakpoint issue addressed in this thread.

Thank you,

Alec

Part Number: AM5728

Tool/software: TI-RTOS

Lalindra Jayatilleke said:

Alec,

Yes, I have been looking into it and here's some encouraging news.

I took the example rtos_template_app_am572x_c66_04_03.zip from https://e2e.ti.com/support/processors/f/791/p/732704/2708510#2708510 and ran a AM57x IDK-AM57x IDK scenario.

As mentioned earlier DCAN_TEST_MODE_NONE and testModeEnable FALSE were the changes to the example.

Its not the ideal case since the Rx side does not have a Rx function that spins awaiting frames. 
However, if you run the same binary on both sides, it will work when run a certain way. 
Below is a picture of the HW setup and also screenshots of how it ran.

The setup was with 2 instances of CCS running and 2 Putty terminals.

Hopefully this will get you going on cutting down the example for the Rx side.

Lali

Lali,

In your screenshot the Rx side indicates the test has Failed, even though the single frame was received from the Tx side. Why?

We are trying to figure out the software configuration to make a successful transfer across boards.

In addition, we want to know what you mean by "it will work when run a certain way". Please be as specific as possible. 

Thank you,

Alec

Hi Lali,

I am looking in the TRM and I came across the IF3 DMA Register, which says (Section 24.10.4.3 DMA Functionality) "The IF3 registers content can be automatically updated on reception of CAN messages in message objects which are programmed for automatic IF3 update." Is this something we can implement? The AM335x Multi-Board application you provided has Direct Memory Access throughout the application; however, the AM572x Loopback example does not have any DMA enabled. So I do not know if it is a simple implementation or a complex process.

I tried using code from the end of the loopback application where the frames are transmitted and using a while loop as a wait indicator, but it skips through the conditional statements within the function.

Thanks for your help and look forward to your response,

Alec

Alec,

Just to update. Still working on it and will provide an update tomorrow.

To answer your specific question, did you try to enable IF3

pDcanCfgPrms->if3DmaEnable = TRUE;

in dcan_loopback_app.c?

I tried this and can see the DMA request line for IF3 get enabled.

Lali