Hi
In dra71x datasheet<DRA71x Infotainment Applications Processor>,there is description about the impedance settings of the hdmi out pins in Page 64. table 4-1
(8) In PUx / PDy, x and y = 60 to 200 μA.
The output impedance settings (or drive strengths) of this IO are programmable (34 Ω, 40 Ω, 48 Ω, 60 Ω, 80 Ω) depending on the values of the I[2:0] registers.
But i could not find which register to configure this ,pls help check about it .
Thanks,