Other Parts Discussed in Thread: CDCM9102,
Can connect AM57xx PCIe_REF_CLK to target peer directly? LJCB_CLK output clock as source? remove the CDCM9102 on the IDK schematic?
About the decoupling capacitor placement, put it on source end? right? but on the IDK PCB, it is on the PCIe socket side. please clarify.