The PRU_Demo in the support package contains the following snippets in pru.c
1)
//******************************************************************************
// PRU ICSS Reset
// This function resets the PRU cores.
//******************************************************************************
void PRUICSSReset(void)
{
HWREG(SOC_PRM_PER_REGS + CM_PER_L4LS_CLKSTCTRL) |= 0x2; /* Reset PRU */ // should be: RM_PER_RSTCTRL
HWREG(SOC_PRM_PER_REGS + CM_PER_L4LS_CLKSTCTRL) &= 0xFFFFFFFD;
}
Question 1: I would think that the offset should rather be RM_PER_RSTCTRL (refman AM335x p.1411), since this is related to the PER domain resets, not to clock management.
Since the value of CM_PER_L4LS_CLKSTCTRL is the same as RM_PER_RSTCTRL,namely 0, the difference has no impact.
2)
//******************************************************************************
// PRU Memory Fill
// This function takes and a pointer length and value to be placed and
// iterates through the memory placing the pattern.
//******************************************************************************
void PRUMemFill(unsigned int StartAddress, unsigned int Length, unsigned int Pattern)
{
memset((unsigned char*)StartAddress, Pattern, (Length/4));
}
Question 2: why is the nb of bytes to be filled divided by 4 ?.
Thanks
Peter
