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AM5718: EMIF tools question

Part Number: AM5718
Other Parts Discussed in Thread: AM5728

Hi ,

We developed AM5718 based SOM, and we using IS43TR16256A-125KBL-TR  2X RAM chip

I configured DDR3 memory using this EMIF tool in that spread sheet unable to change "Detail 1" value after filling remaining cell  I am getting the following output.

/* =========================================================================		
 *   Copyright (C) 2017 Texas Instruments Incorporated		
 *		
 *   All rights reserved. Property of Texas Instruments Incorporated.		
 *   Restricted rights to use, duplicate or disclose this code are		
 *   granted through contract.		
 *		
 *   The program may not be used without the written permission		
 *   of Texas Instruments Incorporated or against the terms and conditions		
 *   stipulated in the agreement under which this program has been		
 *   supplied.		
 * ========================================================================= */		
		
/*		
 *  AM571x_DDR3L_666MHz_TI_AM574x_EVM_config.c		
 *     Created on: 05/03/2019		
 *     Created with: EMIF_RegisterConfig_v2.0.2		
 */		
		
#include "emif4d5_wrapper.h"		
		
const struct dpll_params AM571x_DDR3L_666MHz_TI_AM574x_EVM_pll_params = {		
    .m = 333,		
    .n = 4,		
    .m2 = 2,		
    .m4_h11 = 8		
};		
		
const struct ctrl_ioregs AM571x_DDR3L_666MHz_TI_AM574x_EVM_ctrl_ioregs = {		
    .ctrl_ddr3ch = 0x60606060,		
    .ctrl_ddrch = 0x40404040,		
    .ctrl_ddrio_0 = 0x00094A40,		
    .ctrl_ddrio_1 = 0x00000000,		
    .ctrl_emif_sdram_config_ext = 0x0000C123		
};		
		
const struct dmm_lisa_map_regs AM571x_DDR3L_666MHz_TI_AM574x_EVM_dmm_regs = {		
    .dmm_lisa_map_0 = 0x00000000,		
    .dmm_lisa_map_1 = 0x00000000,		
    .dmm_lisa_map_2 = 0x80700100,		
    .dmm_lisa_map_3 = 0xFF020100,		
    .is_ma_present = 0x1		
};		
		
const struct emif_regs AM571x_DDR3L_666MHz_TI_AM574x_EVM_emif_regs = {		
    .sdram_config_init = 0x61862BB2,		
    .sdram_config = 0x61862BB2,		
    .sdram_config2 = 0x00000000,		
    .ref_ctrl = 0x0000514D,		
    .ref_ctrl_final = 0x0000144A,		
    .sdram_tim1 = 0xD3337834,		
    .sdram_tim2 = 0x30B37FE3,		
    .sdram_tim3 = 0x407F8AD8,		
    .read_idle_ctrl = 0x00050000,		
    .zq_config = 0x5007190B,		
    .temp_alert_config = 0x00000000,		
    .emif_rd_wr_lvl_rmp_ctl = 0x80000000,		
    .emif_rd_wr_lvl_ctl = 0x00000000,		
    .emif_ddr_phy_ctlr_1_init = 0x0824400E,		
    .emif_ddr_phy_ctlr_1 = 0x0E24400E,		
    .emif_rd_wr_exec_thresh = 0x00000305,		
		
    .emif_ecc_ctrl_reg = 0x00000000,		
    .emif_ecc_address_range_1 = 0x3FFF0000,		
    .emif_ecc_address_range_2 = 0x00000000,		
		
};		
		
/*		
 * DLL Ratio Values are an estimate based on trace lengths. Either 		
 * software leveling or hardware leveling should be performed to		
 * determine final DLL values.		
 */		
const unsigned int AM571x_DDR3L_666MHz_TI_AM574x_EVM_emif1_ext_phy_regs [] = {		
    ,	// EMIF1_EXT_PHY_CTRL_1	
    ,	// EMIF1_EXT_PHY_CTRL_2	
    ,	// EMIF1_EXT_PHY_CTRL_3	
    ,	// EMIF1_EXT_PHY_CTRL_4	
    ,	// EMIF1_EXT_PHY_CTRL_5	
    ,	// EMIF1_EXT_PHY_CTRL_6	
    ,	// EMIF1_EXT_PHY_CTRL_7	
    ,	// EMIF1_EXT_PHY_CTRL_8	
    ,	// EMIF1_EXT_PHY_CTRL_9	
    ,	// EMIF1_EXT_PHY_CTRL_10	
    ,	// EMIF1_EXT_PHY_CTRL_11	
    ,	// EMIF1_EXT_PHY_CTRL_12	
    ,	// EMIF1_EXT_PHY_CTRL_13	
    ,	// EMIF1_EXT_PHY_CTRL_14	
    ,	// EMIF1_EXT_PHY_CTRL_15	
    ,	// EMIF1_EXT_PHY_CTRL_16	
    ,	// EMIF1_EXT_PHY_CTRL_17	
    ,	// EMIF1_EXT_PHY_CTRL_18	
    ,	// EMIF1_EXT_PHY_CTRL_19	
    ,	// EMIF1_EXT_PHY_CTRL_20	
    ,	// EMIF1_EXT_PHY_CTRL_21	
    ,	// EMIF1_EXT_PHY_CTRL_22	
    ,	// EMIF1_EXT_PHY_CTRL_23	
    ,	// EMIF1_EXT_PHY_CTRL_24	
    ,	// EMIF1_EXT_PHY_CTRL_25	
    ,	// EMIF1_EXT_PHY_CTRL_26	
    ,	// EMIF1_EXT_PHY_CTRL_27	
    ,	// EMIF1_EXT_PHY_CTRL_28	
    ,	// EMIF1_EXT_PHY_CTRL_29	
    ,	// EMIF1_EXT_PHY_CTRL_30	
    ,	// EMIF1_EXT_PHY_CTRL_31	
    ,	// EMIF1_EXT_PHY_CTRL_32	
    ,	// EMIF1_EXT_PHY_CTRL_33	
    ,	// EMIF1_EXT_PHY_CTRL_34	
    ,	// EMIF1_EXT_PHY_CTRL_35	
    	// EMIF1_EXT_PHY_CTRL_36	
};		
		
struct emif_cfg AM571x_DDR3L_666MHz_TI_AM574x_EVM = {		
    .platform = "AM571x_DDR3L_666MHz_TI_AM574x_EVM",		
    .EMIF2_DEFINED = 0,		
    .pll_regs = &AM571x_DDR3L_666MHz_TI_AM574x_EVM_pll_params,		
    .ctrl_regs = &AM571x_DDR3L_666MHz_TI_AM574x_EVM_ctrl_ioregs,		
    .dmm_regs = &AM571x_DDR3L_666MHz_TI_AM574x_EVM_dmm_regs,		
    .regs = &AM571x_DDR3L_666MHz_TI_AM574x_EVM_emif_regs,		
    .phy_regs1 = AM571x_DDR3L_666MHz_TI_AM574x_EVM_emif1_ext_phy_regs,		
		
};		

Question is where can i apply all this values in source code? 

 

Regards,

Ravi

  • Please post what software and which version you are using.
  • Hi Biser

    Thanks for quick response.

    I am using EMIF_RegisterConfiguration.xlsm v2.0.2 (sprac36c.zip) and PSDK "ti-processor-sdk-linux-am57xx-evm-05.03.00.07" and I am using ubuntu 16.04 HOST


    Regards,
    Ravi
  • Hello,

    Based on the new values, please update the file "board.c" in the directory <u-boot>/board/ti/am57xx. As a reference, in uboot, please look at commit ids "d7b39ec7cd2ea0ee64ed7e3551246e495e4fc4a6" and "209742fa8858a201af2f32e05b1fb72ef299540e".

    Regards,
    Krunal

  • Hi Krunal,

    I updated "board.c" file in  <u-boot>/board/ti/am57xx. After update uboot-spl not booting

    Then i found out issue with ".dmm_lisa_map_3 = 0xFF020100"

    Later i changed to ".dmm_lisa_map_3 = 0x80640100"  uboot-spl start booting and stopped in "image entry point: 0x80800000", I attached uboot-spl log for your reference

    We use this  IS43TR16256A-125KBL-TR  RAM chip in our design,and i attached EMIF_RegisterConfiguration spread sheet with updated values for your reference.

    Our RAM memory schematic based on this

    Regards,

    Ravi

    5661.am5718_som_uboot-spl.logEMIF_RegisterConfiguration.xlsm.zip

  • Hello Krunal,

    I awaiting for your replay,.

    Regards,

    Ravi

  • Hi Ravi,

    Based on the text file, could you please confirm the size of u-boot.img(1081408?)? Also, please share the build log of u-boot.

    Regards,
    Krunal
  •  krunal,

    Yes u-boot.img size is "1081480" .

    Please find the attached build log of u-boot.

    For your information same MLO and u-boot.img was booting in AM5718-IDK.

    And Both IDK and custom board is boot through  Micro SDCard.

    Regards,

    Ravi

    4201.uboot_build.log
    CH=arm CROSS_COMPILE=$HOME/ti-processor-sdk-linux-am57xx-evm-05.03.00.07/linux-devkit/sysroots/x86_64-arago-linux/usr/bin/arm-linux-gnueabihf-  V=1
    set -e; : '  CHK     include/config/uboot.release'; mkdir -p include/config/; 	echo "2018.01$(/bin/bash ./scripts/setlocalversion .)" < include/config/auto.conf > include/config/uboot.release.tmp; if [ -r include/config/uboot.release ] && cmp -s include/config/uboot.release include/config/uboot.release.tmp; then rm -f include/config/uboot.release.tmp; else : '  UPD     include/config/uboot.release'; mv -f include/config/uboot.release.tmp include/config/uboot.release; fi
    set -e; : '  CHK     include/generated/version_autogenerated.h'; mkdir -p include/generated/; 	(echo \#define PLAIN_VERSION \"2018.01""-00569-gfd38f5a-dirty\"; echo \#define U_BOOT_VERSION \"U-Boot \" PLAIN_VERSION; echo \#define CC_VERSION_STRING \"$(LC_ALL=C /home/firmware/ti-processor-sdk-linux-am57xx-evm-05.03.00.07/linux-devkit/sysroots/x86_64-arago-linux/usr/bin/arm-linux-gnueabihf-gcc --version | head -n 1)\"; echo \#define LD_VERSION_STRING \"$(LC_ALL=C /home/firmware/ti-processor-sdk-linux-am57xx-evm-05.03.00.07/linux-devkit/sysroots/x86_64-arago-linux/usr/bin/arm-linux-gnueabihf-ld.bfd --version | head -n 1)\"; ) < include/config/uboot.release > include/generated/version_autogenerated.h.tmp; if [ -r include/generated/version_autogenerated.h ] && cmp -s include/generated/version_autogenerated.h include/generated/version_autogenerated.h.tmp; then rm -f include/generated/version_autogenerated.h.tmp; else : '  UPD     include/generated/version_autogenerated.h'; mv -f include/generated/version_autogenerated.h.tmp include/generated/version_autogenerated.h; fi
    set -e; : '  CHK     include/generated/timestamp_autogenerated.h'; mkdir -p include/generated/; 	(if test -n "${SOURCE_DATE_EPOCH}"; then SOURCE_DATE="@${SOURCE_DATE_EPOCH}"; DATE=""; for date in gdate date.gnu date; do ${date} -u -d "${SOURCE_DATE}" >/dev/null 2>&1 && DATE="${date}"; done; if test -n "${DATE}"; then LC_ALL=C ${DATE} -u -d "${SOURCE_DATE}" +'#define U_BOOT_DATE "%b %d %C%y"'; LC_ALL=C ${DATE} -u -d "${SOURCE_DATE}" +'#define U_BOOT_TIME "%T"'; LC_ALL=C ${DATE} -u -d "${SOURCE_DATE}" +'#define U_BOOT_TZ "%z"'; LC_ALL=C ${DATE} -u -d "${SOURCE_DATE}" +'#define U_BOOT_DMI_DATE "%m/%d/%Y"'; LC_ALL=C ${DATE} -u -d "${SOURCE_DATE}" +'#define U_BOOT_BUILD_DATE 0x%Y%m%d'; else return 42; fi; else LC_ALL=C date +'#define U_BOOT_DATE "%b %d %C%y"'; LC_ALL=C date +'#define U_BOOT_TIME "%T"'; LC_ALL=C date +'#define U_BOOT_TZ "%z"'; LC_ALL=C date +'#define U_BOOT_DMI_DATE "%m/%d/%Y"'; LC_ALL=C date +'#define U_BOOT_BUILD_DATE 0x%Y%m%d'; fi) < Makefile > include/generated/timestamp_autogenerated.h.tmp; if [ -r include/generated/timestamp_autogenerated.h ] && cmp -s include/generated/timestamp_autogenerated.h include/generated/timestamp_autogenerated.h.tmp; then rm -f include/generated/timestamp_autogenerated.h.tmp; else : '  UPD     include/generated/timestamp_autogenerated.h'; mv -f include/generated/timestamp_autogenerated.h.tmp include/generated/timestamp_autogenerated.h; fi
    make -f ./scripts/Makefile.build obj=scripts/basic
    rm -f .tmp_quiet_recordmcount
    make -f ./scripts/Makefile.build obj=.
    mkdir -p lib/
    set -e; : '  CHK     include/generated/generic-asm-offsets.h'; mkdir -p include/generated/; 	(set -e; echo "#ifndef __GENERIC_ASM_OFFSETS_H__"; echo "#define __GENERIC_ASM_OFFSETS_H__"; echo "/*"; echo " * DO NOT MODIFY."; echo " *"; echo " * This file was generated by Kbuild"; echo " */"; echo ""; sed -ne 	"s:[[:space:]]*\.ascii[[:space:]]*\"\(.*\)\":\1:; /^->/{s:->#\(.*\):/* \1 */:; s:^->\([^ ]*\) [\$#]*\([-0-9]*\) \(.*\):#define \1 \2 /* \3 */:; s:^->\([^ ]*\) [\$#]*\([^ ]*\) \(.*\):#define \1 \2 /* \3 */:; s:->::; p;}"; echo ""; echo "#endif" ) < lib/asm-offsets.s > include/generated/generic-asm-offsets.h.tmp; if [ -r include/generated/generic-asm-offsets.h ] && cmp -s include/generated/generic-asm-offsets.h include/generated/generic-asm-offsets.h.tmp; then rm -f include/generated/generic-asm-offsets.h.tmp; else : '  UPD     include/generated/generic-asm-offsets.h'; mv -f include/generated/generic-asm-offsets.h.tmp include/generated/generic-asm-offsets.h; fi
    mkdir -p arch/arm/lib/
    set -e; : '  CHK     include/generated/asm-offsets.h'; mkdir -p include/generated/; 	(set -e; echo "#ifndef __ASM_OFFSETS_H__"; echo "#define __ASM_OFFSETS_H__"; echo "/*"; echo " * DO NOT MODIFY."; echo " *"; echo " * This file was generated by Kbuild"; echo " */"; echo ""; sed -ne 	"s:[[:space:]]*\.ascii[[:space:]]*\"\(.*\)\":\1:; /^->/{s:->#\(.*\):/* \1 */:; s:^->\([^ ]*\) [\$#]*\([-0-9]*\) \(.*\):#define \1 \2 /* \3 */:; s:^->\([^ ]*\) [\$#]*\([^ ]*\) \(.*\):#define \1 \2 /* \3 */:; s:->::; p;}"; echo ""; echo "#endif" ) < arch/arm/lib/asm-offsets.s > include/generated/asm-offsets.h.tmp; if [ -r include/generated/asm-offsets.h ] && cmp -s include/generated/asm-offsets.h include/generated/asm-offsets.h.tmp; then rm -f include/generated/asm-offsets.h.tmp; else : '  UPD     include/generated/asm-offsets.h'; mv -f include/generated/asm-offsets.h.tmp include/generated/asm-offsets.h; fi
    make -f ./scripts/Makefile.build obj=scripts
    make -f ./scripts/Makefile.build obj=scripts/dtc
    make -f ./scripts/Makefile.build obj=tools
      cc -Wp,-MD,tools/.mkenvimage.o.d -Wall -Wstrict-prototypes -O2 -fomit-frame-pointer    -include ./include/libfdt_env.h -idirafterinclude -idirafter./arch/arm/include -I./scripts/dtc/libfdt -I./tools -DUSE_HOSTCC -D__KERNEL_STRICT_NAMES -D_GNU_SOURCE  -c -o tools/mkenvimage.o tools/mkenvimage.c
      cc  -o tools/mkenvimage tools/mkenvimage.o tools/os_support.o tools/lib/crc32.o  
      cc -Wp,-MD,tools/.fit_image.o.d -Wall -Wstrict-prototypes -O2 -fomit-frame-pointer    -include ./include/libfdt_env.h -idirafterinclude -idirafter./arch/arm/include -I./scripts/dtc/libfdt -I./tools -DUSE_HOSTCC -D__KERNEL_STRICT_NAMES -D_GNU_SOURCE -DMKIMAGE_DTC=\""dtc"\" -c -o tools/fit_image.o tools/fit_image.c
      cc -Wp,-MD,tools/.image-host.o.d -Wall -Wstrict-prototypes -O2 -fomit-frame-pointer    -include ./include/libfdt_env.h -idirafterinclude -idirafter./arch/arm/include -I./scripts/dtc/libfdt -I./tools -DUSE_HOSTCC -D__KERNEL_STRICT_NAMES -D_GNU_SOURCE  -c -o tools/image-host.o tools/image-host.c
      cc -Wp,-MD,tools/.dumpimage.o.d -Wall -Wstrict-prototypes -O2 -fomit-frame-pointer    -include ./include/libfdt_env.h -idirafterinclude -idirafter./arch/arm/include -I./scripts/dtc/libfdt -I./tools -DUSE_HOSTCC -D__KERNEL_STRICT_NAMES -D_GNU_SOURCE  -c -o tools/dumpimage.o tools/dumpimage.c
      cc  -o tools/dumpimage tools/aisimage.o tools/atmelimage.o tools/common/bootm.o tools/lib/crc32.o tools/default_image.o tools/lib/fdtdec_common.o tools/lib/fdtdec.o tools/fit_common.o tools/fit_image.o tools/common/image-fit.o tools/image-host.o tools/common/image.o tools/imagetool.o tools/imximage.o tools/kwbimage.o tools/lib/md5.o tools/lpc32xximage.o tools/mxsimage.o tools/omapimage.o tools/os_support.o tools/pblimage.o tools/pbl_crc32.o tools/vybridimage.o tools/lib/rc4.o tools/rkcommon.o tools/rkimage.o tools/rksd.o tools/rkspi.o tools/socfpgaimage.o tools/lib/sha1.o tools/lib/sha256.o tools/common/hash.o tools/ublimage.o tools/zynqimage.o tools/zynqmpimage.o tools/libfdt/fdt.o tools/libfdt/fdt_wip.o tools/libfdt/fdt_sw.o tools/libfdt/fdt_strerror.o tools/libfdt/fdt_empty_tree.o tools/libfdt/fdt_addresses.o tools/libfdt/fdt_overlay.o tools/lib/libfdt/fdt_ro.o tools/lib/libfdt/fdt_rw.o tools/lib/libfdt/fdt_region.o tools/gpimage.o tools/gpimage-common.o tools/dumpimage.o  
      cc -Wp,-MD,tools/.mkimage.o.d -Wall -Wstrict-prototypes -O2 -fomit-frame-pointer    -include ./include/libfdt_env.h -idirafterinclude -idirafter./arch/arm/include -I./scripts/dtc/libfdt -I./tools -DUSE_HOSTCC -D__KERNEL_STRICT_NAMES -D_GNU_SOURCE  -c -o tools/mkimage.o tools/mkimage.c
      cc  -o tools/mkimage tools/aisimage.o tools/atmelimage.o tools/common/bootm.o tools/lib/crc32.o tools/default_image.o tools/lib/fdtdec_common.o tools/lib/fdtdec.o tools/fit_common.o tools/fit_image.o tools/common/image-fit.o tools/image-host.o tools/common/image.o tools/imagetool.o tools/imximage.o tools/kwbimage.o tools/lib/md5.o tools/lpc32xximage.o tools/mxsimage.o tools/omapimage.o tools/os_support.o tools/pblimage.o tools/pbl_crc32.o tools/vybridimage.o tools/lib/rc4.o tools/rkcommon.o tools/rkimage.o tools/rksd.o tools/rkspi.o tools/socfpgaimage.o tools/lib/sha1.o tools/lib/sha256.o tools/common/hash.o tools/ublimage.o tools/zynqimage.o tools/zynqmpimage.o tools/libfdt/fdt.o tools/libfdt/fdt_wip.o tools/libfdt/fdt_sw.o tools/libfdt/fdt_strerror.o tools/libfdt/fdt_empty_tree.o tools/libfdt/fdt_addresses.o tools/libfdt/fdt_overlay.o tools/lib/libfdt/fdt_ro.o tools/lib/libfdt/fdt_rw.o tools/lib/libfdt/fdt_region.o tools/gpimage.o tools/gpimage-common.o tools/mkimage.o  
    make -f ./scripts/Makefile.build obj=arch/arm/cpu
    make -f ./scripts/Makefile.build obj=arch/arm/cpu/armv7
    make -f ./scripts/Makefile.build obj=arch/arm/lib
    make -f ./scripts/Makefile.build obj=arch/arm/mach-omap2
    make -f ./scripts/Makefile.build obj=arch/arm/mach-omap2/omap5
    make -f ./scripts/Makefile.build obj=board/ti/am57xx
    make -f ./scripts/Makefile.build obj=board/ti/common
    make -f ./scripts/Makefile.build obj=cmd
      /home/firmware/ti-processor-sdk-linux-am57xx-evm-05.03.00.07/linux-devkit/sysroots/x86_64-arago-linux/usr/bin/arm-linux-gnueabihf-gcc -Wp,-MD,cmd/.version.o.d  -nostdinc -isystem /home/firmware/ti-processor-sdk-linux-am57xx-evm-05.03.00.07/linux-devkit/sysroots/x86_64-arago-linux/usr/bin/../lib/gcc/arm-linux-gnueabihf/7.2.1/include -Iinclude    -I./arch/arm/include -include ./include/linux/kconfig.h -D__KERNEL__ -D__UBOOT__ -Wall -Wstrict-prototypes -Wno-format-security -fno-builtin -ffreestanding -fshort-wchar -Os -fno-stack-protector -fno-delete-null-pointer-checks -g -fstack-usage -Wno-format-nonliteral -Werror=date-time -D__ARM__ -Wa,-mimplicit-it=always -mthumb -mthumb-interwork -mabi=aapcs-linux -mword-relocations -fno-pic -mno-unaligned-access -ffunction-sections -fdata-sections -fno-common -ffixed-r9 -msoft-float -pipe -march=armv7-a -D__LINUX_ARM_ARCH__=7 -I./arch/arm/mach-omap2/include    -D"KBUILD_STR(s)=#s" -D"KBUILD_BASENAME=KBUILD_STR(version)"  -D"KBUILD_MODNAME=KBUILD_STR(version)" -c -o cmd/version.o cmd/version.c
    make -f ./scripts/Makefile.build obj=cmd/ti
       /home/firmware/ti-processor-sdk-linux-am57xx-evm-05.03.00.07/linux-devkit/sysroots/x86_64-arago-linux/usr/bin/arm-linux-gnueabihf-ld.bfd     -r -o cmd/built-in.o cmd/boot.o cmd/bootm.o cmd/help.o cmd/version.o cmd/blk_common.o cmd/source.o cmd/bdinfo.o cmd/bootefi.o cmd/bootz.o cmd/console.o cmd/echo.o cmd/eeprom.o cmd/elf.o cmd/exit.o cmd/ext4.o cmd/ext2.o cmd/fat.o cmd/fdt.o cmd/fs.o cmd/gpio.o cmd/i2c.o cmd/itest.o cmd/load.o cmd/mem.o cmd/mii.o cmd/mdio.o cmd/misc.o cmd/mmc.o cmd/net.o cmd/part.o cmd/pcmcia.o cmd/sf.o cmd/scsi.o cmd/disk.o cmd/spi.o cmd/time.o cmd/test.o cmd/usb.o cmd/fastboot.o cmd/ximg.o cmd/spl.o cmd/dfu.o cmd/gpt.o cmd/regulator.o cmd/nvedit.o cmd/ti/built-in.o 
    make -f ./scripts/Makefile.build obj=common
    make -f ./scripts/Makefile.build obj=common/init
      /home/firmware/ti-processor-sdk-linux-am57xx-evm-05.03.00.07/linux-devkit/sysroots/x86_64-arago-linux/usr/bin/arm-linux-gnueabihf-gcc -Wp,-MD,common/.main.o.d  -nostdinc -isystem /home/firmware/ti-processor-sdk-linux-am57xx-evm-05.03.00.07/linux-devkit/sysroots/x86_64-arago-linux/usr/bin/../lib/gcc/arm-linux-gnueabihf/7.2.1/include -Iinclude    -I./arch/arm/include -include ./include/linux/kconfig.h -D__KERNEL__ -D__UBOOT__ -Wall -Wstrict-prototypes -Wno-format-security -fno-builtin -ffreestanding -fshort-wchar -Os -fno-stack-protector -fno-delete-null-pointer-checks -g -fstack-usage -Wno-format-nonliteral -Werror=date-time -D__ARM__ -Wa,-mimplicit-it=always -mthumb -mthumb-interwork -mabi=aapcs-linux -mword-relocations -fno-pic -mno-unaligned-access -ffunction-sections -fdata-sections -fno-common -ffixed-r9 -msoft-float -pipe -march=armv7-a -D__LINUX_ARM_ARCH__=7 -I./arch/arm/mach-omap2/include    -D"KBUILD_STR(s)=#s" -D"KBUILD_BASENAME=KBUILD_STR(main)"  -D"KBUILD_MODNAME=KBUILD_STR(main)" -c -o common/main.o common/main.c
       /home/firmware/ti-processor-sdk-linux-am57xx-evm-05.03.00.07/linux-devkit/sysroots/x86_64-arago-linux/usr/bin/arm-linux-gnueabihf-ld.bfd     -r -o common/built-in.o common/init/built-in.o common/main.o common/exports.o common/hash.o common/cli_hush.o common/autoboot.o common/board_f.o common/board_r.o common/board_info.o common/bootm.o common/bootm_os.o common/fdt_support.o common/miiphyutil.o common/usb.o common/usb_hub.o common/usb_storage.o common/splash.o common/cli_readline.o common/cli_simple.o common/console.o common/dlmalloc.o common/malloc_simple.o common/image.o common/image-android.o common/image-fdt.o common/image-fit.o common/memsize.o common/stdio.o common/image-sparse.o common/fb_mmc.o common/cli.o common/dfu.o common/command.o common/s_record.o common/xyzModem.o 
    make -f ./scripts/Makefile.build obj=disk
    make -f ./scripts/Makefile.build obj=drivers
    make -f ./scripts/Makefile.build obj=drivers/adc
    make -f ./scripts/Makefile.build obj=drivers/ata
    make -f ./scripts/Makefile.build obj=drivers/block
    make -f ./scripts/Makefile.build obj=drivers/core
    make -f ./scripts/Makefile.build obj=drivers/crypto
    make -f ./scripts/Makefile.build obj=drivers/crypto/fsl
    make -f ./scripts/Makefile.build obj=drivers/crypto/rsa_mod_exp
    make -f ./scripts/Makefile.build obj=drivers/dfu
    make -f ./scripts/Makefile.build obj=drivers/firmware
    make -f ./scripts/Makefile.build obj=drivers/input
    make -f ./scripts/Makefile.build obj=drivers/mailbox
    make -f ./scripts/Makefile.build obj=drivers/memory
    make -f ./scripts/Makefile.build obj=drivers/misc
    make -f ./scripts/Makefile.build obj=drivers/mmc
    make -f ./scripts/Makefile.build obj=drivers/pcmcia
    make -f ./scripts/Makefile.build obj=drivers/phy
    make -f ./scripts/Makefile.build obj=drivers/phy/marvell
    make -f ./scripts/Makefile.build obj=drivers/power/domain
    make -f ./scripts/Makefile.build obj=drivers/pwm
    make -f ./scripts/Makefile.build obj=drivers/reset
    make -f ./scripts/Makefile.build obj=drivers/rtc
    make -f ./scripts/Makefile.build obj=drivers/scsi
    make -f ./scripts/Makefile.build obj=drivers/soc
    make -f ./scripts/Makefile.build obj=drivers/sound
    make -f ./scripts/Makefile.build obj=drivers/spmi
    make -f ./scripts/Makefile.build obj=drivers/sysreset
    make -f ./scripts/Makefile.build obj=drivers/thermal
    make -f ./scripts/Makefile.build obj=drivers/tpm
    make -f ./scripts/Makefile.build obj=drivers/video
    make -f ./scripts/Makefile.build obj=drivers/video/bridge
    make -f ./scripts/Makefile.build obj=drivers/video/sunxi
    make -f ./scripts/Makefile.build obj=drivers/watchdog
    make -f ./scripts/Makefile.build obj=drivers/dma
    make -f ./scripts/Makefile.build obj=drivers/dma/ti
    make -f ./scripts/Makefile.build obj=drivers/gpio
    make -f ./scripts/Makefile.build obj=drivers/i2c
    make -f ./scripts/Makefile.build obj=drivers/mtd
    make -f ./scripts/Makefile.build obj=drivers/mtd/onenand
    make -f ./scripts/Makefile.build obj=drivers/mtd/spi
    make -f ./scripts/Makefile.build obj=drivers/net
    make -f ./scripts/Makefile.build obj=drivers/net/phy
    make -f ./scripts/Makefile.build obj=drivers/pci
    make -f ./scripts/Makefile.build obj=drivers/power
    make -f ./scripts/Makefile.build obj=drivers/power/battery
    make -f ./scripts/Makefile.build obj=drivers/power/fuel_gauge
    make -f ./scripts/Makefile.build obj=drivers/power/mfd
    make -f ./scripts/Makefile.build obj=drivers/power/pmic
    make -f ./scripts/Makefile.build obj=drivers/power/regulator
    make -f ./scripts/Makefile.build obj=drivers/serial
    make -f ./scripts/Makefile.build obj=drivers/spi
    make -f ./scripts/Makefile.build obj=drivers/usb/common
    make -f ./scripts/Makefile.build obj=drivers/usb/dwc3
    make -f ./scripts/Makefile.build obj=drivers/usb/emul
    make -f ./scripts/Makefile.build obj=drivers/usb/eth
    make -f ./scripts/Makefile.build obj=drivers/usb/gadget
      /home/firmware/ti-processor-sdk-linux-am57xx-evm-05.03.00.07/linux-devkit/sysroots/x86_64-arago-linux/usr/bin/arm-linux-gnueabihf-gcc -Wp,-MD,drivers/usb/gadget/.f_fastboot.o.d  -nostdinc -isystem /home/firmware/ti-processor-sdk-linux-am57xx-evm-05.03.00.07/linux-devkit/sysroots/x86_64-arago-linux/usr/bin/../lib/gcc/arm-linux-gnueabihf/7.2.1/include -Iinclude    -I./arch/arm/include -include ./include/linux/kconfig.h -D__KERNEL__ -D__UBOOT__ -Wall -Wstrict-prototypes -Wno-format-security -fno-builtin -ffreestanding -fshort-wchar -Os -fno-stack-protector -fno-delete-null-pointer-checks -g -fstack-usage -Wno-format-nonliteral -Werror=date-time -D__ARM__ -Wa,-mimplicit-it=always -mthumb -mthumb-interwork -mabi=aapcs-linux -mword-relocations -fno-pic -mno-unaligned-access -ffunction-sections -fdata-sections -fno-common -ffixed-r9 -msoft-float -pipe -march=armv7-a -D__LINUX_ARM_ARCH__=7 -I./arch/arm/mach-omap2/include    -D"KBUILD_STR(s)=#s" -D"KBUILD_BASENAME=KBUILD_STR(f_fastboot)"  -D"KBUILD_MODNAME=KBUILD_STR(f_fastboot)" -c -o drivers/usb/gadget/f_fastboot.o drivers/usb/gadget/f_fastboot.c
       /home/firmware/ti-processor-sdk-linux-am57xx-evm-05.03.00.07/linux-devkit/sysroots/x86_64-arago-linux/usr/bin/arm-linux-gnueabihf-ld.bfd     -r -o drivers/usb/gadget/built-in.o drivers/usb/gadget/epautoconf.o drivers/usb/gadget/config.o drivers/usb/gadget/usbstring.o drivers/usb/gadget/g_dnl.o drivers/usb/gadget/f_dfu.o drivers/usb/gadget/f_fastboot.o 
    make -f ./scripts/Makefile.build obj=drivers/usb/gadget/udc
    make -f ./scripts/Makefile.build obj=drivers/usb/host
    make -f ./scripts/Makefile.build obj=drivers/usb/musb-new
    make -f ./scripts/Makefile.build obj=drivers/usb/musb
    make -f ./scripts/Makefile.build obj=drivers/usb/phy
    make -f ./scripts/Makefile.build obj=drivers/usb/ulpi
    make -f ./scripts/Makefile.build obj=env
    make -f ./scripts/Makefile.build obj=fs
    make -f ./scripts/Makefile.build obj=fs/ext4
    make -f ./scripts/Makefile.build obj=fs/fat
    make -f ./scripts/Makefile.build obj=lib
    make -f ./scripts/Makefile.build obj=lib/efi_loader
      /home/firmware/ti-processor-sdk-linux-am57xx-evm-05.03.00.07/linux-devkit/sysroots/x86_64-arago-linux/usr/bin/arm-linux-gnueabihf-gcc -Wp,-MD,lib/efi_loader/.helloworld.o.d  -nostdinc -isystem /home/firmware/ti-processor-sdk-linux-am57xx-evm-05.03.00.07/linux-devkit/sysroots/x86_64-arago-linux/usr/bin/../lib/gcc/arm-linux-gnueabihf/7.2.1/include -Iinclude    -I./arch/arm/include -include ./include/linux/kconfig.h -D__KERNEL__ -D__UBOOT__ -Wall -Wstrict-prototypes -Wno-format-security -fno-builtin -ffreestanding -fshort-wchar -fno-stack-protector -fno-delete-null-pointer-checks -g -fstack-usage -Wno-format-nonliteral -Werror=date-time -D__ARM__ -Wa,-mimplicit-it=always -mthumb -mthumb-interwork -mabi=aapcs-linux -mword-relocations -mno-unaligned-access -fno-common -msoft-float -pipe -march=armv7-a -D__LINUX_ARM_ARCH__=7 -I./arch/arm/mach-omap2/include -fpic -fshort-wchar -ffreestanding    -D"KBUILD_STR(s)=#s" -D"KBUILD_BASENAME=KBUILD_STR(helloworld)"  -D"KBUILD_MODNAME=KBUILD_STR(helloworld)" -c -o lib/efi_loader/helloworld.o lib/efi_loader/helloworld.c
      /home/firmware/ti-processor-sdk-linux-am57xx-evm-05.03.00.07/linux-devkit/sysroots/x86_64-arago-linux/usr/bin/arm-linux-gnueabihf-ld.bfd -nostdlib -znocombreloc -T ./arch/arm/lib/elf_arm_efi.lds -shared -Bsymbolic lib/efi_loader/helloworld.o arch/arm/lib/crt0_arm_efi.o arch/arm/lib/reloc_arm_efi.o -o lib/efi_loader/helloworld_efi.so
      /home/firmware/ti-processor-sdk-linux-am57xx-evm-05.03.00.07/linux-devkit/sysroots/x86_64-arago-linux/usr/bin/arm-linux-gnueabihf-objcopy -j .header -j .text -j .sdata -j .data -j .dynamic -j .dynsym  -j .rel* -j .rela* -j .reloc -O binary lib/efi_loader/helloworld_efi.so lib/efi_loader/helloworld.efi
    rm lib/efi_loader/helloworld_efi.so lib/efi_loader/helloworld.o
    make -f ./scripts/Makefile.build obj=lib/efi_selftest
    make -f ./scripts/Makefile.build obj=lib/libfdt
    make -f ./scripts/Makefile.build obj=lib/zlib
      /home/firmware/ti-processor-sdk-linux-am57xx-evm-05.03.00.07/linux-devkit/sysroots/x86_64-arago-linux/usr/bin/arm-linux-gnueabihf-gcc -Wp,-MD,lib/.smbios.o.d  -nostdinc -isystem /home/firmware/ti-processor-sdk-linux-am57xx-evm-05.03.00.07/linux-devkit/sysroots/x86_64-arago-linux/usr/bin/../lib/gcc/arm-linux-gnueabihf/7.2.1/include -Iinclude    -I./arch/arm/include -include ./include/linux/kconfig.h -D__KERNEL__ -D__UBOOT__ -Wall -Wstrict-prototypes -Wno-format-security -fno-builtin -ffreestanding -fshort-wchar -Os -fno-stack-protector -fno-delete-null-pointer-checks -g -fstack-usage -Wno-format-nonliteral -Werror=date-time -D__ARM__ -Wa,-mimplicit-it=always -mthumb -mthumb-interwork -mabi=aapcs-linux -mword-relocations -fno-pic -mno-unaligned-access -ffunction-sections -fdata-sections -fno-common -ffixed-r9 -msoft-float -pipe -march=armv7-a -D__LINUX_ARM_ARCH__=7 -I./arch/arm/mach-omap2/include    -D"KBUILD_STR(s)=#s" -D"KBUILD_BASENAME=KBUILD_STR(smbios)"  -D"KBUILD_MODNAME=KBUILD_STR(smbios)" -c -o lib/smbios.o lib/smbios.c
      /home/firmware/ti-processor-sdk-linux-am57xx-evm-05.03.00.07/linux-devkit/sysroots/x86_64-arago-linux/usr/bin/arm-linux-gnueabihf-gcc -Wp,-MD,lib/.display_options.o.d  -nostdinc -isystem /home/firmware/ti-processor-sdk-linux-am57xx-evm-05.03.00.07/linux-devkit/sysroots/x86_64-arago-linux/usr/bin/../lib/gcc/arm-linux-gnueabihf/7.2.1/include -Iinclude    -I./arch/arm/include -include ./include/linux/kconfig.h -D__KERNEL__ -D__UBOOT__ -Wall -Wstrict-prototypes -Wno-format-security -fno-builtin -ffreestanding -fshort-wchar -Os -fno-stack-protector -fno-delete-null-pointer-checks -g -fstack-usage -Wno-format-nonliteral -Werror=date-time -D__ARM__ -Wa,-mimplicit-it=always -mthumb -mthumb-interwork -mabi=aapcs-linux -mword-relocations -fno-pic -mno-unaligned-access -ffunction-sections -fdata-sections -fno-common -ffixed-r9 -msoft-float -pipe -march=armv7-a -D__LINUX_ARM_ARCH__=7 -I./arch/arm/mach-omap2/include    -D"KBUILD_STR(s)=#s" -D"KBUILD_BASENAME=KBUILD_STR(display_options)"  -D"KBUILD_MODNAME=KBUILD_STR(display_options)" -c -o lib/display_options.o lib/display_options.c
       /home/firmware/ti-processor-sdk-linux-am57xx-evm-05.03.00.07/linux-devkit/sysroots/x86_64-arago-linux/usr/bin/arm-linux-gnueabihf-ld.bfd     -r -o lib/built-in.o lib/efi_loader/built-in.o lib/efi_selftest/built-in.o lib/libfdt/built-in.o lib/charset.o lib/crc7.o lib/crc8.o lib/crc16.o lib/fdtdec_common.o lib/smbios.o lib/initcall.o lib/lmb.o lib/ldiv.o lib/md5.o lib/net_utils.o lib/qsort.o lib/rc4.o lib/list_sort.o lib/sha1.o lib/sha256.o lib/zlib/built-in.o lib/gunzip.o lib/fdtdec.o lib/hashtable.o lib/errno.o lib/display_options.o lib/crc32.o lib/ctype.o lib/div64.o lib/hang.o lib/linux_compat.o lib/linux_string.o lib/membuff.o lib/slre.o lib/string.o lib/tables_csum.o lib/time.o lib/uuid.o lib/rand.o lib/vsprintf.o lib/panic.o lib/strto.o lib/strmhz.o 
    make -f ./scripts/Makefile.build obj=net
    make -f ./scripts/Makefile.build obj=test
    make -f ./scripts/Makefile.build obj=test/dm
    make -f ./scripts/Makefile.build obj=examples
    make -f ./scripts/Makefile.build obj=examples/standalone
      /home/firmware/ti-processor-sdk-linux-am57xx-evm-05.03.00.07/linux-devkit/sysroots/x86_64-arago-linux/usr/bin/arm-linux-gnueabihf-ld.bfd   -pie  --gc-sections -Bstatic  --no-dynamic-linker -Ttext 0x80800000 -o u-boot -T u-boot.lds arch/arm/cpu/armv7/start.o --start-group  arch/arm/cpu/built-in.o  arch/arm/cpu/armv7/built-in.o  arch/arm/lib/built-in.o  arch/arm/mach-omap2/built-in.o  board/ti/am57xx/built-in.o  board/ti/common/built-in.o  cmd/built-in.o  common/built-in.o  disk/built-in.o  drivers/built-in.o  drivers/dma/built-in.o  drivers/gpio/built-in.o  drivers/i2c/built-in.o  drivers/mtd/built-in.o  drivers/mtd/onenand/built-in.o  drivers/mtd/spi/built-in.o  drivers/net/built-in.o  drivers/net/phy/built-in.o  drivers/pci/built-in.o  drivers/power/built-in.o  drivers/power/battery/built-in.o  drivers/power/fuel_gauge/built-in.o  drivers/power/mfd/built-in.o  drivers/power/pmic/built-in.o  drivers/power/regulator/built-in.o  drivers/serial/built-in.o  drivers/spi/built-in.o  drivers/usb/common/built-in.o  drivers/usb/dwc3/built-in.o  drivers/usb/emul/built-in.o  drivers/usb/eth/built-in.o  drivers/usb/gadget/built-in.o  drivers/usb/gadget/udc/built-in.o  drivers/usb/host/built-in.o  drivers/usb/musb-new/built-in.o  drivers/usb/musb/built-in.o  drivers/usb/phy/built-in.o  drivers/usb/ulpi/built-in.o  env/built-in.o  fs/built-in.o  lib/built-in.o  net/built-in.o  test/built-in.o  test/dm/built-in.o --end-group arch/arm/lib/eabi_compat.o  arch/arm/lib/lib.a -Map u-boot.map;  true
      /home/firmware/ti-processor-sdk-linux-am57xx-evm-05.03.00.07/linux-devkit/sysroots/x86_64-arago-linux/usr/bin/arm-linux-gnueabihf-objcopy --gap-fill=0xff  -j .text -j .secure_text -j .secure_data -j .rodata -j .hash -j .data -j .got -j .got.plt -j .u_boot_list -j .rel.dyn -j .binman_sym_table -j .dtb.init.rodata -j .efi_runtime -j .efi_runtime_rel -O binary  u-boot u-boot-nodtb.bin
    make -f ./scripts/Makefile.build obj=dts dtbs
    make -f ./scripts/Makefile.build obj=arch/arm/dts dtbs
    make -f ./scripts/Makefile.build obj=arch/arm/dts arch/arm/dts/am572x-idk.dtb
    make[2]: 'arch/arm/dts/am572x-idk.dtb' is up to date.
    test -e arch/arm/dts/am572x-idk.dtb || (						\
    echo >&2;							\
    echo >&2 "Device Tree Source is not correctly specified.";	\
    echo >&2 "Please define 'CONFIG_DEFAULT_DEVICE_TREE'";		\
    echo >&2 "or build with 'DEVICE_TREE=<device_tree>' argument";	\
    echo >&2;							\
    /bin/false)
      ./tools/mkimage -f auto -A arm -T firmware -C none -O u-boot -a 0x80800000 -e 0 -n "U-Boot 2018.01""-00569-gfd38f5a-dirty for am57xx board" -E -b arch/arm/dts/am57xx-beagle-x15.dtb -b arch/arm/dts/am57xx-beagle-x15-revb1.dtb -b arch/arm/dts/am57xx-beagle-x15-revc.dtb -b arch/arm/dts/am572x-idk.dtb -b arch/arm/dts/am571x-idk.dtb -b arch/arm/dts/am574x-idk.dtb -d u-boot-nodtb.bin u-boot.img 
    FIT description: Firmware image with one or more FDT blobs
    Created:         Tue May  7 07:45:02 2019
     Image 0 (firmware@1)
      Description:  U-Boot 2018.01-00569-gfd38f5a-dirty for am57xx board
      Created:      Tue May  7 07:45:02 2019
      Type:         Firmware
      Compression:  uncompressed
      Data Size:    unavailable
      Architecture: ARM
      Load Address: 0x80800000
     Image 1 (fdt@1)
      Description:  am57xx-beagle-x15
      Created:      Tue May  7 07:45:02 2019
      Type:         Firmware
      Compression:  uncompressed
      Data Size:    unavailable
      Architecture: ARM
      Load Address: unavailable
     Image 2 (fdt@2)
      Description:  am57xx-beagle-x15-revb1
      Created:      Tue May  7 07:45:02 2019
      Type:         Firmware
      Compression:  uncompressed
      Data Size:    unavailable
      Architecture: ARM
      Load Address: unavailable
     Image 3 (fdt@3)
      Description:  am57xx-beagle-x15-revc
      Created:      Tue May  7 07:45:02 2019
      Type:         Firmware
      Compression:  uncompressed
      Data Size:    unavailable
      Architecture: ARM
      Load Address: unavailable
     Image 4 (fdt@4)
      Description:  am572x-idk
      Created:      Tue May  7 07:45:02 2019
      Type:         Firmware
      Compression:  uncompressed
      Data Size:    unavailable
      Architecture: ARM
      Load Address: unavailable
     Image 5 (fdt@5)
      Description:  am571x-idk
      Created:      Tue May  7 07:45:02 2019
      Type:         Firmware
      Compression:  uncompressed
      Data Size:    unavailable
      Architecture: ARM
      Load Address: unavailable
     Image 6 (fdt@6)
      Description:  am574x-idk
      Created:      Tue May  7 07:45:02 2019
      Type:         Firmware
      Compression:  uncompressed
      Data Size:    unavailable
      Architecture: ARM
      Load Address: unavailable
     Default Configuration: 'conf@1'
     Configuration 0 (conf@1)
      Description:  am57xx-beagle-x15
      Kernel:       unavailable
      FDT:          fdt@1
     Configuration 1 (conf@2)
      Description:  am57xx-beagle-x15-revb1
      Kernel:       unavailable
      FDT:          fdt@2
     Configuration 2 (conf@3)
      Description:  am57xx-beagle-x15-revc
      Kernel:       unavailable
      FDT:          fdt@3
     Configuration 3 (conf@4)
      Description:  am572x-idk
      Kernel:       unavailable
      FDT:          fdt@4
     Configuration 4 (conf@5)
      Description:  am571x-idk
      Kernel:       unavailable
      FDT:          fdt@5
     Configuration 5 (conf@6)
      Description:  am574x-idk
      Kernel:       unavailable
      FDT:          fdt@6
      /home/firmware/ti-processor-sdk-linux-am57xx-evm-05.03.00.07/linux-devkit/sysroots/x86_64-arago-linux/usr/bin/arm-linux-gnueabihf-objcopy --gap-fill=0xff  -j .text -j .secure_text -j .secure_data -j .rodata -j .hash -j .data -j .got -j .got.plt -j .u_boot_list -j .rel.dyn -j .binman_sym_table -j .dtb.init.rodata -j .efi_runtime -j .efi_runtime_rel -O srec u-boot u-boot.srec
      cat u-boot-nodtb.bin dts/dt.dtb > u-boot-dtb.bin
      cp u-boot-dtb.bin u-boot.bin
      /home/firmware/ti-processor-sdk-linux-am57xx-evm-05.03.00.07/linux-devkit/sysroots/x86_64-arago-linux/usr/bin/arm-linux-gnueabihf-objdump -t u-boot > u-boot.sym
    make obj=spl -f ./scripts/Makefile.spl all
    make -f ./scripts/Makefile.build obj=spl/arch/arm/mach-omap2
    make -f ./scripts/Makefile.build obj=spl/arch/arm/mach-omap2/omap5
    make -f ./scripts/Makefile.build obj=spl/arch/arm/cpu/armv7
    make -f ./scripts/Makefile.build obj=spl/arch/arm/cpu
    make -f ./scripts/Makefile.build obj=spl/arch/arm/lib
    make -f ./scripts/Makefile.build obj=spl/board/ti/am57xx
    make -f ./scripts/Makefile.build obj=spl/board/ti/common
    make -f ./scripts/Makefile.build obj=spl/common/spl
      /home/firmware/ti-processor-sdk-linux-am57xx-evm-05.03.00.07/linux-devkit/sysroots/x86_64-arago-linux/usr/bin/arm-linux-gnueabihf-gcc -Wp,-MD,spl/common/spl/.spl.o.d  -nostdinc -isystem /home/firmware/ti-processor-sdk-linux-am57xx-evm-05.03.00.07/linux-devkit/sysroots/x86_64-arago-linux/usr/bin/../lib/gcc/arm-linux-gnueabihf/7.2.1/include -Iinclude    -I./arch/arm/include -include ./include/linux/kconfig.h -D__KERNEL__ -D__UBOOT__ -DCONFIG_SPL_BUILD -Wall -Wstrict-prototypes -Wno-format-security -fno-builtin -ffreestanding -fshort-wchar -Os -fno-stack-protector -fno-delete-null-pointer-checks -g -fstack-usage -Wno-format-nonliteral -Werror=date-time -ffunction-sections -fdata-sections -D__ARM__ -Wa,-mimplicit-it=always -mthumb -mthumb-interwork -mabi=aapcs-linux -mno-unaligned-access -ffunction-sections -fdata-sections -fno-common -ffixed-r9 -msoft-float -pipe -march=armv7-a -D__LINUX_ARM_ARCH__=7 -I./arch/arm/mach-omap2/include    -D"KBUILD_STR(s)=#s" -D"KBUILD_BASENAME=KBUILD_STR(spl)"  -D"KBUILD_MODNAME=KBUILD_STR(spl)" -c -o spl/common/spl/spl.o common/spl/spl.c
       /home/firmware/ti-processor-sdk-linux-am57xx-evm-05.03.00.07/linux-devkit/sysroots/x86_64-arago-linux/usr/bin/arm-linux-gnueabihf-ld.bfd     -r -o spl/common/spl/built-in.o spl/common/spl/spl.o spl/common/spl/spl_fit.o spl/common/spl/spl_mmc.o spl/common/spl/spl_fat.o spl/common/spl/spl_ext.o spl/common/spl/spl_spi.o 
    make -f ./scripts/Makefile.build obj=spl/common/init
    make -f ./scripts/Makefile.build obj=spl/common
    make -f ./scripts/Makefile.build obj=spl/cmd
    make -f ./scripts/Makefile.build obj=spl/cmd/ti
    make -f ./scripts/Makefile.build obj=spl/env
    make -f ./scripts/Makefile.build obj=spl/lib
    make -f ./scripts/Makefile.build obj=spl/lib/libfdt
      /home/firmware/ti-processor-sdk-linux-am57xx-evm-05.03.00.07/linux-devkit/sysroots/x86_64-arago-linux/usr/bin/arm-linux-gnueabihf-gcc -Wp,-MD,spl/lib/.display_options.o.d  -nostdinc -isystem /home/firmware/ti-processor-sdk-linux-am57xx-evm-05.03.00.07/linux-devkit/sysroots/x86_64-arago-linux/usr/bin/../lib/gcc/arm-linux-gnueabihf/7.2.1/include -Iinclude    -I./arch/arm/include -include ./include/linux/kconfig.h -D__KERNEL__ -D__UBOOT__ -DCONFIG_SPL_BUILD -Wall -Wstrict-prototypes -Wno-format-security -fno-builtin -ffreestanding -fshort-wchar -Os -fno-stack-protector -fno-delete-null-pointer-checks -g -fstack-usage -Wno-format-nonliteral -Werror=date-time -ffunction-sections -fdata-sections -D__ARM__ -Wa,-mimplicit-it=always -mthumb -mthumb-interwork -mabi=aapcs-linux -mno-unaligned-access -ffunction-sections -fdata-sections -fno-common -ffixed-r9 -msoft-float -pipe -march=armv7-a -D__LINUX_ARM_ARCH__=7 -I./arch/arm/mach-omap2/include    -D"KBUILD_STR(s)=#s" -D"KBUILD_BASENAME=KBUILD_STR(display_options)"  -D"KBUILD_MODNAME=KBUILD_STR(display_options)" -c -o spl/lib/display_options.o lib/display_options.c
       /home/firmware/ti-processor-sdk-linux-am57xx-evm-05.03.00.07/linux-devkit/sysroots/x86_64-arago-linux/usr/bin/arm-linux-gnueabihf-ld.bfd     -r -o spl/lib/built-in.o spl/lib/sha1.o spl/lib/sha256.o spl/lib/libfdt/built-in.o spl/lib/fdtdec_common.o spl/lib/fdtdec.o spl/lib/hashtable.o spl/lib/errno.o spl/lib/display_options.o spl/lib/crc32.o spl/lib/ctype.o spl/lib/div64.o spl/lib/hang.o spl/lib/linux_compat.o spl/lib/linux_string.o spl/lib/membuff.o spl/lib/slre.o spl/lib/string.o spl/lib/tables_csum.o spl/lib/time.o spl/lib/uuid.o spl/lib/rand.o spl/lib/vsprintf.o spl/lib/panic.o spl/lib/strto.o spl/lib/strmhz.o 
    make -f ./scripts/Makefile.build obj=spl/disk
    make -f ./scripts/Makefile.build obj=spl/drivers
    make -f ./scripts/Makefile.build obj=spl/drivers/block
    make -f ./scripts/Makefile.build obj=spl/drivers/core
    make -f ./scripts/Makefile.build obj=spl/drivers/dma
    make -f ./scripts/Makefile.build obj=spl/drivers/dma/ti
    make -f ./scripts/Makefile.build obj=spl/drivers/gpio
    make -f ./scripts/Makefile.build obj=spl/drivers/i2c
    make -f ./scripts/Makefile.build obj=spl/drivers/mmc
    make -f ./scripts/Makefile.build obj=spl/drivers/mtd/spi
    make -f ./scripts/Makefile.build obj=spl/drivers/power
    make -f ./scripts/Makefile.build obj=spl/drivers/power/pmic
    make -f ./scripts/Makefile.build obj=spl/drivers/power/regulator
    make -f ./scripts/Makefile.build obj=spl/drivers/serial
    make -f ./scripts/Makefile.build obj=spl/drivers/spi
    make -f ./scripts/Makefile.build obj=spl/drivers/thermal
    make -f ./scripts/Makefile.build obj=spl/drivers/usb/phy
    make -f ./scripts/Makefile.build obj=spl/dts
    make -f ./scripts/Makefile.build obj=spl/fs
    make -f ./scripts/Makefile.build obj=spl/fs/ext4
    make -f ./scripts/Makefile.build obj=spl/fs/fat
      (cd spl && /home/firmware/ti-processor-sdk-linux-am57xx-evm-05.03.00.07/linux-devkit/sysroots/x86_64-arago-linux/usr/bin/arm-linux-gnueabihf-ld.bfd   -T u-boot-spl.lds  --gc-sections -Bstatic --gc-sections  --no-dynamic-linker -Ttext 0x40300000 arch/arm/cpu/armv7/start.o --start-group arch/arm/mach-omap2/built-in.o arch/arm/cpu/armv7/built-in.o arch/arm/cpu/built-in.o arch/arm/lib/built-in.o board/ti/am57xx/built-in.o board/ti/common/built-in.o common/spl/built-in.o common/init/built-in.o common/built-in.o cmd/built-in.o env/built-in.o lib/built-in.o disk/built-in.o drivers/built-in.o dts/built-in.o fs/built-in.o  --end-group arch/arm/lib/eabi_compat.o arch/arm/lib/lib.a -Map u-boot-spl.map -o u-boot-spl)
      /home/firmware/ti-processor-sdk-linux-am57xx-evm-05.03.00.07/linux-devkit/sysroots/x86_64-arago-linux/usr/bin/arm-linux-gnueabihf-objcopy  -j .text -j .secure_text -j .secure_data -j .rodata -j .hash -j .data -j .got -j .got.plt -j .u_boot_list -j .rel.dyn -j .binman_sym_table -j .dtb.init.rodata -j .efi_runtime -j .efi_runtime_rel  -O binary  spl/u-boot-spl spl/u-boot-spl-nodtb.bin
      cat spl/u-boot-spl-nodtb.bin spl/u-boot-spl.dtb > spl/u-boot-spl-dtb.bin
      cp spl/u-boot-spl-dtb.bin spl/u-boot-spl.bin
      ./tools/mkimage -T omapimage -a 0x40300000 -d spl/u-boot-spl.bin MLO 
    Section CHSETTINGS offset 40 length c
    CHSETTINGS (c0c0c0c1) valid:0 version:1 reserved:0 flags:0
    GP Header: Size 1b39a LoadAddr 40300000
      ./tools/mkimage -f auto -A arm -T firmware -C none -O u-boot -a 0x80800000 -e 0 -n "U-Boot 2018.01""-00569-gfd38f5a-dirty for am57xx board" -E -b arch/arm/dts/am57xx-beagle-x15.dtb -b arch/arm/dts/am57xx-beagle-x15-revb1.dtb -b arch/arm/dts/am57xx-beagle-x15-revc.dtb -b arch/arm/dts/am572x-idk.dtb -b arch/arm/dts/am571x-idk.dtb -b arch/arm/dts/am574x-idk.dtb -d u-boot-nodtb.bin u-boot-dtb.img 
    FIT description: Firmware image with one or more FDT blobs
    Created:         Tue May  7 07:45:03 2019
     Image 0 (firmware@1)
      Description:  U-Boot 2018.01-00569-gfd38f5a-dirty for am57xx board
      Created:      Tue May  7 07:45:03 2019
      Type:         Firmware
      Compression:  uncompressed
      Data Size:    unavailable
      Architecture: ARM
      Load Address: 0x80800000
     Image 1 (fdt@1)
      Description:  am57xx-beagle-x15
      Created:      Tue May  7 07:45:03 2019
      Type:         Firmware
      Compression:  uncompressed
      Data Size:    unavailable
      Architecture: ARM
      Load Address: unavailable
     Image 2 (fdt@2)
      Description:  am57xx-beagle-x15-revb1
      Created:      Tue May  7 07:45:03 2019
      Type:         Firmware
      Compression:  uncompressed
      Data Size:    unavailable
      Architecture: ARM
      Load Address: unavailable
     Image 3 (fdt@3)
      Description:  am57xx-beagle-x15-revc
      Created:      Tue May  7 07:45:03 2019
      Type:         Firmware
      Compression:  uncompressed
      Data Size:    unavailable
      Architecture: ARM
      Load Address: unavailable
     Image 4 (fdt@4)
      Description:  am572x-idk
      Created:      Tue May  7 07:45:03 2019
      Type:         Firmware
      Compression:  uncompressed
      Data Size:    unavailable
      Architecture: ARM
      Load Address: unavailable
     Image 5 (fdt@5)
      Description:  am571x-idk
      Created:      Tue May  7 07:45:03 2019
      Type:         Firmware
      Compression:  uncompressed
      Data Size:    unavailable
      Architecture: ARM
      Load Address: unavailable
     Image 6 (fdt@6)
      Description:  am574x-idk
      Created:      Tue May  7 07:45:03 2019
      Type:         Firmware
      Compression:  uncompressed
      Data Size:    unavailable
      Architecture: ARM
      Load Address: unavailable
     Default Configuration: 'conf@1'
     Configuration 0 (conf@1)
      Description:  am57xx-beagle-x15
      Kernel:       unavailable
      FDT:          fdt@1
     Configuration 1 (conf@2)
      Description:  am57xx-beagle-x15-revb1
      Kernel:       unavailable
      FDT:          fdt@2
     Configuration 2 (conf@3)
      Description:  am57xx-beagle-x15-revc
      Kernel:       unavailable
      FDT:          fdt@3
     Configuration 3 (conf@4)
      Description:  am572x-idk
      Kernel:       unavailable
      FDT:          fdt@4
     Configuration 4 (conf@5)
      Description:  am571x-idk
      Kernel:       unavailable
      FDT:          fdt@5
     Configuration 5 (conf@6)
      Description:  am574x-idk
      Kernel:       unavailable
      FDT:          fdt@6
    make -f ./scripts/Makefile.autoconf u-boot.cfg
    if [ -d arch/arm/mach-omap5/include/mach ]; then	\
    	dest=../../mach-omap5/include/mach;			\
    else								\
    	dest=arch-omap5;			\
    fi;								\
    ln -fsn $dest arch/arm/include/asm/arch
    set -e; : '  CHK     include/config.h'; mkdir -p include/; 	(echo "/* Automatically generated - do not edit */"; for i in $(echo "" | sed 's/,/ /g'); do echo \#define CONFIG_$i | sed '/=/ {s/=/	/;q; } ; { s/$/	1/; }'; done; echo \#define CONFIG_BOARDDIR board/ti/am57xx; echo \#include \<config_defaults.h\>; echo \#include \<config_uncmd_spl.h\>; echo \#include \<configs/"am57xx_evm".h\>; echo \#include \<asm/config.h\>; echo \#include \<linux/kconfig.h\>; echo \#include \<config_fallbacks.h\>;) < scripts/Makefile.autoconf > include/config.h.tmp; if [ -r include/config.h ] && cmp -s include/config.h include/config.h.tmp; then rm -f include/config.h.tmp; else : '  UPD     include/config.h'; mv -f include/config.h.tmp include/config.h; fi
      /home/firmware/ti-processor-sdk-linux-am57xx-evm-05.03.00.07/linux-devkit/sysroots/x86_64-arago-linux/usr/bin/arm-linux-gnueabihf-gcc -E -Wall -Wstrict-prototypes -Wno-format-security -fno-builtin -ffreestanding -fshort-wchar -Os -fno-stack-protector -fno-delete-null-pointer-checks -g -fstack-usage -Wno-format-nonliteral -Werror=date-time  -D__KERNEL__ -D__UBOOT__   -D__ARM__ -Wa,-mimplicit-it=always  -mthumb -mthumb-interwork  -mabi=aapcs-linux  -mword-relocations  -fno-pic  -mno-unaligned-access  -ffunction-sections -fdata-sections -fno-common -ffixed-r9  -msoft-float   -pipe -Iinclude  -I./arch/arm/include -include ./include/linux/kconfig.h  -nostdinc -isystem /home/firmware/ti-processor-sdk-linux-am57xx-evm-05.03.00.07/linux-devkit/sysroots/x86_64-arago-linux/usr/bin/../lib/gcc/arm-linux-gnueabihf/7.2.1/include  -DDO_DEPS_ONLY -dM ./include/common.h > u-boot.cfg.tmp && { grep 'define CONFIG_' u-boot.cfg.tmp > u-boot.cfg; rm u-boot.cfg.tmp; } || { rm u-boot.cfg.tmp; false; }
    ===================== WARNING ======================
    This board uses CONFIG_DM_I2C_COMPAT. Please remove
    (possibly in a subsequent patch in your series)
    before sending patches to the mailing list.
    ====================================================
      ./scripts/check-config.sh u-boot.cfg ./scripts/config_whitelist.txt .
    
    

  • Hi Ravi,

    After the board fails to boot from SD card, could you please connect your board to CCS using a JTAG connector.?Without loading any GEL files, please open a memory browser and see if you are able to read/write to a DDR memory location. Also, if you refresh the DDR memory addresses, are you observing the values to be constantly changing?

    Regards,
    Krunal
  • Hello Krunal,

    I followed as per your instruction,I can read/write RAM address above 0x80800000 

    But I noticed all value in RAM address are stable, it's not changing. 

    Regards

    Ravi

  • Hi Ravi,

    Could you please run the am57xx-ddr.dss from the following link: http://git.ti.com/sitara-dss-files/am57xx-dss-files/trees/master. There is a README file that contains the necessary information on how to run the am57xx-ddr.dss. After running the test, please share the output results with me.

    Regards,

    Krunal

  • Hello krunal,

    Pleas find output resust after run the am57-ddr.dss.

    am57xx-ddr_2019-05-09_104547.txt
    ********************** DPLL_DDR **********************
    
    CTRL_CORE_BOOTSTRAP = 0x00008122
      * SPEEDSELECT = 20 MHz
    CM_CLKSEL_DPLL_DDR = 0x00014d04
      * DPLL_MULT = 333 (x333)
      * DPLL_DIV = 4 (/5)
    CM_DIV_M2_DPLL_DDR = 0x00000202
      * CLKST = 1: M2 output clock enabled
      * DIVHS = 2 (/2)
    CM_DIV_H11_DPLL_DDR = 0x00000208
      * CLKST = 1: H11 output clock enabled
      * DIVHS = 8 (/8)
    
    DPLL_DDR Summary
     -> F_input = 20 MHz
     -> F_dpll_ddr = 2664 MHz
     -> CLKOUT_M2 = EMIF_PHY_GCLK = 666 MHz
     -> CLKOUTX2_H11 = EMIF_DLL_GCLK = 333 MHz
    
    ********************** DMM - LISA **********************
    
    DMM_LISA_MAP_0 = 0x00000000
    DMM_LISA_MAP_1 = 0x00000000
    DMM_LISA_MAP_2 = 0x00000000
    DMM_LISA_MAP_3 = 0x80640100
      * System Address Mapping = 0x80000000
      * Section Size = 1024 MB
      * Mapped to EMIF1
    
    ********************** EMIF1 **********************
    
    CTRL_CORE_CONTROL_DDRCACH1_0 = 0x60606060
    ddr1_casn, ddr1_rasn, ddr1_rst, ddr1_wen, ddr1_csn[0], ddr1_cke, ddr1_odt[0]
      * Pull logic is disabled
      * Slew rate is 0, where 0=fastest and 7=slowest
      * Output Impedance = 40 Ohms
    ddr1_a[15:0]
      * Pull logic is disabled
      * Slew rate is 0, where 0=fastest and 7=slowest
      * Output Impedance = 40 Ohms
    ddr1_ba[0], ddr1_ba[1], ddr1_ba[2]
      * Pull logic is disabled
      * Slew rate is 0, where 0=fastest and 7=slowest
      * Output Impedance = 40 Ohms
    ddr1_ck, ddr1_nck
      * Pull logic is disabled
      * Slew rate is 0, where 0=fastest and 7=slowest
      * Output Impedance = 40 Ohms
    
    CTRL_CORE_CONTROL_DDRCH1_0 = 0x40404040
    ddr1_d[7:0], ddr1_dqm[0]
      * Pull logic is disabled
      * Slew rate is 0, where 0=fastest and 7=slowest
      * Output Impedance = 48 Ohms
    ddr1_dqs[0], ddr1_dqsn[0]
      * Pull logic is disabled
      * Slew rate is 0, where 0=fastest and 7=slowest
      * Output Impedance = 48 Ohms
    ddr1_d[15:8], ddr1_dqm[1]
      * Pull logic is disabled
      * Slew rate is 0, where 0=fastest and 7=slowest
      * Output Impedance = 48 Ohms
    ddr1_dqs[1], ddr1_dqsn[1]
      * Pull logic is disabled
      * Slew rate is 0, where 0=fastest and 7=slowest
      * Output Impedance = 48 Ohms
    
    CTRL_CORE_CONTROL_DDRCH1_1 = 0x40404040
    ddr1_d[23:16], ddr1_dqm[2]
      * Pull logic is disabled
      * Slew rate is 0, where 0=fastest and 7=slowest
      * Output Impedance = 48 Ohms
    ddr1_dqs[2], ddr1_dqsn[2]
      * Pull logic is disabled
      * Slew rate is 0, where 0=fastest and 7=slowest
      * Output Impedance = 48 Ohms
    ddr1_d[31:24], ddr1_dqm[3]
      * Pull logic is disabled
      * Slew rate is 0, where 0=fastest and 7=slowest
      * Output Impedance = 48 Ohms
    ddr1_dqs[3], ddr1_dqsn[3]
      * Pull logic is disabled
      * Slew rate is 0, where 0=fastest and 7=slowest
      * Output Impedance = 48 Ohms
    
    CTRL_CORE_CONTROL_DDRCH1_2 = 0x00000000
    ddr1_ecc_d[7:0], ddr1_dqm_ecc
      * Pull logic is disabled
      * Slew rate is 0, where 0=fastest and 7=slowest
      * Output Impedance = 80 Ohms
    ddr1_dqs_ecc, ddr1_dqsn_ecc
      * Pull logic is disabled
      * Slew rate is 0, where 0=fastest and 7=slowest
      * Output Impedance = 80 Ohms
    
    CTRL_CORE_CONTROL_DDRIO_0 = 0x00094a40
    ddr1_d[7:0], ddr1_d[15:8]
      * Internal VREF disabled
    ddr1_d[23:16], ddr1_d[31:24], ddr1_ecc_d[7:0]
      * Internal VREF disabled
    
    CTRL_WKUP_EMIF1_SDRAM_CONFIG_EXT = 0x0000c123
    EMIF_STATUS = 0x40000004
    
    EMIF_SDRAM_CONFIG = 0x61863332
    EMIF_SDRAM_CONFIG_2 = 0x08000000
    EMIF_SDRAM_REFRESH_CONTROL = 0x0000144a
    EMIF_SDRAM_TIMING_1 = 0xd333887c
    EMIF_SDRAM_TIMING_2 = 0x30b37fe3
    EMIF_SDRAM_TIMING_3 = 0x409f8ad8
    EMIF_READ_WRITE_LEVELING_RAMP_WINDOW = 0x00000000
    EMIF_READ_WRITE_LEVELING_RAMP_CONTROL = 0x00000000
    EMIF_READ_WRITE_LEVELING_CONTROL = 0x00000000
    EMIF_DDR_PHY_CONTROL_1 = 0x0e24400f
      * Bits 4:0 READ_LATENCY = 15
      * Bit 9 PHY_FAST_DLL_LOCK = 0
      * Bits 17:10 PHY_DLL_LOCK_DIFF = 16
      * Bit 18 PHY_INVERT_CLKOUT = 1
      * Bit 19 PHY_DIS_CALIB_RST = 0
      * Bit 20 PHY_CLK_STALL_LEVEL = 0
      * Bit 21 PHY_HALF_DELAYS = 1
      * Bit 25 WRLVL_MASK = 1
      * Bit 26 RDLVLGATE_MASK = 1
      * Bit 27 RDLVL_MASK = 1
    
    EMIF_EXT_PHY_CONTROL_1  = 0x04040100
    EMIF_EXT_PHY_CONTROL_2  = 0x07000075
    EMIF_EXT_PHY_CONTROL_3  = 0x07000095
    EMIF_EXT_PHY_CONTROL_4  = 0x07000096
    EMIF_EXT_PHY_CONTROL_5  = 0x070000a3
    EMIF_EXT_PHY_CONTROL_6  = 0x07000700
    EMIF_EXT_PHY_CONTROL_7  = 0x00000040
    EMIF_EXT_PHY_CONTROL_8  = 0x0000003c
    EMIF_EXT_PHY_CONTROL_9  = 0x0000003a
    EMIF_EXT_PHY_CONTROL_10 = 0x00000039
    EMIF_EXT_PHY_CONTROL_11 = 0x00000000
    EMIF_EXT_PHY_CONTROL_12 = 0x0218005e
    EMIF_EXT_PHY_CONTROL_13 = 0x00db0078
    EMIF_EXT_PHY_CONTROL_14 = 0x030c0068
    EMIF_EXT_PHY_CONTROL_15 = 0x024d0071
    EMIF_EXT_PHY_CONTROL_16 = 0x011c004c
    EMIF_EXT_PHY_CONTROL_17 = 0x01f8003e
    EMIF_EXT_PHY_CONTROL_18 = 0x00bb0058
    EMIF_EXT_PHY_CONTROL_19 = 0x02ec0048
    EMIF_EXT_PHY_CONTROL_20 = 0x022d0051
    EMIF_EXT_PHY_CONTROL_21 = 0x011c004c
    EMIF_EXT_PHY_CONTROL_22 = 0x00800080
    EMIF_EXT_PHY_CONTROL_23 = 0x00800080
    EMIF_EXT_PHY_CONTROL_24 = 0x40010080
    EMIF_EXT_PHY_CONTROL_25 = 0x08102040
    EMIF_EXT_PHY_CONTROL_26 = 0x0000008e
    EMIF_EXT_PHY_CONTROL_27 = 0x00000088
    EMIF_EXT_PHY_CONTROL_28 = 0x0000007f
    EMIF_EXT_PHY_CONTROL_29 = 0x00000078
    EMIF_EXT_PHY_CONTROL_30 = 0x00000000
    EMIF_EXT_PHY_CONTROL_31 = 0x00000037
    EMIF_EXT_PHY_CONTROL_32 = 0x0000003d
    EMIF_EXT_PHY_CONTROL_33 = 0x00000032
    EMIF_EXT_PHY_CONTROL_34 = 0x00000039
    EMIF_EXT_PHY_CONTROL_35 = 0x00000000
    EMIF_EXT_PHY_CONTROL_36 = 0x00000177
    
    EMIF_EXT_PHY_STATUS_1  = 0x000eb0f3
    EMIF_EXT_PHY_STATUS_2  = 0x63a9d6ea
    EMIF_EXT_PHY_STATUS_3  = 0x00000007
    EMIF_EXT_PHY_STATUS_4  = 0x00120000
    EMIF_EXT_PHY_STATUS_5  = 0x00009999
    EMIF_EXT_PHY_STATUS_6  = 0x00004924
    EMIF_EXT_PHY_STATUS_7  = 0x00000040
    EMIF_EXT_PHY_STATUS_8  = 0x0000003c
    EMIF_EXT_PHY_STATUS_9  = 0x0000003a
    EMIF_EXT_PHY_STATUS_10 = 0x00000039
    EMIF_EXT_PHY_STATUS_11 = 0x00000000
    EMIF_EXT_PHY_STATUS_12 = 0x07000075
    EMIF_EXT_PHY_STATUS_13 = 0x07000095
    EMIF_EXT_PHY_STATUS_14 = 0x07000096
    EMIF_EXT_PHY_STATUS_15 = 0x070000a3
    EMIF_EXT_PHY_STATUS_16 = 0x07000700
    EMIF_EXT_PHY_STATUS_17 = 0x0218005e
    EMIF_EXT_PHY_STATUS_18 = 0x00db0078
    EMIF_EXT_PHY_STATUS_19 = 0x00bb0058
    EMIF_EXT_PHY_STATUS_20 = 0x024d0071
    EMIF_EXT_PHY_STATUS_21 = 0x011c004c
    EMIF_EXT_PHY_STATUS_22 = 0x01f8003e
    EMIF_EXT_PHY_STATUS_23 = 0x00bb0058
    EMIF_EXT_PHY_STATUS_24 = 0x02ec0048
    EMIF_EXT_PHY_STATUS_25 = 0x022d0051
    EMIF_EXT_PHY_STATUS_26 = 0x011c004c
    EMIF_EXT_PHY_STATUS_27 = 0x10f01111
    EMIF_EXT_PHY_STATUS_28 = 0x00000000
    
    

    Regards,

    Ravi

  • Hello Krunal,

    I please find attached output result of am57xx-ddr.dss.

    And kindly replay back as soon as possible, because we are running out of time.

    Regrads,

    Ravi

    4377.am57xx-ddr_2019-05-09_104547.txt
    ********************** DPLL_DDR **********************
    
    CTRL_CORE_BOOTSTRAP = 0x00008122
      * SPEEDSELECT = 20 MHz
    CM_CLKSEL_DPLL_DDR = 0x00014d04
      * DPLL_MULT = 333 (x333)
      * DPLL_DIV = 4 (/5)
    CM_DIV_M2_DPLL_DDR = 0x00000202
      * CLKST = 1: M2 output clock enabled
      * DIVHS = 2 (/2)
    CM_DIV_H11_DPLL_DDR = 0x00000208
      * CLKST = 1: H11 output clock enabled
      * DIVHS = 8 (/8)
    
    DPLL_DDR Summary
     -> F_input = 20 MHz
     -> F_dpll_ddr = 2664 MHz
     -> CLKOUT_M2 = EMIF_PHY_GCLK = 666 MHz
     -> CLKOUTX2_H11 = EMIF_DLL_GCLK = 333 MHz
    
    ********************** DMM - LISA **********************
    
    DMM_LISA_MAP_0 = 0x00000000
    DMM_LISA_MAP_1 = 0x00000000
    DMM_LISA_MAP_2 = 0x00000000
    DMM_LISA_MAP_3 = 0x80640100
      * System Address Mapping = 0x80000000
      * Section Size = 1024 MB
      * Mapped to EMIF1
    
    ********************** EMIF1 **********************
    
    CTRL_CORE_CONTROL_DDRCACH1_0 = 0x60606060
    ddr1_casn, ddr1_rasn, ddr1_rst, ddr1_wen, ddr1_csn[0], ddr1_cke, ddr1_odt[0]
      * Pull logic is disabled
      * Slew rate is 0, where 0=fastest and 7=slowest
      * Output Impedance = 40 Ohms
    ddr1_a[15:0]
      * Pull logic is disabled
      * Slew rate is 0, where 0=fastest and 7=slowest
      * Output Impedance = 40 Ohms
    ddr1_ba[0], ddr1_ba[1], ddr1_ba[2]
      * Pull logic is disabled
      * Slew rate is 0, where 0=fastest and 7=slowest
      * Output Impedance = 40 Ohms
    ddr1_ck, ddr1_nck
      * Pull logic is disabled
      * Slew rate is 0, where 0=fastest and 7=slowest
      * Output Impedance = 40 Ohms
    
    CTRL_CORE_CONTROL_DDRCH1_0 = 0x40404040
    ddr1_d[7:0], ddr1_dqm[0]
      * Pull logic is disabled
      * Slew rate is 0, where 0=fastest and 7=slowest
      * Output Impedance = 48 Ohms
    ddr1_dqs[0], ddr1_dqsn[0]
      * Pull logic is disabled
      * Slew rate is 0, where 0=fastest and 7=slowest
      * Output Impedance = 48 Ohms
    ddr1_d[15:8], ddr1_dqm[1]
      * Pull logic is disabled
      * Slew rate is 0, where 0=fastest and 7=slowest
      * Output Impedance = 48 Ohms
    ddr1_dqs[1], ddr1_dqsn[1]
      * Pull logic is disabled
      * Slew rate is 0, where 0=fastest and 7=slowest
      * Output Impedance = 48 Ohms
    
    CTRL_CORE_CONTROL_DDRCH1_1 = 0x40404040
    ddr1_d[23:16], ddr1_dqm[2]
      * Pull logic is disabled
      * Slew rate is 0, where 0=fastest and 7=slowest
      * Output Impedance = 48 Ohms
    ddr1_dqs[2], ddr1_dqsn[2]
      * Pull logic is disabled
      * Slew rate is 0, where 0=fastest and 7=slowest
      * Output Impedance = 48 Ohms
    ddr1_d[31:24], ddr1_dqm[3]
      * Pull logic is disabled
      * Slew rate is 0, where 0=fastest and 7=slowest
      * Output Impedance = 48 Ohms
    ddr1_dqs[3], ddr1_dqsn[3]
      * Pull logic is disabled
      * Slew rate is 0, where 0=fastest and 7=slowest
      * Output Impedance = 48 Ohms
    
    CTRL_CORE_CONTROL_DDRCH1_2 = 0x00000000
    ddr1_ecc_d[7:0], ddr1_dqm_ecc
      * Pull logic is disabled
      * Slew rate is 0, where 0=fastest and 7=slowest
      * Output Impedance = 80 Ohms
    ddr1_dqs_ecc, ddr1_dqsn_ecc
      * Pull logic is disabled
      * Slew rate is 0, where 0=fastest and 7=slowest
      * Output Impedance = 80 Ohms
    
    CTRL_CORE_CONTROL_DDRIO_0 = 0x00094a40
    ddr1_d[7:0], ddr1_d[15:8]
      * Internal VREF disabled
    ddr1_d[23:16], ddr1_d[31:24], ddr1_ecc_d[7:0]
      * Internal VREF disabled
    
    CTRL_WKUP_EMIF1_SDRAM_CONFIG_EXT = 0x0000c123
    EMIF_STATUS = 0x40000004
    
    EMIF_SDRAM_CONFIG = 0x61863332
    EMIF_SDRAM_CONFIG_2 = 0x08000000
    EMIF_SDRAM_REFRESH_CONTROL = 0x0000144a
    EMIF_SDRAM_TIMING_1 = 0xd333887c
    EMIF_SDRAM_TIMING_2 = 0x30b37fe3
    EMIF_SDRAM_TIMING_3 = 0x409f8ad8
    EMIF_READ_WRITE_LEVELING_RAMP_WINDOW = 0x00000000
    EMIF_READ_WRITE_LEVELING_RAMP_CONTROL = 0x00000000
    EMIF_READ_WRITE_LEVELING_CONTROL = 0x00000000
    EMIF_DDR_PHY_CONTROL_1 = 0x0e24400f
      * Bits 4:0 READ_LATENCY = 15
      * Bit 9 PHY_FAST_DLL_LOCK = 0
      * Bits 17:10 PHY_DLL_LOCK_DIFF = 16
      * Bit 18 PHY_INVERT_CLKOUT = 1
      * Bit 19 PHY_DIS_CALIB_RST = 0
      * Bit 20 PHY_CLK_STALL_LEVEL = 0
      * Bit 21 PHY_HALF_DELAYS = 1
      * Bit 25 WRLVL_MASK = 1
      * Bit 26 RDLVLGATE_MASK = 1
      * Bit 27 RDLVL_MASK = 1
    
    EMIF_EXT_PHY_CONTROL_1  = 0x04040100
    EMIF_EXT_PHY_CONTROL_2  = 0x07000075
    EMIF_EXT_PHY_CONTROL_3  = 0x07000095
    EMIF_EXT_PHY_CONTROL_4  = 0x07000096
    EMIF_EXT_PHY_CONTROL_5  = 0x070000a3
    EMIF_EXT_PHY_CONTROL_6  = 0x07000700
    EMIF_EXT_PHY_CONTROL_7  = 0x00000040
    EMIF_EXT_PHY_CONTROL_8  = 0x0000003c
    EMIF_EXT_PHY_CONTROL_9  = 0x0000003a
    EMIF_EXT_PHY_CONTROL_10 = 0x00000039
    EMIF_EXT_PHY_CONTROL_11 = 0x00000000
    EMIF_EXT_PHY_CONTROL_12 = 0x0218005e
    EMIF_EXT_PHY_CONTROL_13 = 0x00db0078
    EMIF_EXT_PHY_CONTROL_14 = 0x030c0068
    EMIF_EXT_PHY_CONTROL_15 = 0x024d0071
    EMIF_EXT_PHY_CONTROL_16 = 0x011c004c
    EMIF_EXT_PHY_CONTROL_17 = 0x01f8003e
    EMIF_EXT_PHY_CONTROL_18 = 0x00bb0058
    EMIF_EXT_PHY_CONTROL_19 = 0x02ec0048
    EMIF_EXT_PHY_CONTROL_20 = 0x022d0051
    EMIF_EXT_PHY_CONTROL_21 = 0x011c004c
    EMIF_EXT_PHY_CONTROL_22 = 0x00800080
    EMIF_EXT_PHY_CONTROL_23 = 0x00800080
    EMIF_EXT_PHY_CONTROL_24 = 0x40010080
    EMIF_EXT_PHY_CONTROL_25 = 0x08102040
    EMIF_EXT_PHY_CONTROL_26 = 0x0000008e
    EMIF_EXT_PHY_CONTROL_27 = 0x00000088
    EMIF_EXT_PHY_CONTROL_28 = 0x0000007f
    EMIF_EXT_PHY_CONTROL_29 = 0x00000078
    EMIF_EXT_PHY_CONTROL_30 = 0x00000000
    EMIF_EXT_PHY_CONTROL_31 = 0x00000037
    EMIF_EXT_PHY_CONTROL_32 = 0x0000003d
    EMIF_EXT_PHY_CONTROL_33 = 0x00000032
    EMIF_EXT_PHY_CONTROL_34 = 0x00000039
    EMIF_EXT_PHY_CONTROL_35 = 0x00000000
    EMIF_EXT_PHY_CONTROL_36 = 0x00000177
    
    EMIF_EXT_PHY_STATUS_1  = 0x000eb0f3
    EMIF_EXT_PHY_STATUS_2  = 0x63a9d6ea
    EMIF_EXT_PHY_STATUS_3  = 0x00000007
    EMIF_EXT_PHY_STATUS_4  = 0x00120000
    EMIF_EXT_PHY_STATUS_5  = 0x00009999
    EMIF_EXT_PHY_STATUS_6  = 0x00004924
    EMIF_EXT_PHY_STATUS_7  = 0x00000040
    EMIF_EXT_PHY_STATUS_8  = 0x0000003c
    EMIF_EXT_PHY_STATUS_9  = 0x0000003a
    EMIF_EXT_PHY_STATUS_10 = 0x00000039
    EMIF_EXT_PHY_STATUS_11 = 0x00000000
    EMIF_EXT_PHY_STATUS_12 = 0x07000075
    EMIF_EXT_PHY_STATUS_13 = 0x07000095
    EMIF_EXT_PHY_STATUS_14 = 0x07000096
    EMIF_EXT_PHY_STATUS_15 = 0x070000a3
    EMIF_EXT_PHY_STATUS_16 = 0x07000700
    EMIF_EXT_PHY_STATUS_17 = 0x0218005e
    EMIF_EXT_PHY_STATUS_18 = 0x00db0078
    EMIF_EXT_PHY_STATUS_19 = 0x00bb0058
    EMIF_EXT_PHY_STATUS_20 = 0x024d0071
    EMIF_EXT_PHY_STATUS_21 = 0x011c004c
    EMIF_EXT_PHY_STATUS_22 = 0x01f8003e
    EMIF_EXT_PHY_STATUS_23 = 0x00bb0058
    EMIF_EXT_PHY_STATUS_24 = 0x02ec0048
    EMIF_EXT_PHY_STATUS_25 = 0x022d0051
    EMIF_EXT_PHY_STATUS_26 = 0x011c004c
    EMIF_EXT_PHY_STATUS_27 = 0x10f01111
    EMIF_EXT_PHY_STATUS_28 = 0x00000000
    
    

  • Hi krunal,

    I am waiting for your replay.

    Regards,
    Ravi
  • I downloaded the most recent EMIF Tools spreadsheet that you included in this thread.  I opened it and compared the values from the "Register Values (U-Boot)" tab with the values being reported in the text file.  They don't match, which means you have not correctly configured u-boot.  Some of the key registers I was looking at first include SDRAM_CONFIG, SDRAM_TIMING_1/2/3.  Please look closely to make sure that you have filled in an appropriate structure in u-boot, and confirm that a pointer to that structure is being passed to the DDR configuration function.  Please repeat this process until your numbers match.  At that point, please post a zip file containing your spreadsheet and the updated txt file.

    Also, regarding your spreadsheet:

    1. On Step 1 System Details, I don't think you've entered Detail 15 correctly.  That item relates to the speed bin of the part you purchased.  It is NOT the speed at which you're running.  The DDR speed you're using is specified in Detail 6.  The speed of the DDR IC you're purchasing should be specified in item 15.  For Detail 18 you should give the corresponding CAS Latency at that speed.

    2. On Step 3 DDR timings there are many timings that show up red.  You shouldn't be seeing red...  That means you've made a mistake.  This might relate to the first item I mentioned, i.e. perhaps they'll go away once you've corrected that.

  • Hi Brad,

    Please find the attached EMIF updated spread sheet and DDR test text file.

    In "Register Value" tab i found a structure named as "const struct dpll_params AM571x_DDR3_532MHz_TI_AM571x_EVM_pll_params", I don't know where can update this structure in u-boot source.

    Regards,

    RaviAM5718_DDR_CONFIG_TEST.zip

  • SDRAM_CONFIG still doesn't match between the spreadsheet and the values scraped from the registers.  Did you deliberately make it different?  Why?

    In the AM57xx u-boot implementation, the DDR DPLL is automatically configured based on the device type.  Normally AM572x is configured for 532 MHz and the rest are configured for 666 MHz.  That said, I see from the output that your DDR is running at 532 MHz.  Did you already make a change pertaining to DDR speed?  What part number is on the board you're using?

  • Sorry for inconvenience, We do test again pleas find in attachment.

    Processor :  AM5718

    RAM         :  IS43TR16256A-125KBL-TR

    Regards,

    Ravi

    AM5718_DDR_CONFIG_TEST_11May19.zip

  • Going back to your original question about the PHY_CTRL values. For some reason they're not showing in the u-boot tab, but the values are there in the GEL tab:

    /* EXT_PHY_CTRL_xx are used only in case of HW_LEVELING_ENABLED = 0*/
    /* EMIF_PHY_FIFO_WE_SLAVE_RATIO (RD_DQS_GATE) */
    EXT_PHY_CTRL_2 = 0x006B0094U;
    EXT_PHY_CTRL_3 = 0x006B008FU;
    EXT_PHY_CTRL_4 = 0x006B0088U;
    EXT_PHY_CTRL_5 = 0x006B0082U;
    EXT_PHY_CTRL_6 = 0x006B006BU;

    /* EMIF_PHY_RD_DQS_SLAVE_RATIO */
    EXT_PHY_CTRL_7 = 0x002F002FU;
    EXT_PHY_CTRL_8 = 0x002F002FU;
    EXT_PHY_CTRL_9 = 0x002F002FU;
    EXT_PHY_CTRL_10 = 0x002F002FU;
    EXT_PHY_CTRL_11 = 0x002F002FU;

    /* EMIF_PHY_WR_DQS_SLAVE_RATIO */
    EXT_PHY_CTRL_17 = 0x00400045U;
    EXT_PHY_CTRL_18 = 0x0040004AU;
    EXT_PHY_CTRL_19 = 0x00400042U;
    EXT_PHY_CTRL_20 = 0x00400048U;
    EXT_PHY_CTRL_21 = 0x00400040U;

    Please overwrite those registers in the u-boot structure of your code. Hopefully that will get things working.

    If it doesn't, we need to get some details on the state of the RAM. In other words, if you let u-boot run and then you connect to the board (NO GEL FILES!!!) and look at the RAM (0x80000000), does refreshing the RAM cause everything to randomly change? Are there certain locations and/or bits that change? If you write a word into the RAM (e.g. 0xdeadbeef) does that cause other locations to change?
  • PS. You have some errors in your spreadsheet that need to be corrected:

    1. Change Step 1 Detail 15 to 1600 MHz. Change Step 1 Detail 18 to 11 nTCK.
    2. Step 3, Change tRP and tRCD to 13.75ns.
    3. Step 3, Change tRC to 48.75ns.
    4. Step 3, Change CL=7, CWL=6. By the way, it looks like your current combo of CL=9, CWL=6 is not even valid. If you wanted to run at 666 MHz then you should choose CL=9, CWL=7 as shown in the speed bin table. You need to look at the DDR3-1600 speed bin table since that is the device you are using.
    5. Step 3, Change tFAW to 40ns.
  • I want to make an overall comment on reading the DDR data sheet. You need to get the timing parameters based on the ORDERABLE PART NUMBER, not on the speed at which you'll run. Since you're ordering the -125 device, that corresponds to the 1600 speed bin. So all the timing numbers come from there. There's a "speed bin table" which shows how to select the correct CL and CWL settings when using tCK at a slower speed.
  • does refreshing the RAM cause everything to randomly change?

    No changes after RAM refreshing

    If you write a word into the RAM (e.g. 0xdeadbeef) does that cause other locations to change?


    I can write  a word into RAM,but no changes in other location

    And i do same testing in AM5718-IDK with same MLO and u-boot.img,I found difference in memory browser,it seems u-boot.img properly cpoied in AM5718-IDK RAM and not copied on our custom board.

    Values on memory map on our custom board almost same before and after u-boot.img loaded to RAM.

    In mean while we did the hardware review and found an address bit A14 not connected to DDR memory.And I want to know, any possibilities to configure RAM for 512MB and make u-boot work.

    For this I need an expert's advice,so that I can tell the same to my hardware team.

    Could you please help.

    Regards,

    Ravi

  • Last time I looked at the u-boot code for the RAM size detection, it was just poking values into the RAM to see how big it is. So in your case, due to lack of A14, it's going to wrap around at the 512 MB boundary. I would expect u-boot to already be reporting your memory as 512 MB. Is that not the case? Or do you not get far enough to see it?

    Have you made all the changes I mentioned previously? In general, if the DDR is not configured correctly, things won't work... So before you spend a lot of time debugging other things, my recommendation is to complete this DDR analysis. So I recommend that you:

    1. Make the updates to the spreadsheet that I mentioned.
    2. Update the code according to the new spreadsheet results.
    3. Rerun the DDR script based on your newly configured results.
    4. Post your updated DDR spreadsheet and resulting output for review.

    Aside from that, you could step through the SPL code to see if there are any hints as to what's going wrong...

    Best regards,
    Brad
  • I would expect u-boot to already be reporting your memory as 512 MB. Is that not the case? Or do you not get far enough to see it?


    u-boot jump not happen,this is what i get in console

    Jumping to U-Boot
    loaded - jumping to U-Boot...
    image entry point: 0x80800000

    And please find the attached update spreadsheet and DDR test log.

    Regards,

    Ravi

    AM5718_DDR_CONFIG_TEST_14May19.zip

  • Your DDR spreadsheet and output looks good. If you open a disassembly window to 0x80800000, does it show valid code there? Have you tried stepping through SPL code? Once you get to the point where u-boot has been loaded to 0x80800000 then you can set a breakpoint at that address and run to it. That should give us info as to whether we actually make it to u-boot or not. That will inform us whether additional debugging should occur inside SPL or u-boot.
  • Hi Brad,

    Thanks for your support, now we got some uboot console print like below,

    U-Boot 2018.01-00569-gfd38f5a-dirty (May 14 2019 - 11:46:11 +0530)

    initcall: 8080d9f9

    U-Boot code: 80800000 -> 80873728  BSS: -> 808B1BA4

    initcall: 8080269d

    CPU  : DRA722-GP ES2.0

    initcall: 8080de29

    Model: TI AM5728 IDK

    Board: AM571x IDK REV 1.3B

    initcall: 8080dad9

    DRAM:  initcall: 80802675

    >>sdram_init()

    "stopped here"

    Regards,

    Ravi

  • Those prints are from u-boot? Not SPL? It looks like it is reconfiguring DDR. That will cause a crash when you are already executing from DDR. How do you build u-boot? What files are you using from the output, i.e. MLO and u-boot.img? There are #ifdef's in the code such that DDR config should only happen in SPL.
  • We done the following to check uboot jump issue

    1. Copied MLO and u-boot.img in SD card (SD boot)  -> u-boot jump not happen.

    2. Boot through "usb DFU"    ->  u-boot jump not happen  (USB DFU working properly in AM5718-IDK)

    3.Boot through SD card, after failed to jump, then we manually load u-boot.bin through JTAG (CCS) and changed PC to 0x80800000 then we get following output in console

    U-Boot 2018.01-00569-gfd38f5a-dirty (May 14 2019 - 11:46:11 +0530)

    initcall: 8080d9f9
    U-Boot code: 80800000 -> 80873728 BSS: -> 808B1BA4
    initcall: 8080269d
    CPU : DRA722-GP ES2.0
    initcall: 8080de29
    Model: TI AM5728 IDK
    Board: AM571x IDK REV 1.3B
    initcall: 8080dad9
    DRAM: initcall: 80802675
    >>sdram_init()

     

    Regards,

    Ravi

  • I don't have enough information to diagnose the exact issue in your system. In order to move forward, my recommendation is that you spend more time stepping through the u-boot-spl code to better understand where things begin to fail.
  • Hi Ravi,

    As Brad mentioned in the previous post, please step through the SPL to gain better understanding of the failure. As an experiment, I am wondering if you could please modify the GEL files with your custom DDR values. Using CCS, connect to A15 core (load GEL files) and check if you are able to initialize everything (PRCM, DDR, etc) without any error messages. Also, are you experiencing the same errors across multiple boards or just one board?

    Regards,
    Krunal
  • Hi  Brad, 

    We have tested the u-boot-spl code by adding the debug print then run u-boot-spl via single step mode CCS then we got the following debug prints in console (Please note that the MLO & u-boot.img copied SD card is connected into platform) . During the single step debugging mode the platform run after the start.s file "_main" function.


    Debug Print:

    U-Boot SPL 2018.01-00569-gfd38f5a-dirty (May 14 2019 - 11:46:11)
    DRA722-GP ES2.0
    >>sdram_init()
    in_sdram = 0
    DMM Init
    >>do_sdram_init() 4c000000
    emif_get_reg_dump 1
    am571x_emif1_ddr3_666mhz_emif_regs
    beagle_x15_emif1_ddr3_ext_phy_ctrl_const_regs
    HW leveling success
    <<do_sdram_init() 4c000000
    SDRAM init EMIF1
    emif_post_init_config(EMIF1_BASE)
    valid[2] : 8000000000
    addr[2] : 80000000
    valid != DMM_SDRC_ADDR_SPC_INVALID
    sdram_start 80000000
    sdram_end 100000000
    valid[3] : 100000002
    addr[3] : ff000000
    trap_size : [1000000] trap_start : [ff000000]
    302 total_size 7f000000
    size_detect 20000000
    size_prog 40000000
    SDRAM: identified size not same as expected size identified: 20000000 expected: 40000000
    <<sdram_init()
    valid[2] : 8000000000
    addr[2] : 80000000
    valid != DMM_SDRC_ADDR_SPC_INVALID
    sdram_start 80000000
    sdram_end 100000000
    valid[3] : 100000002
    addr[3] : ff000000
    trap_size : [1000000] trap_start : [ff000000]
    302 total_size 7f000000
    >>spl:board_init_r()
    TLB table from feffb000 to ff000000
    dram_bank_mmu_setup: bank: 0
    dram_bank_mmu_setup: bank: 1
    using memory 0x80a80000-0x81280000 for malloc()

    U-Boot SPL 2018.01-00569-gfd38f5a-dirty (May 14 2019 - 11:46:11)
    DRA722-GP ES2.0
    omap24_i2c_findpsc: speed [kHz]: 100 psc: 0x17 sscl: 0xd ssch: 0xf
    SPL: failed to boot from all boot devices
    ### ERROR ### Please RESET the board ###

  • Hi Ravi, your u-boot output shows it is using am571x_emif1_ddr3_666mhz_emif_regs structure.  Is this the structure you made changes to based on the EMIF tool spreadsheet?  The latest spreadsheet shows a DDR Memory Frequency of 532MHz, yet u-boot is using a 666MHz configuration.  This needs to be resolved

    Also, you are using 2 x16 256MB DDR3 (total of 1GB) on EMIF1.  But you said that you didn't connect A14, so you really only have 512MB connected.

    Because of this, i think your lisa_map_reg structure looks like this:

    .dmm_lisa_map_0 = 0x00000000,      
        .dmm_lisa_map_1 = 0x00000000,      
        .dmm_lisa_map_2 = 0x00000000,      
        .dmm_lisa_map_3 = 0x80500100,      
        .is_ma_present = 0x1  

    In the EMIF tool spreadsheet, line 16 Density shouldbe 4Gb to represent the density of one DDR device.  This will change some of the timing parameters in the configuration.

    Also, continue to send the latest output from the dss scripts and the latest spreadsheet after you make change, so we can ensure the changes made were picked up in u-boot correctly.

    Regards,

    James

  • Hi James,

    Thanks for your detailed replay. Please find my replay prefixed with "Ravi_17May2019=>"

     

    Hi Ravi, your u-boot output shows it is using am571x_emif1_ddr3_666mhz_emif_regs structure.  Is this the structure you made changes to based on the EMIF tool spreadsheet?  The latest spreadsheet shows a DDR Memory Frequency of 532MHz, yet u-boot is using a 666MHz configuration.  This needs to be resolved

    Ravi_17May2019=> Yes, I have used "am571x_emif1_ddr3_666mhz_emif_regs" named structure for 532MHz configuration changes.

     

    Also, you are using 2 x16 256MB DDR3 (total of 1GB) on EMIF1.  But you said that you didn't connect A14, so you really only have 512MB connected.

    Ravi_17May2019=> Yes, We used  "2 x16 256MB DDR3 (total of 1GB)" on EMIF1. I need to change the EMIF tool configuration for 512MB because of A14 not connected to DDR?

     

    In the EMIF tool spreadsheet, line 16 Density shouldbe 4Gb to represent the density of one DDR device.  This will change some of the timing parameters in the configuration.

    Also, continue to send the latest output from the dss scripts and the latest spreadsheet after you make change, so we can ensure the changes made were picked up in u-boot correctly.

    Ravi_17May2019=> Please find the modified (Density is 4Gb) EMIF configuration spread sheet & dss file for your reference.

    File Name: 

    AM5718_DDR_CONFIG_TEST_17May19.zip

    Regards,

    Ravi

  • Hi Ravi,

    Could you please share your board.c file with us?

    Regards,
    Krunal
  • HI Krunal,

    I have attached the board.c for your reference. 

    File Name: 

    5807.board.c
    /*
     * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com
     *
     * Author: Felipe Balbi <balbi@ti.com>
     *
     * Based on board/ti/dra7xx/evm.c
     *
     * SPDX-License-Identifier:	GPL-2.0+
     */
    
    #include <common.h>
    #include <palmas.h>
    #include <sata.h>
    #include <usb.h>
    #include <asm/omap_common.h>
    #include <asm/omap_sec_common.h>
    #include <asm/emif.h>
    #include <asm/gpio.h>
    #include <asm/arch/gpio.h>
    #include <asm/arch/clock.h>
    #include <asm/arch/dra7xx_iodelay.h>
    #include <asm/arch/sys_proto.h>
    #include <asm/arch/mmc_host_def.h>
    #include <asm/arch/sata.h>
    #include <asm/arch/gpio.h>
    #include <asm/arch/omap.h>
    #include <environment.h>
    #include <usb.h>
    #include <linux/usb/gadget.h>
    #include <dwc3-uboot.h>
    #include <dwc3-omap-uboot.h>
    #include <ti-usb-phy-uboot.h>
    #include <mmc.h>
    
    #include "../common/board_detect.h"
    #include "mux_data.h"
    
    #define board_is_x15()		board_ti_is("BBRDX15_")
    #define board_is_x15_revb1()	(board_ti_is("BBRDX15_") && \
    				 !strncmp("B.10", board_ti_get_rev(), 3))
    #define board_is_x15_revc()	(board_ti_is("BBRDX15_") && \
    				 !strncmp("C.00", board_ti_get_rev(), 3))
    #define board_is_am572x_evm()	board_ti_is("AM572PM_")
    #define board_is_am572x_evm_reva3()	\
    				(board_ti_is("AM572PM_") && \
    				 !strncmp("A.30", board_ti_get_rev(), 3))
    #define board_is_am574x_idk()	board_ti_is("AM574IDK")
    #define board_is_am572x_idk()	board_ti_is("AM572IDK")
    #define board_is_am571x_idk()	board_ti_is("AM571IDK")
    
    #ifdef CONFIG_DRIVER_TI_CPSW
    #include <cpsw.h>
    #endif
    
    DECLARE_GLOBAL_DATA_PTR;
    
    #define GPIO_ETH_LCD		GPIO_TO_PIN(2, 22)
    /* GPIO 7_11 */
    #define GPIO_DDR_VTT_EN 203
    
    /* Touch screen controller to identify the LCD */
    #define OSD_TS_FT_BUS_ADDRESS	0
    #define OSD_TS_FT_CHIP_ADDRESS	0x38
    #define OSD_TS_FT_REG_ID	0xA3
    /*
     * Touchscreen IDs for various OSD panels
     * Ref: http://www.osddisplays.com/TI/OSD101T2587-53TS_A.1.pdf
     */
    /* Used on newer osd101t2587 Panels */
    #define OSD_TS_FT_ID_5x46	0x54
    /* Used on older osd101t2045 Panels */
    #define OSD_TS_FT_ID_5606	0x08
    
    #define SYSINFO_BOARD_NAME_MAX_LEN	45
    
    #define TPS65903X_PRIMARY_SECONDARY_PAD2	0xFB
    #define TPS65903X_PAD2_POWERHOLD_MASK		0x20
    
    const struct omap_sysinfo sysinfo = {
    	"Board: UNKNOWN(BeagleBoard X15?) REV UNKNOWN\n"
    };
    
    static const struct dmm_lisa_map_regs beagle_x15_lisa_regs = {
    	.dmm_lisa_map_3 = 0x80740300,
    	.is_ma_present  = 0x1
    };
    
    static const struct dmm_lisa_map_regs am571x_idk_lisa_regs = { 
    
    
    	.dmm_lisa_map_0 = 0x00000000,					
    	.dmm_lisa_map_1 = 0x00000000,					
    	.dmm_lisa_map_2 = 0x80600100,	 		
    	.dmm_lisa_map_3 = 0xFF020100,					
    	.is_ma_present = 0x1	
    };
    
    static const struct dmm_lisa_map_regs am574x_idk_lisa_regs = {
    	.dmm_lisa_map_2 = 0xc0600200,
    	.dmm_lisa_map_3 = 0x80600100,
    	.is_ma_present  = 0x1
    };
    
    void emif_get_dmm_regs(const struct dmm_lisa_map_regs **dmm_lisa_regs)
    {
    	if (board_is_am571x_idk())
    		*dmm_lisa_regs = &am571x_idk_lisa_regs;
    	else if (board_is_am574x_idk())
    		*dmm_lisa_regs = &am574x_idk_lisa_regs;
    	else
    		*dmm_lisa_regs = &beagle_x15_lisa_regs;
    }
    
    static const struct emif_regs beagle_x15_emif1_ddr3_532mhz_emif_regs = {
    	.sdram_config_init		= 0x61851b32,
    	.sdram_config			= 0x61851b32,
    	.sdram_config2			= 0x08000000,
    	.ref_ctrl			= 0x000040F1,
    	.ref_ctrl_final			= 0x00001035,
    	.sdram_tim1			= 0xcccf36ab,
    	.sdram_tim2			= 0x308f7fda,
    	.sdram_tim3			= 0x409f88a8,
    	.read_idle_ctrl			= 0x00050000,
    	.zq_config			= 0x5007190b,
    	.temp_alert_config		= 0x00000000,
    	.emif_ddr_phy_ctlr_1_init 	= 0x0024400b,
    	.emif_ddr_phy_ctlr_1		= 0x0e24400b,
    	.emif_ddr_ext_phy_ctrl_1 	= 0x10040100,
    	.emif_ddr_ext_phy_ctrl_2 	= 0x00910091,
    	.emif_ddr_ext_phy_ctrl_3 	= 0x00950095,
    	.emif_ddr_ext_phy_ctrl_4 	= 0x009b009b,
    	.emif_ddr_ext_phy_ctrl_5 	= 0x009e009e,
    	.emif_rd_wr_lvl_rmp_win		= 0x00000000,
    	.emif_rd_wr_lvl_rmp_ctl		= 0x80000000,
    	.emif_rd_wr_lvl_ctl		= 0x00000000,
    	.emif_rd_wr_exec_thresh		= 0x00000305
    };
    
    /* Ext phy ctrl regs 1-35 */
    static const u32 beagle_x15_emif1_ddr3_ext_phy_ctrl_const_regs[] = {
     		
    
        0x04040100,	// EMIF1_EXT_PHY_CTRL_1	
        0x006B0094,	// EMIF1_EXT_PHY_CTRL_2	
        0x006B008F,	// EMIF1_EXT_PHY_CTRL_3	
        0x006B0088,	// EMIF1_EXT_PHY_CTRL_4	
        0x006B0082,	// EMIF1_EXT_PHY_CTRL_5	
        0x006B006B,	// EMIF1_EXT_PHY_CTRL_6	
        0x002F002F,	// EMIF1_EXT_PHY_CTRL_7	
        0x002F002F,	// EMIF1_EXT_PHY_CTRL_8	
        0x002F002F,	// EMIF1_EXT_PHY_CTRL_9	
        0x002F002F,	// EMIF1_EXT_PHY_CTRL_10	
        0x002F002F,	// EMIF1_EXT_PHY_CTRL_11	
        0x00600065,	// EMIF1_EXT_PHY_CTRL_12	
        0x0060006A,	// EMIF1_EXT_PHY_CTRL_13	
        0x00600062,	// EMIF1_EXT_PHY_CTRL_14	
        0x00600068,	// EMIF1_EXT_PHY_CTRL_15	
        0x00600060,	// EMIF1_EXT_PHY_CTRL_16	
        0x00400045,	// EMIF1_EXT_PHY_CTRL_17	
        0x0040004A,	// EMIF1_EXT_PHY_CTRL_18	
        0x00400042,	// EMIF1_EXT_PHY_CTRL_19	
        0x00400048,	// EMIF1_EXT_PHY_CTRL_20	
        0x00400040,	// EMIF1_EXT_PHY_CTRL_21	
        0x00800080,	// EMIF1_EXT_PHY_CTRL_22	
        0x00800080,	// EMIF1_EXT_PHY_CTRL_23	
        0x40010080,	// EMIF1_EXT_PHY_CTRL_24	
        0x08102040,	// EMIF1_EXT_PHY_CTRL_25	
        0x00000084,	// EMIF1_EXT_PHY_CTRL_26	
        0x0000007F,	// EMIF1_EXT_PHY_CTRL_27	
        0x00000078,	// EMIF1_EXT_PHY_CTRL_28	
        0x00000072,	// EMIF1_EXT_PHY_CTRL_29	
        0x00000000,	// EMIF1_EXT_PHY_CTRL_30	
        0x00000035,	// EMIF1_EXT_PHY_CTRL_31	
        0x0000003A,	// EMIF1_EXT_PHY_CTRL_32	
        0x00000032,	// EMIF1_EXT_PHY_CTRL_33	
        0x00000038,	// EMIF1_EXT_PHY_CTRL_34	
        0x00000000,	// EMIF1_EXT_PHY_CTRL_35	
        0x00000077	// EMIF1_EXT_PHY_CTRL_36
    
    #if 0
    
          0x04040100,	// EMIF1_EXT_PHY_CTRL_1	
        0x006B0094,	// EMIF1_EXT_PHY_CTRL_2	
        0x006B008F,	// EMIF1_EXT_PHY_CTRL_3	
        0x006B0088,	// EMIF1_EXT_PHY_CTRL_4	
        0x006B0082,	// EMIF1_EXT_PHY_CTRL_5	
        0x006B006B,	// EMIF1_EXT_PHY_CTRL_6	
        0x002F002F,	// EMIF1_EXT_PHY_CTRL_7	
        0x002F002F,	// EMIF1_EXT_PHY_CTRL_8	
        0x002F002F,	// EMIF1_EXT_PHY_CTRL_9	
        0x002F002F,	// EMIF1_EXT_PHY_CTRL_10	
        0x002F002F,	// EMIF1_EXT_PHY_CTRL_11	
        0x00600065,	// EMIF1_EXT_PHY_CTRL_12	
        0x0060006A,	// EMIF1_EXT_PHY_CTRL_13	
        0x00600062,	// EMIF1_EXT_PHY_CTRL_14	
        0x00600068,	// EMIF1_EXT_PHY_CTRL_15	
        0x00600060,	// EMIF1_EXT_PHY_CTRL_16	
        0x00400045,	// EMIF1_EXT_PHY_CTRL_17	
        0x0040004A,	// EMIF1_EXT_PHY_CTRL_18	
        0x00400042,	// EMIF1_EXT_PHY_CTRL_19	
        0x00400048,	// EMIF1_EXT_PHY_CTRL_20	
        0x00400040,	// EMIF1_EXT_PHY_CTRL_21	
        0x00800080,	// EMIF1_EXT_PHY_CTRL_22	
        0x00800080,	// EMIF1_EXT_PHY_CTRL_23	
        0x40010080,	// EMIF1_EXT_PHY_CTRL_24	
        0x08102040,	// EMIF1_EXT_PHY_CTRL_25	
        0x00000084,	// EMIF1_EXT_PHY_CTRL_26	
        0x0000007F,	// EMIF1_EXT_PHY_CTRL_27	
        0x00000078,	// EMIF1_EXT_PHY_CTRL_28	
        0x00000072,	// EMIF1_EXT_PHY_CTRL_29	
        0x00000000,	// EMIF1_EXT_PHY_CTRL_30	
        0x00000035,	// EMIF1_EXT_PHY_CTRL_31	
        0x0000003A,	// EMIF1_EXT_PHY_CTRL_32	
        0x00000032,	// EMIF1_EXT_PHY_CTRL_33	
        0x00000038,	// EMIF1_EXT_PHY_CTRL_34	
        0x00000000,	// EMIF1_EXT_PHY_CTRL_35	
        0x00000077	// EMIF1_EXT_PHY_CTRL_36	
    #endif
    };					
    
    static const struct emif_regs beagle_x15_emif2_ddr3_532mhz_emif_regs = {
    	.sdram_config_init		= 0x61851b32,
    	.sdram_config			= 0x61851b32,
    	.sdram_config2			= 0x08000000,
    	.ref_ctrl			= 0x000040F1,
    	.ref_ctrl_final			= 0x00001035,
    	.sdram_tim1			= 0xcccf36b3,
    	.sdram_tim2			= 0x308f7fda,
    	.sdram_tim3			= 0x407f88a8,
    	.read_idle_ctrl			= 0x00050000,
    	.zq_config			= 0x5007190b,
    	.temp_alert_config		= 0x00000000,
    	.emif_ddr_phy_ctlr_1_init 	= 0x0024400b,
    	.emif_ddr_phy_ctlr_1		= 0x0e24400b,
    	.emif_ddr_ext_phy_ctrl_1 	= 0x10040100,
    	.emif_ddr_ext_phy_ctrl_2 	= 0x00910091,
    	.emif_ddr_ext_phy_ctrl_3 	= 0x00950095,
    	.emif_ddr_ext_phy_ctrl_4 	= 0x009b009b,
    	.emif_ddr_ext_phy_ctrl_5 	= 0x009e009e,
    	.emif_rd_wr_lvl_rmp_win		= 0x00000000,
    	.emif_rd_wr_lvl_rmp_ctl		= 0x80000000,
    	.emif_rd_wr_lvl_ctl		= 0x00000000,
    	.emif_rd_wr_exec_thresh		= 0x00000305
    };
    
    static const u32 beagle_x15_emif2_ddr3_ext_phy_ctrl_const_regs[] = {
    
        0x04040100,	// EMIF1_EXT_PHY_CTRL_1	
        0x006B0094,	// EMIF1_EXT_PHY_CTRL_2	
        0x006B008F,	// EMIF1_EXT_PHY_CTRL_3	
        0x006B0088,	// EMIF1_EXT_PHY_CTRL_4	
        0x006B0082,	// EMIF1_EXT_PHY_CTRL_5	
        0x006B006B,	// EMIF1_EXT_PHY_CTRL_6	
        0x002F002F,	// EMIF1_EXT_PHY_CTRL_7	
        0x002F002F,	// EMIF1_EXT_PHY_CTRL_8	
        0x002F002F,	// EMIF1_EXT_PHY_CTRL_9	
        0x002F002F,	// EMIF1_EXT_PHY_CTRL_10	
        0x002F002F,	// EMIF1_EXT_PHY_CTRL_11	
        0x00600065,	// EMIF1_EXT_PHY_CTRL_12	
        0x0060006A,	// EMIF1_EXT_PHY_CTRL_13	
        0x00600062,	// EMIF1_EXT_PHY_CTRL_14	
        0x00600068,	// EMIF1_EXT_PHY_CTRL_15	
        0x00600060,	// EMIF1_EXT_PHY_CTRL_16	
        0x00400045,	// EMIF1_EXT_PHY_CTRL_17	
        0x0040004A,	// EMIF1_EXT_PHY_CTRL_18	
        0x00400042,	// EMIF1_EXT_PHY_CTRL_19	
        0x00400048,	// EMIF1_EXT_PHY_CTRL_20	
        0x00400040,	// EMIF1_EXT_PHY_CTRL_21	
        0x00800080,	// EMIF1_EXT_PHY_CTRL_22	
        0x00800080,	// EMIF1_EXT_PHY_CTRL_23	
        0x40010080,	// EMIF1_EXT_PHY_CTRL_24	
        0x08102040,	// EMIF1_EXT_PHY_CTRL_25	
        0x00000084,	// EMIF1_EXT_PHY_CTRL_26	
        0x0000007F,	// EMIF1_EXT_PHY_CTRL_27	
        0x00000078,	// EMIF1_EXT_PHY_CTRL_28	
        0x00000072,	// EMIF1_EXT_PHY_CTRL_29	
        0x00000000,	// EMIF1_EXT_PHY_CTRL_30	
        0x00000035,	// EMIF1_EXT_PHY_CTRL_31	
        0x0000003A,	// EMIF1_EXT_PHY_CTRL_32	
        0x00000032,	// EMIF1_EXT_PHY_CTRL_33	
        0x00000038,	// EMIF1_EXT_PHY_CTRL_34	
        0x00000000,	// EMIF1_EXT_PHY_CTRL_35	
        0x00000077	// EMIF1_EXT_PHY_CTRL_36
    
    
    #if 0
        0x04040100,	// EMIF1_EXT_PHY_CTRL_1	
        0x006B0094,	// EMIF1_EXT_PHY_CTRL_2	
        0x006B008F,	// EMIF1_EXT_PHY_CTRL_3	
        0x006B0088,	// EMIF1_EXT_PHY_CTRL_4	
        0x006B0082,	// EMIF1_EXT_PHY_CTRL_5	
        0x006B006B,	// EMIF1_EXT_PHY_CTRL_6	
        0x002F002F,	// EMIF1_EXT_PHY_CTRL_7	
        0x002F002F,	// EMIF1_EXT_PHY_CTRL_8	
        0x002F002F,	// EMIF1_EXT_PHY_CTRL_9	
        0x002F002F,	// EMIF1_EXT_PHY_CTRL_10	
        0x002F002F,	// EMIF1_EXT_PHY_CTRL_11	
        0x00600065,	// EMIF1_EXT_PHY_CTRL_12	
        0x0060006A,	// EMIF1_EXT_PHY_CTRL_13	
        0x00600062,	// EMIF1_EXT_PHY_CTRL_14	
        0x00600068,	// EMIF1_EXT_PHY_CTRL_15	
        0x00600060,	// EMIF1_EXT_PHY_CTRL_16	
        0x00400045,	// EMIF1_EXT_PHY_CTRL_17	
        0x0040004A,	// EMIF1_EXT_PHY_CTRL_18	
        0x00400042,	// EMIF1_EXT_PHY_CTRL_19	
        0x00400048,	// EMIF1_EXT_PHY_CTRL_20	
        0x00400040,	// EMIF1_EXT_PHY_CTRL_21	
        0x00800080,	// EMIF1_EXT_PHY_CTRL_22	
        0x00800080,	// EMIF1_EXT_PHY_CTRL_23	
        0x40010080,	// EMIF1_EXT_PHY_CTRL_24	
        0x08102040,	// EMIF1_EXT_PHY_CTRL_25	
        0x00000084,	// EMIF1_EXT_PHY_CTRL_26	
        0x0000007F,	// EMIF1_EXT_PHY_CTRL_27	
        0x00000078,	// EMIF1_EXT_PHY_CTRL_28	
        0x00000072,	// EMIF1_EXT_PHY_CTRL_29	
        0x00000000,	// EMIF1_EXT_PHY_CTRL_30	
        0x00000035,	// EMIF1_EXT_PHY_CTRL_31	
        0x0000003A,	// EMIF1_EXT_PHY_CTRL_32	
        0x00000032,	// EMIF1_EXT_PHY_CTRL_33	
        0x00000038,	// EMIF1_EXT_PHY_CTRL_34	
        0x00000000,	// EMIF1_EXT_PHY_CTRL_35	
        0x00000077	// EMIF1_EXT_PHY_CTRL_36
    #endif
    };
    
    static const struct emif_regs am571x_emif1_ddr3_666mhz_emif_regs = {	
    	.sdram_config_init 		= 0x61851B32,	
    	.sdram_config 			= 0x61851B32,	
    	.sdram_config2 			= 0x00000000,	
    	.ref_ctrl 			= 0x000040F1,	
    	.ref_ctrl_final 		= 0x00001035,	
    	.sdram_tim1 			= 0xCEEF366B,	
    	.sdram_tim2 			= 0x308F7FDA,	
    	.sdram_tim3 			= 0x407F88A8,	
    	.read_idle_ctrl 		= 0x00050000,	
    	.zq_config 			= 0x5007190B,	
    	.temp_alert_config 		= 0x00000000,	
    	.emif_rd_wr_lvl_rmp_ctl 	= 0x80000000,	
    	.emif_rd_wr_lvl_ctl 		= 0x00000000,	
    	.emif_ddr_phy_ctlr_1_init 	= 0x0824400B,	
    	.emif_ddr_phy_ctlr_1 		= 0x0E24400B,	
    	.emif_rd_wr_exec_thresh 	= 0x00000305,	
    
    	.emif_ecc_ctrl_reg 		= 0x00000000,	
    	.emif_ecc_address_range_1 	= 0x3FFF0000,	
    	.emif_ecc_address_range_2 	= 0x00000000,	
    		
    };
    
    static const struct emif_regs am574x_emif1_ddr3_666mhz_emif_ecc_regs = {
    	.sdram_config_init		= 0x61863332,
    	.sdram_config			= 0x61863332,
    	.sdram_config2			= 0x08000000,
    	.ref_ctrl			= 0x0000514d,
    	.ref_ctrl_final			= 0x0000144a,
    	.sdram_tim1			= 0xd333887c,
    	.sdram_tim2			= 0x30b37fe3,
    	.sdram_tim3			= 0x409f8ad8,
    	.read_idle_ctrl			= 0x00050000,
    	.zq_config			= 0x5007190b,
    	.temp_alert_config		= 0x00000000,
    	.emif_ddr_phy_ctlr_1_init	= 0x0024400f,
    	.emif_ddr_phy_ctlr_1		= 0x0e24400f,
    	.emif_ddr_ext_phy_ctrl_1	= 0x10040100,
    	.emif_ddr_ext_phy_ctrl_2	= 0x00910091,
    	.emif_ddr_ext_phy_ctrl_3	= 0x00950095,
    	.emif_ddr_ext_phy_ctrl_4	= 0x009b009b,
    	.emif_ddr_ext_phy_ctrl_5	= 0x009e009e,
    	.emif_rd_wr_lvl_rmp_win		= 0x00000000,
    	.emif_rd_wr_lvl_rmp_ctl		= 0x80000000,
    	.emif_rd_wr_lvl_ctl		= 0x00000000,
    	.emif_rd_wr_exec_thresh		= 0x00000305,
    	.emif_ecc_ctrl_reg		= 0xD0000001,
    	.emif_ecc_address_range_1	= 0x3FFF0000,
    	.emif_ecc_address_range_2	= 0x00000000
    };
    
    void emif_get_reg_dump(u32 emif_nr, const struct emif_regs **regs)
    {
    	debug("emif_get_reg_dump %d\n",emif_nr);//raveen
    	switch (emif_nr) {
    	case 1:
    		if (board_is_am571x_idk()){
    			*regs = &am571x_emif1_ddr3_666mhz_emif_regs;
    			printf("am571x_emif1_ddr3_666mhz_emif_regs \n");
    		}
    		else if (board_is_am574x_idk()){
    			*regs = &am574x_emif1_ddr3_666mhz_emif_ecc_regs;
    			printf("am574x_emif1_ddr3_666mhz_emif_ecc_regs\n");
    		}
    		else{
    			*regs = &beagle_x15_emif1_ddr3_532mhz_emif_regs;
    			printf("beagle_x15_emif1_ddr3_532mhz_emif_regs\n");
    		}
    		break;
    	case 2:
    		if (board_is_am574x_idk()){
    			*regs = &am571x_emif1_ddr3_666mhz_emif_regs;
    			printf("am571x_emif1_ddr3_666mhz_emif_regs case2\n");
    		}
    		else{
    			*regs = &beagle_x15_emif2_ddr3_532mhz_emif_regs;
    			printf("beagle_x15_emif2_ddr3_532mhz_emif_regs case2\n");
    		}
    		break;
    	}
    }
    
    void emif_get_ext_phy_ctrl_const_regs(u32 emif_nr, const u32 **regs, u32 *size)
    {
    	printf("emif_get_ext_phy_ctrl_const_regs -> emif_nr %d",emif_nr);//raveen
    	switch (emif_nr) {
    	case 1:
    		*regs = beagle_x15_emif1_ddr3_ext_phy_ctrl_const_regs;
    		*size = ARRAY_SIZE(beagle_x15_emif1_ddr3_ext_phy_ctrl_const_regs);
    		printf("beagle_x15_emif1_ddr3_ext_phy_ctrl_const_regs\n");//raveen	
    		break;
    	case 2:
    		*regs = beagle_x15_emif2_ddr3_ext_phy_ctrl_const_regs;
    		*size = ARRAY_SIZE(beagle_x15_emif2_ddr3_ext_phy_ctrl_const_regs);
    		printf("beagle_x15_emif2_ddr3_ext_phy_ctrl_const_regs\n");//raveen
    		break;
    	}
    }
    
    struct vcores_data beagle_x15_volts = {
    	.mpu.value[OPP_NOM]	= VDD_MPU_DRA7_NOM,
    	.mpu.efuse.reg[OPP_NOM]	= STD_FUSE_OPP_VMIN_MPU_NOM,
    	.mpu.efuse.reg_bits     = DRA752_EFUSE_REGBITS,
    	.mpu.addr		= TPS659038_REG_ADDR_SMPS12,
    	.mpu.pmic		= &tps659038,
    	.mpu.abb_tx_done_mask	= OMAP_ABB_MPU_TXDONE_MASK,
    
    	.eve.value[OPP_NOM]	= VDD_EVE_DRA7_NOM,
    	.eve.value[OPP_OD]	= VDD_EVE_DRA7_OD,
    	.eve.value[OPP_HIGH]	= VDD_EVE_DRA7_HIGH,
    	.eve.efuse.reg[OPP_NOM]	= STD_FUSE_OPP_VMIN_DSPEVE_NOM,
    	.eve.efuse.reg[OPP_OD]	= STD_FUSE_OPP_VMIN_DSPEVE_OD,
    	.eve.efuse.reg[OPP_HIGH]	= STD_FUSE_OPP_VMIN_DSPEVE_HIGH,
    	.eve.efuse.reg_bits	= DRA752_EFUSE_REGBITS,
    	.eve.addr		= TPS659038_REG_ADDR_SMPS45,
    	.eve.pmic		= &tps659038,
    	.eve.abb_tx_done_mask	= OMAP_ABB_EVE_TXDONE_MASK,
    
    	.gpu.value[OPP_NOM]	= VDD_GPU_DRA7_NOM,
    	.gpu.value[OPP_OD]	= VDD_GPU_DRA7_OD,
    	.gpu.value[OPP_HIGH]	= VDD_GPU_DRA7_HIGH,
    	.gpu.efuse.reg[OPP_NOM]	= STD_FUSE_OPP_VMIN_GPU_NOM,
    	.gpu.efuse.reg[OPP_OD]	= STD_FUSE_OPP_VMIN_GPU_OD,
    	.gpu.efuse.reg[OPP_HIGH]	= STD_FUSE_OPP_VMIN_GPU_HIGH,
    	.gpu.efuse.reg_bits	= DRA752_EFUSE_REGBITS,
    	.gpu.addr		= TPS659038_REG_ADDR_SMPS45,
    	.gpu.pmic		= &tps659038,
    	.gpu.abb_tx_done_mask	= OMAP_ABB_GPU_TXDONE_MASK,
    
    	.core.value[OPP_NOM]	= VDD_CORE_DRA7_NOM,
    	.core.efuse.reg[OPP_NOM]	= STD_FUSE_OPP_VMIN_CORE_NOM,
    	.core.efuse.reg_bits	= DRA752_EFUSE_REGBITS,
    	.core.addr		= TPS659038_REG_ADDR_SMPS6,
    	.core.pmic		= &tps659038,
    
    	.iva.value[OPP_NOM]	= VDD_IVA_DRA7_NOM,
    	.iva.value[OPP_OD]	= VDD_IVA_DRA7_OD,
    	.iva.value[OPP_HIGH]	= VDD_IVA_DRA7_HIGH,
    	.iva.efuse.reg[OPP_NOM]	= STD_FUSE_OPP_VMIN_IVA_NOM,
    	.iva.efuse.reg[OPP_OD]	= STD_FUSE_OPP_VMIN_IVA_OD,
    	.iva.efuse.reg[OPP_HIGH]	= STD_FUSE_OPP_VMIN_IVA_HIGH,
    	.iva.efuse.reg_bits	= DRA752_EFUSE_REGBITS,
    	.iva.addr		= TPS659038_REG_ADDR_SMPS45,
    	.iva.pmic		= &tps659038,
    	.iva.abb_tx_done_mask	= OMAP_ABB_IVA_TXDONE_MASK,
    };
    
    struct vcores_data am572x_idk_volts = {
    	.mpu.value[OPP_NOM]	= VDD_MPU_DRA7_NOM,
    	.mpu.efuse.reg[OPP_NOM]	= STD_FUSE_OPP_VMIN_MPU_NOM,
    	.mpu.efuse.reg_bits     = DRA752_EFUSE_REGBITS,
    	.mpu.addr		= TPS659038_REG_ADDR_SMPS12,
    	.mpu.pmic		= &tps659038,
    	.mpu.abb_tx_done_mask	= OMAP_ABB_MPU_TXDONE_MASK,
    
    	.eve.value[OPP_NOM]	= VDD_EVE_DRA7_NOM,
    	.eve.value[OPP_OD]	= VDD_EVE_DRA7_OD,
    	.eve.value[OPP_HIGH]	= VDD_EVE_DRA7_HIGH,
    	.eve.efuse.reg[OPP_NOM]	= STD_FUSE_OPP_VMIN_DSPEVE_NOM,
    	.eve.efuse.reg[OPP_OD]	= STD_FUSE_OPP_VMIN_DSPEVE_OD,
    	.eve.efuse.reg[OPP_HIGH]	= STD_FUSE_OPP_VMIN_DSPEVE_HIGH,
    	.eve.efuse.reg_bits	= DRA752_EFUSE_REGBITS,
    	.eve.addr		= TPS659038_REG_ADDR_SMPS45,
    	.eve.pmic		= &tps659038,
    	.eve.abb_tx_done_mask	= OMAP_ABB_EVE_TXDONE_MASK,
    
    	.gpu.value[OPP_NOM]	= VDD_GPU_DRA7_NOM,
    	.gpu.value[OPP_OD]	= VDD_GPU_DRA7_OD,
    	.gpu.value[OPP_HIGH]	= VDD_GPU_DRA7_HIGH,
    	.gpu.efuse.reg[OPP_NOM]	= STD_FUSE_OPP_VMIN_GPU_NOM,
    	.gpu.efuse.reg[OPP_OD]	= STD_FUSE_OPP_VMIN_GPU_OD,
    	.gpu.efuse.reg[OPP_HIGH]	= STD_FUSE_OPP_VMIN_GPU_HIGH,
    	.gpu.efuse.reg_bits	= DRA752_EFUSE_REGBITS,
    	.gpu.addr		= TPS659038_REG_ADDR_SMPS6,
    	.gpu.pmic		= &tps659038,
    	.gpu.abb_tx_done_mask	= OMAP_ABB_GPU_TXDONE_MASK,
    
    	.core.value[OPP_NOM]	= VDD_CORE_DRA7_NOM,
    	.core.efuse.reg[OPP_NOM]	= STD_FUSE_OPP_VMIN_CORE_NOM,
    	.core.efuse.reg_bits	= DRA752_EFUSE_REGBITS,
    	.core.addr		= TPS659038_REG_ADDR_SMPS7,
    	.core.pmic		= &tps659038,
    
    	.iva.value[OPP_NOM]	= VDD_IVA_DRA7_NOM,
    	.iva.value[OPP_OD]	= VDD_IVA_DRA7_OD,
    	.iva.value[OPP_HIGH]	= VDD_IVA_DRA7_HIGH,
    	.iva.efuse.reg[OPP_NOM]	= STD_FUSE_OPP_VMIN_IVA_NOM,
    	.iva.efuse.reg[OPP_OD]	= STD_FUSE_OPP_VMIN_IVA_OD,
    	.iva.efuse.reg[OPP_HIGH]	= STD_FUSE_OPP_VMIN_IVA_HIGH,
    	.iva.efuse.reg_bits	= DRA752_EFUSE_REGBITS,
    	.iva.addr		= TPS659038_REG_ADDR_SMPS8,
    	.iva.pmic		= &tps659038,
    	.iva.abb_tx_done_mask	= OMAP_ABB_IVA_TXDONE_MASK,
    };
    
    struct vcores_data am571x_idk_volts = {
    	.mpu.value[OPP_NOM]	= VDD_MPU_DRA7_NOM,
    	.mpu.efuse.reg[OPP_NOM]	= STD_FUSE_OPP_VMIN_MPU_NOM,
    	.mpu.efuse.reg_bits     = DRA752_EFUSE_REGBITS,
    	.mpu.addr		= TPS659038_REG_ADDR_SMPS12,
    	.mpu.pmic		= &tps659038,
    	.mpu.abb_tx_done_mask = OMAP_ABB_MPU_TXDONE_MASK,
    
    	.eve.value[OPP_NOM]	= VDD_EVE_DRA7_NOM,
    	.eve.value[OPP_OD]	= VDD_EVE_DRA7_OD,
    	.eve.value[OPP_HIGH]	= VDD_EVE_DRA7_HIGH,
    	.eve.efuse.reg[OPP_NOM]	= STD_FUSE_OPP_VMIN_DSPEVE_NOM,
    	.eve.efuse.reg[OPP_OD]	= STD_FUSE_OPP_VMIN_DSPEVE_OD,
    	.eve.efuse.reg[OPP_HIGH]	= STD_FUSE_OPP_VMIN_DSPEVE_HIGH,
    	.eve.efuse.reg_bits	= DRA752_EFUSE_REGBITS,
    	.eve.addr		= TPS659038_REG_ADDR_SMPS45,
    	.eve.pmic		= &tps659038,
    	.eve.abb_tx_done_mask	= OMAP_ABB_EVE_TXDONE_MASK,
    
    	.gpu.value[OPP_NOM]	= VDD_GPU_DRA7_NOM,
    	.gpu.value[OPP_OD]	= VDD_GPU_DRA7_OD,
    	.gpu.value[OPP_HIGH]	= VDD_GPU_DRA7_HIGH,
    	.gpu.efuse.reg[OPP_NOM]	= STD_FUSE_OPP_VMIN_GPU_NOM,
    	.gpu.efuse.reg[OPP_OD]	= STD_FUSE_OPP_VMIN_GPU_OD,
    	.gpu.efuse.reg[OPP_HIGH]	= STD_FUSE_OPP_VMIN_GPU_HIGH,
    	.gpu.efuse.reg_bits	= DRA752_EFUSE_REGBITS,
    	.gpu.addr		= TPS659038_REG_ADDR_SMPS6,
    	.gpu.pmic		= &tps659038,
    	.gpu.abb_tx_done_mask	= OMAP_ABB_GPU_TXDONE_MASK,
    
    	.core.value[OPP_NOM]	= VDD_CORE_DRA7_NOM,
    	.core.efuse.reg[OPP_NOM]	= STD_FUSE_OPP_VMIN_CORE_NOM,
    	.core.efuse.reg_bits	= DRA752_EFUSE_REGBITS,
    	.core.addr		= TPS659038_REG_ADDR_SMPS7,
    	.core.pmic		= &tps659038,
    
    	.iva.value[OPP_NOM]	= VDD_IVA_DRA7_NOM,
    	.iva.value[OPP_OD]	= VDD_IVA_DRA7_OD,
    	.iva.value[OPP_HIGH]	= VDD_IVA_DRA7_HIGH,
    	.iva.efuse.reg[OPP_NOM]	= STD_FUSE_OPP_VMIN_IVA_NOM,
    	.iva.efuse.reg[OPP_OD]	= STD_FUSE_OPP_VMIN_IVA_OD,
    	.iva.efuse.reg[OPP_HIGH]	= STD_FUSE_OPP_VMIN_IVA_HIGH,
    	.iva.efuse.reg_bits	= DRA752_EFUSE_REGBITS,
    	.iva.addr		= TPS659038_REG_ADDR_SMPS45,
    	.iva.pmic		= &tps659038,
    	.iva.abb_tx_done_mask	= OMAP_ABB_IVA_TXDONE_MASK,
    };
    
    int get_voltrail_opp(int rail_offset)
    {
    	int opp;
    
    	switch (rail_offset) {
    	case VOLT_MPU:
    		opp = DRA7_MPU_OPP;
    		break;
    	case VOLT_CORE:
    		opp = DRA7_CORE_OPP;
    		break;
    	case VOLT_GPU:
    		opp = DRA7_GPU_OPP;
    		break;
    	case VOLT_EVE:
    		opp = DRA7_DSPEVE_OPP;
    		break;
    	case VOLT_IVA:
    		opp = DRA7_IVA_OPP;
    		break;
    	default:
    		opp = OPP_NOM;
    	}
    
    	return opp;
    }
    
    
    #ifdef CONFIG_SPL_BUILD
    /* No env to setup for SPL */
    static inline void setup_board_eeprom_env(void) { }
    
    /* Override function to read eeprom information */
    void do_board_detect(void)
    {
    #ifdef CUSTOM_AM5718_SOM
    	printf("SOM:503 ti_i2c_eeprom_init\n");
    #else
    	int rc;
    
    	rc = ti_i2c_eeprom_am_get(CONFIG_EEPROM_BUS_ADDRESS,
    				  CONFIG_EEPROM_CHIP_ADDRESS);
    	if (rc)
    		printf("ti_i2c_eeprom_init failed %d\n", rc);
    #endif /* CUSTOM_AM5718_SOM */
    }
    
    #else	/* CONFIG_SPL_BUILD */
    
    /* Override function to read eeprom information: actual i2c read done by SPL*/
    void do_board_detect(void)
    {
    	char *bname = NULL;
    #ifdef CUSTOM_AM5718_SOM
    		printf("SOM:521 ti_i2c_eeprom_init\n");
    #else
    	int rc;
    
    	rc = ti_i2c_eeprom_am_get(CONFIG_EEPROM_BUS_ADDRESS,
    				  CONFIG_EEPROM_CHIP_ADDRESS);
    	if (rc)
    		printf("ti_i2c_eeprom_init failed %d\n", rc);
    #endif /* CUSTOM_AM5718_SOM */
    
    	if (board_is_x15())
    		bname = "BeagleBoard X15";
    	else if (board_is_am572x_evm())
    		bname = "AM572x EVM";
    	else if (board_is_am574x_idk())
    		bname = "AM574x IDK";
    	else if (board_is_am572x_idk())
    		bname = "AM572x IDK";
    	else if (board_is_am571x_idk())
    		bname = "AM571x IDK";
    
    	if (bname)
    		snprintf(sysinfo.board_string, SYSINFO_BOARD_NAME_MAX_LEN,
    			 "Board: %s REV %s\n", bname, board_ti_get_rev());
    }
    
    static void setup_board_eeprom_env(void)
    {
    #ifdef CUSTOM_AM5718_SOM
    	char *name = "am571x_idk";
    	set_board_info_env(name);
    #else
    char *name = "beagle_x15";
    	int rc;
    
    	rc = ti_i2c_eeprom_am_get(CONFIG_EEPROM_BUS_ADDRESS,
    				  CONFIG_EEPROM_CHIP_ADDRESS);
    	if (rc)
    		goto invalid_eeprom;
    
    	if (board_is_x15()) {
    		if (board_is_x15_revb1())
    			name = "beagle_x15_revb1";
    		else if (board_is_x15_revc())
    			name = "beagle_x15_revc";
    		else
    			name = "beagle_x15";
    	} else if (board_is_am572x_evm()) {
    		if (board_is_am572x_evm_reva3())
    			name = "am57xx_evm_reva3";
    		else
    			name = "am57xx_evm";
    	} else if (board_is_am574x_idk()) {
    		name = "am574x_idk";
    	} else if (board_is_am572x_idk()) {
    		name = "am572x_idk";
    	} else if (board_is_am571x_idk()) {
    		name = "am571x_idk";
    	} else {
    		printf("Unidentified board claims %s in eeprom header\n",
    		       board_ti_get_name());
    	}
    
    invalid_eeprom:
    	set_board_info_env(name);
    #endif /* CUSTOM_AM5718_SOM */
    	
    }
    
    #endif	/* CONFIG_SPL_BUILD */
    
    void vcores_init(void)
    {
    	if (board_is_am572x_idk() || board_is_am574x_idk())
    		*omap_vcores = &am572x_idk_volts;
    	else if (board_is_am571x_idk())
    		*omap_vcores = &am571x_idk_volts;
    	else
    		*omap_vcores = &beagle_x15_volts;
    }
    
    void hw_data_init(void)
    {
    	*prcm = &dra7xx_prcm;
    	if (is_dra72x())
    		*dplls_data = &dra72x_dplls;
    	else if (is_dra76x())
    		*dplls_data = &dra76x_dplls;
    	else
    		*dplls_data = &dra7xx_dplls;
    	*ctrl = &dra7xx_ctrl;
    }
    
    bool am571x_idk_needs_lcd(void)
    {
    	bool needs_lcd;
    
    	gpio_request(GPIO_ETH_LCD, "nLCD_Detect");
    	if (gpio_get_value(GPIO_ETH_LCD))
    		needs_lcd = false;
    	else
    		needs_lcd = true;
    
    	gpio_free(GPIO_ETH_LCD);
    
    	return needs_lcd;
    }
    
    int board_init(void)
    {
    	gpmc_init();
    	gd->bd->bi_boot_params = (CONFIG_SYS_SDRAM_BASE + 0x100);
    
    	return 0;
    }
    
    void am57x_idk_lcd_detect(void)
    {
    	int r = -ENODEV;
    	char *idk_lcd = "no";
    	uint8_t buf = 0;
    
    	/* Only valid for IDKs */
    	if (board_is_x15() || board_is_am572x_evm())
    		return;
    
    	/* Only AM571x IDK has gpio control detect.. so check that */
    	if (board_is_am571x_idk() && !am571x_idk_needs_lcd())
    		goto out;
    
    	r = i2c_set_bus_num(OSD_TS_FT_BUS_ADDRESS);
    	if (r) {
    		printf("%s: Failed to set bus address to %d: %d\n",
    		       __func__, OSD_TS_FT_BUS_ADDRESS, r);
    		goto out;
    	}
    	r = i2c_probe(OSD_TS_FT_CHIP_ADDRESS);
    	if (r) {
    		/* AM572x IDK has no explicit settings for optional LCD kit */
    		if (board_is_am571x_idk()) {
    			printf("%s: Touch screen detect failed: %d!\n",
    			       __func__, r);
    		}
    		goto out;
    	}
    
    	/* Read FT ID */
    	r = i2c_read(OSD_TS_FT_CHIP_ADDRESS, OSD_TS_FT_REG_ID, 1, &buf, 1);
    	if (r) {
    		printf("%s: Touch screen ID read %d:0x%02x[0x%02x] failed:%d\n",
    		       __func__, OSD_TS_FT_BUS_ADDRESS, OSD_TS_FT_CHIP_ADDRESS,
    		       OSD_TS_FT_REG_ID, r);
    		goto out;
    	}
    
    	switch (buf) {
    	case OSD_TS_FT_ID_5606:
    		idk_lcd = "osd101t2045";
    		break;
    	case OSD_TS_FT_ID_5x46:
    		idk_lcd = "osd101t2587";
    		break;
    	default:
    		printf("%s: Unidentifed Touch screen ID 0x%02x\n",
    		       __func__, buf);
    		/* we will let default be "no lcd" */
    	}
    out:
    	env_set("idk_lcd", idk_lcd);
    
    	/*
    	 * On AM571x_IDK, no Display with J51 set to LCD is considered as an
    	 * invalid configuration and we prevent boot to get user attention.
    	 */
    	if (board_is_am571x_idk() && am571x_idk_needs_lcd() &&
    	    !strncmp(idk_lcd, "no", 2)) {
    		printf("%s: Invalid HW configuration: display not detected/supported but J51 is set. Remove J51 to boot without display.\n",
    		       __func__);
    		hang();
    	}
    
    	return;
    }
    
    #if CONFIG_IS_ENABLED(DM_USB) && CONFIG_IS_ENABLED(OF_CONTROL)
    static int device_okay(const char *path)
    {
    	int node;
    
    	node = fdt_path_offset(gd->fdt_blob, path);
    	if (node < 0)
    		return 0;
    
    	return fdtdec_get_is_enabled(gd->fdt_blob, node);
    }
    #endif
    
    int board_late_init(void)
    {
    	setup_board_eeprom_env();
    	u8 val;
    
    	/*
    	 * DEV_CTRL.DEV_ON = 1 please - else palmas switches off in 8 seconds
    	 * This is the POWERHOLD-in-Low behavior.
    	 */
    	palmas_i2c_write_u8(TPS65903X_CHIP_P1, 0xA0, 0x1);
    
    	/*
    	 * Default FIT boot on HS devices. Non FIT images are not allowed
    	 * on HS devices.
    	 */
    	if (get_device_type() == HS_DEVICE)
    		env_set("boot_fit", "1");
    
    	/*
    	 * Set the GPIO7 Pad to POWERHOLD. This has higher priority
    	 * over DEV_CTRL.DEV_ON bit. This can be reset in case of
    	 * PMIC Power off. So to be on the safer side set it back
    	 * to POWERHOLD mode irrespective of the current state.
    	 */
    	palmas_i2c_read_u8(TPS65903X_CHIP_P1, TPS65903X_PRIMARY_SECONDARY_PAD2,
    			   &val);
    	val = val | TPS65903X_PAD2_POWERHOLD_MASK;
    	palmas_i2c_write_u8(TPS65903X_CHIP_P1, TPS65903X_PRIMARY_SECONDARY_PAD2,
    			    val);
    
    	omap_die_id_serial();
    	omap_set_fastboot_vars();
    
    	//am57x_idk_lcd_detect(); //raveen
    //No Need LCD for this project
    /*#if !defined(CONFIG_SPL_BUILD)
    	board_ti_set_ethaddr(2);
    #endif*/  //raveen
    #if CONFIG_IS_ENABLED(DM_USB) && CONFIG_IS_ENABLED(OF_CONTROL)
    	if (device_okay("/ocp/omap_dwc3_1@48880000"))
    		enable_usb_clocks(0);
    	if (device_okay("/ocp/omap_dwc3_2@488c0000"))
    		enable_usb_clocks(1);
    #endif
    	return 0;
    }
    
    void set_muxconf_regs(void)
    {
    	do_set_mux32((*ctrl)->control_padconf_core_base,
    		     early_padconf, ARRAY_SIZE(early_padconf));
    }
    
    #ifdef CONFIG_IODELAY_RECALIBRATION
    void recalibrate_iodelay(void)
    {
    	const struct pad_conf_entry *pconf;
    	const struct iodelay_cfg_entry *iod, *delta_iod;
    	int pconf_sz, iod_sz, delta_iod_sz = 0;
    	int ret;
    
    	if (board_is_am572x_idk()) {
    		pconf = core_padconf_array_essential_am572x_idk;
    		pconf_sz = ARRAY_SIZE(core_padconf_array_essential_am572x_idk);
    		iod = iodelay_cfg_array_am572x_idk;
    		iod_sz = ARRAY_SIZE(iodelay_cfg_array_am572x_idk);
    	} else if (board_is_am574x_idk()) {
    		pconf = core_padconf_array_essential_am574x_idk;
    		pconf_sz = ARRAY_SIZE(core_padconf_array_essential_am574x_idk);
    		iod = iodelay_cfg_array_am574x_idk;
    		iod_sz = ARRAY_SIZE(iodelay_cfg_array_am574x_idk);
    	} else if (board_is_am571x_idk()) {
    		pconf = core_padconf_array_essential_am571x_idk;
    		pconf_sz = ARRAY_SIZE(core_padconf_array_essential_am571x_idk);
    		iod = iodelay_cfg_array_am571x_idk;
    		iod_sz = ARRAY_SIZE(iodelay_cfg_array_am571x_idk);
    	} else {
    		/* Common for X15/GPEVM */
    		pconf = core_padconf_array_essential_x15;
    		pconf_sz = ARRAY_SIZE(core_padconf_array_essential_x15);
    		/* There never was an SR1.0 X15.. So.. */
    		if (omap_revision() == DRA752_ES1_1) {
    			iod = iodelay_cfg_array_x15_sr1_1;
    			iod_sz = ARRAY_SIZE(iodelay_cfg_array_x15_sr1_1);
    		} else {
    			/* Since full production should switch to SR2.0  */
    			iod = iodelay_cfg_array_x15_sr2_0;
    			iod_sz = ARRAY_SIZE(iodelay_cfg_array_x15_sr2_0);
    		}
    	}
    
    	/* Setup I/O isolation */
    	ret = __recalibrate_iodelay_start();
    	if (ret)
    		goto err;
    
    	/* Do the muxing here */
    	do_set_mux32((*ctrl)->control_padconf_core_base, pconf, pconf_sz);
    
    	/* Now do the weird minor deltas that should be safe */
    	if (board_is_x15() || board_is_am572x_evm()) {
    		if (board_is_x15_revb1() || board_is_am572x_evm_reva3() ||
    		    board_is_x15_revc()) {
    			pconf = core_padconf_array_delta_x15_sr2_0;
    			pconf_sz = ARRAY_SIZE(core_padconf_array_delta_x15_sr2_0);
    		} else {
    			pconf = core_padconf_array_delta_x15_sr1_1;
    			pconf_sz = ARRAY_SIZE(core_padconf_array_delta_x15_sr1_1);
    		}
    		do_set_mux32((*ctrl)->control_padconf_core_base, pconf, pconf_sz);
    	}
    
    	if (board_is_am571x_idk()) {
    		//No Need LCD for this project
    		//if (am571x_idk_needs_lcd()) {//raveen
    		if(0){  //raveen 
    			pconf = core_padconf_array_vout_am571x_idk;
    			pconf_sz = ARRAY_SIZE(core_padconf_array_vout_am571x_idk);
    			delta_iod = iodelay_cfg_array_am571x_idk_4port;
    			delta_iod_sz = ARRAY_SIZE(iodelay_cfg_array_am571x_idk_4port);
    
    		} else {
    			pconf = core_padconf_array_icss1eth_am571x_idk;
    			pconf_sz = ARRAY_SIZE(core_padconf_array_icss1eth_am571x_idk);
    		}
    		do_set_mux32((*ctrl)->control_padconf_core_base, pconf, pconf_sz);
    	}
    
    	/* Setup IOdelay configuration */
    	ret = do_set_iodelay((*ctrl)->iodelay_config_base, iod, iod_sz);
    	if (delta_iod_sz)
    		ret = do_set_iodelay((*ctrl)->iodelay_config_base, delta_iod,
    				     delta_iod_sz);
    
    err:
    	/* Closeup.. remove isolation */
    	__recalibrate_iodelay_end(ret);
    }
    #endif
    
    #if defined(CONFIG_MMC)
    int board_mmc_init(bd_t *bis)
    {
    	omap_mmc_init(0, 0, 0, -1, -1);
    	omap_mmc_init(1, 0, 0, -1, -1);
    	return 0;
    }
    
    static const struct mmc_platform_fixups am57x_es1_1_mmc1_fixups = {
    	.hw_rev = "rev11",
    	.unsupported_caps = MMC_CAP(MMC_HS_200) |
    			    MMC_CAP(UHS_SDR104),
    	.max_freq = 96000000,
    };
    
    static const struct mmc_platform_fixups am57x_es1_1_mmc23_fixups = {
    	.hw_rev = "rev11",
    	.unsupported_caps = MMC_CAP(MMC_HS_200) |
    			    MMC_CAP(UHS_SDR104) |
    			    MMC_CAP(UHS_SDR50),
    	.max_freq = 48000000,
    };
    
    const struct mmc_platform_fixups *platform_fixups_mmc(uint32_t addr)
    {
    	switch (omap_revision()) {
    	case DRA752_ES1_0:
    	case DRA752_ES1_1:
    		if (addr == OMAP_HSMMC1_BASE)
    			return &am57x_es1_1_mmc1_fixups;
    		else
    			return &am57x_es1_1_mmc23_fixups;
    	default:
    		return NULL;
    	}
    }
    #endif
    
    #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_OS_BOOT)
    int spl_start_uboot(void)
    {
    	/* break into full u-boot on 'c' */
    	if (serial_tstc() && serial_getc() == 'c')
    		return 1;
    
    #ifdef CONFIG_SPL_ENV_SUPPORT
    	env_init();
    	env_load();
    	if (env_get_yesno("boot_os") != 1)
    		return 1;
    #endif
    
    	return 0;
    }
    #endif
    
    #ifdef CONFIG_USB_DWC3
    static struct dwc3_device usb_otg_ss1 = {
    	.maximum_speed = USB_SPEED_SUPER,
    	.base = DRA7_USB_OTG_SS1_BASE,
    	.tx_fifo_resize = false,
    	.index = 0,
    };
    
    static struct dwc3_omap_device usb_otg_ss1_glue = {
    	.base = (void *)DRA7_USB_OTG_SS1_GLUE_BASE,
    	.utmi_mode = DWC3_OMAP_UTMI_MODE_SW,
    	.index = 0,
    };
    
    static struct ti_usb_phy_device usb_phy1_device = {
    	.pll_ctrl_base = (void *)DRA7_USB3_PHY1_PLL_CTRL,
    	.usb2_phy_power = (void *)DRA7_USB2_PHY1_POWER,
    	.usb3_phy_power = (void *)DRA7_USB3_PHY1_POWER,
    	.index = 0,
    };
    
    
    static struct dwc3_device usb_otg_ss2 = {
    	.maximum_speed = USB_SPEED_HIGH,
    	.base = DRA7_USB_OTG_SS2_BASE,
    	.tx_fifo_resize = false,
    	.index = 1,
    };
    
    static struct dwc3_omap_device usb_otg_ss2_glue = {
    	.base = (void *)DRA7_USB_OTG_SS2_GLUE_BASE,
    	.utmi_mode = DWC3_OMAP_UTMI_MODE_SW,
    	.index = 1,
    };
    
    static struct ti_usb_phy_device usb_phy2_device = {
    	.usb2_phy_power = (void *)DRA7_USB2_PHY2_POWER,
    	.index = 1,
    };
    
    int usb_gadget_handle_interrupts(int index)
    {
    	u32 status;
    
    	status = dwc3_omap_uboot_interrupt_status(index);
    	if (status)
    		dwc3_uboot_handle_interrupt(index);
    
    	return 0;
    }
    #endif /* CONFIG_USB_DWC3 */
    
    #if defined(CONFIG_USB_DWC3) || defined(CONFIG_USB_XHCI_OMAP)
    int board_usb_init(int index, enum usb_init_type init)
    {
    	enable_usb_clocks(index);
    	switch (index) {
    	case 0:
    		if (init == USB_INIT_DEVICE) {
    			//USB upgrading Patch Update
    			/*printf("port %d can't be used as device\n", index);
    			disable_usb_clocks(index);
    			return -EINVAL;*/  //raveen
    #ifdef CONFIG_USB_DWC3
    			usb_otg_ss1.dr_mode = USB_DR_MODE_PERIPHERAL;
    			usb_otg_ss1_glue.vbus_id_status = OMAP_DWC3_VBUS_VALID;
    			ti_usb_phy_uboot_init(&usb_phy1_device);
    			dwc3_omap_uboot_init(&usb_otg_ss1_glue);
    			dwc3_uboot_init(&usb_otg_ss1);
    #endif
    		}
    		break;
    	case 1:
    		if (init == USB_INIT_DEVICE) {
    #ifdef CONFIG_USB_DWC3
    			usb_otg_ss2.dr_mode = USB_DR_MODE_PERIPHERAL;
    			usb_otg_ss2_glue.vbus_id_status = OMAP_DWC3_VBUS_VALID;
    			ti_usb_phy_uboot_init(&usb_phy2_device);
    			dwc3_omap_uboot_init(&usb_otg_ss2_glue);
    			dwc3_uboot_init(&usb_otg_ss2);
    #endif
    		} else {
    			printf("port %d can't be used as host\n", index);
    			disable_usb_clocks(index);
    			return -EINVAL;
    		}
    
    		break;
    	default:
    		printf("Invalid Controller Index\n");
    	}
    
    	return 0;
    }
    
    int board_usb_cleanup(int index, enum usb_init_type init)
    {
    #ifdef CONFIG_USB_DWC3
    	switch (index) {
    	case 0:
    	case 1:
    		if (init == USB_INIT_DEVICE) {
    			ti_usb_phy_uboot_exit(index);
    			dwc3_uboot_exit(index);
    			dwc3_omap_uboot_exit(index);
    		}
    		break;
    	default:
    		printf("Invalid Controller Index\n");
    	}
    #endif
    	disable_usb_clocks(index);
    	return 0;
    }
    #endif /* defined(CONFIG_USB_DWC3) || defined(CONFIG_USB_XHCI_OMAP) */
    
    #ifdef CONFIG_DRIVER_TI_CPSW
    
    /* Delay value to add to calibrated value */
    #define RGMII0_TXCTL_DLY_VAL		((0x3 << 5) + 0x8)
    #define RGMII0_TXD0_DLY_VAL		((0x3 << 5) + 0x8)
    #define RGMII0_TXD1_DLY_VAL		((0x3 << 5) + 0x2)
    #define RGMII0_TXD2_DLY_VAL		((0x4 << 5) + 0x0)
    #define RGMII0_TXD3_DLY_VAL		((0x4 << 5) + 0x0)
    #define VIN2A_D13_DLY_VAL		((0x3 << 5) + 0x8)
    #define VIN2A_D17_DLY_VAL		((0x3 << 5) + 0x8)
    #define VIN2A_D16_DLY_VAL		((0x3 << 5) + 0x2)
    #define VIN2A_D15_DLY_VAL		((0x4 << 5) + 0x0)
    #define VIN2A_D14_DLY_VAL		((0x4 << 5) + 0x0)
    
    static void cpsw_control(int enabled)
    {
    	/* VTP can be added here */
    }
    
    static struct cpsw_slave_data cpsw_slaves[] = {
    	{
    		.slave_reg_ofs	= 0x208,
    		.sliver_reg_ofs	= 0xd80,
    		.phy_addr	= 1,
    	},
    	{
    		.slave_reg_ofs	= 0x308,
    		.sliver_reg_ofs	= 0xdc0,
    		.phy_addr	= 2,
    	},
    };
    
    static struct cpsw_platform_data cpsw_data = {
    	.mdio_base		= CPSW_MDIO_BASE,
    	.cpsw_base		= CPSW_BASE,
    	.mdio_div		= 0xff,
    	.channels		= 8,
    	.cpdma_reg_ofs		= 0x800,
    	.slaves			= 1,
    	.slave_data		= cpsw_slaves,
    	.ale_reg_ofs		= 0xd00,
    	.ale_entries		= 1024,
    	.host_port_reg_ofs	= 0x108,
    	.hw_stats_reg_ofs	= 0x900,
    	.bd_ram_ofs		= 0x2000,
    	.mac_control		= (1 << 5),
    	.control		= cpsw_control,
    	.host_port_num		= 0,
    	.version		= CPSW_CTRL_VERSION_2,
    };
    
    static u64 mac_to_u64(u8 mac[6])
    {
    	int i;
    	u64 addr = 0;
    
    	for (i = 0; i < 6; i++) {
    		addr <<= 8;
    		addr |= mac[i];
    	}
    
    	return addr;
    }
    
    static void u64_to_mac(u64 addr, u8 mac[6])
    {
    	mac[5] = addr;
    	mac[4] = addr >> 8;
    	mac[3] = addr >> 16;
    	mac[2] = addr >> 24;
    	mac[1] = addr >> 32;
    	mac[0] = addr >> 40;
    }
    
    int board_eth_init(bd_t *bis)
    {
    	int ret;
    	uint8_t mac_addr[6];
    	uint32_t mac_hi, mac_lo;
    	uint32_t ctrl_val;
    	int i;
    	u64 mac1, mac2;
    	u8 mac_addr1[6], mac_addr2[6];
    	int num_macs;
    
    	/* try reading mac address from efuse */
    	mac_lo = readl((*ctrl)->control_core_mac_id_0_lo);
    	mac_hi = readl((*ctrl)->control_core_mac_id_0_hi);
    	mac_addr[0] = (mac_hi & 0xFF0000) >> 16;
    	mac_addr[1] = (mac_hi & 0xFF00) >> 8;
    	mac_addr[2] = mac_hi & 0xFF;
    	mac_addr[3] = (mac_lo & 0xFF0000) >> 16;
    	mac_addr[4] = (mac_lo & 0xFF00) >> 8;
    	mac_addr[5] = mac_lo & 0xFF;
    
    	if (!env_get("ethaddr")) {
    		printf("<ethaddr> not set. Validating first E-fuse MAC\n");
    
    		if (is_valid_ethaddr(mac_addr))
    			eth_env_set_enetaddr("ethaddr", mac_addr);
    	}
    
    	mac_lo = readl((*ctrl)->control_core_mac_id_1_lo);
    	mac_hi = readl((*ctrl)->control_core_mac_id_1_hi);
    	mac_addr[0] = (mac_hi & 0xFF0000) >> 16;
    	mac_addr[1] = (mac_hi & 0xFF00) >> 8;
    	mac_addr[2] = mac_hi & 0xFF;
    	mac_addr[3] = (mac_lo & 0xFF0000) >> 16;
    	mac_addr[4] = (mac_lo & 0xFF00) >> 8;
    	mac_addr[5] = mac_lo & 0xFF;
    
    	if (!env_get("eth1addr")) {
    		if (is_valid_ethaddr(mac_addr))
    			eth_env_set_enetaddr("eth1addr", mac_addr);
    	}
    
    	ctrl_val = readl((*ctrl)->control_core_control_io1) & (~0x33);
    	ctrl_val |= 0x22;
    	writel(ctrl_val, (*ctrl)->control_core_control_io1);
    
    	/* The phy address for the AM57xx IDK are different than x15 */
    	if (board_is_am572x_idk() || board_is_am571x_idk() ||
    	    board_is_am574x_idk()) {
    		cpsw_data.slave_data[0].phy_addr = 0;
    		cpsw_data.slave_data[1].phy_addr = 1;
    	}
    
    	ret = cpsw_register(&cpsw_data);
    	if (ret < 0)
    		printf("Error %d registering CPSW switch\n", ret);
    
    	/*
    	 * Export any Ethernet MAC addresses from EEPROM.
    	 * On AM57xx the 2 MAC addresses define the address range
    	 */
    	board_ti_get_eth_mac_addr(0, mac_addr1);
    	board_ti_get_eth_mac_addr(1, mac_addr2);
    
    	if (is_valid_ethaddr(mac_addr1) && is_valid_ethaddr(mac_addr2)) {
    		mac1 = mac_to_u64(mac_addr1);
    		mac2 = mac_to_u64(mac_addr2);
    
    		/* must contain an address range */
    		num_macs = mac2 - mac1 + 1;
    		/* <= 50 to protect against user programming error */
    		if (num_macs > 0 && num_macs <= 50) {
    			for (i = 0; i < num_macs; i++) {
    				u64_to_mac(mac1 + i, mac_addr);
    				if (is_valid_ethaddr(mac_addr)) {
    					eth_env_set_enetaddr_by_index("eth",
    								      i + 2,
    								      mac_addr);
    				}
    			}
    		}
    	}
    
    	return ret;
    }
    #endif
    
    #ifdef CONFIG_BOARD_EARLY_INIT_F
    /* VTT regulator enable */
    static inline void vtt_regulator_enable(void)
    {
    	if (omap_hw_init_context() == OMAP_INIT_CONTEXT_UBOOT_AFTER_SPL)
    		return;
    
    	gpio_request(GPIO_DDR_VTT_EN, "ddr_vtt_en");
    	gpio_direction_output(GPIO_DDR_VTT_EN, 1);
    }
    
    int board_early_init_f(void)
    {
    	vtt_regulator_enable();
    	return 0;
    }
    #endif
    
    #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
    int ft_board_setup(void *blob, bd_t *bd)
    {
    	ft_cpu_setup(blob, bd);
    
    	return 0;
    }
    #endif
    
    #ifdef CONFIG_SPL_LOAD_FIT
    int board_fit_config_name_match(const char *name)
    {
    	debug("board_fit_config_name_match name : <%s> \n",name);//raveen
    	if (board_is_x15()) {
    		printf("Board Selected >>>>  %s  <<<<<<\n",name);//raveen
    		if (board_is_x15_revb1()) {
    			if (!strcmp(name, "am57xx-beagle-x15-revb1"))
    				return 0;
    		} else if (board_is_x15_revc()) {
    			if (!strcmp(name, "am57xx-beagle-x15-revc"))
    				return 0;
    		} else if (!strcmp(name, "am57xx-beagle-x15")) {
    			return 0;
    		}
    	} else if (board_is_am572x_evm() &&
    		   !strcmp(name, "am57xx-beagle-x15")) {
    		printf("Board Selected >>>>  %s  <<<<<<\n",name);//raveen
    		return 0;
    	} else if (board_is_am572x_idk() && !strcmp(name, "am572x-idk")) {
    		printf("Board Selected >>>>  %s  <<<<<<\n",name);//raveen
    		return 0;
    	} else if (board_is_am574x_idk() && !strcmp(name, "am574x-idk")) {
    		printf("Board Selected >>>>  %s  <<<<<<\n",name);//raveen
    		return 0;
    	} else if (board_is_am571x_idk() && !strcmp(name, "am571x-idk")) {
    		printf("Board Selected >>>>  %s  <<<<<<\n",name);//raveen
    		return 0;
    	}
    
    	return -1;
    }
    #endif
    
    #ifdef CONFIG_TI_SECURE_DEVICE
    void board_fit_image_post_process(void **p_image, size_t *p_size)
    {
    	secure_boot_verify_image(p_image, p_size);
    }
    
    void board_tee_image_process(ulong tee_image, size_t tee_size)
    {
    	secure_tee_install((u32)tee_image);
    }
    
    U_BOOT_FIT_LOADABLE_HANDLER(IH_TYPE_TEE, board_tee_image_process);
    #endif
    

    Regards,
    Ravi

  • Hi Krunal,

    Pease let us know if you have any updates. Which help us to resolve this issue.

    Regards,
    Ravi
  • Ravi, i still see discrepancies in a lot of the EXT_PHY_CONTROL registers between the spreadsheet and the DSS script. Below is just an example:


    EMIF_EXT_PHY_CONTROL_2 = 0x07000071
    EMIF_EXT_PHY_CONTROL_3 = 0x07000086
    EMIF_EXT_PHY_CONTROL_4 = 0x07000088
    EMIF_EXT_PHY_CONTROL_5 = 0x07000090
    EMIF_EXT_PHY_CONTROL_6 = 0x07000700

    0x006B0094, // EMIF1_EXT_PHY_CTRL_2
    0x006B008F, // EMIF1_EXT_PHY_CTRL_3
    0x006B0088, // EMIF1_EXT_PHY_CTRL_4
    0x006B0082, // EMIF1_EXT_PHY_CTRL_5
    0x006B006B, // EMIF1_EXT_PHY_CTRL_6

    Please ensure all of these values (check all 36 register values) get copied over into your source code.

    Regards,
    James
  • Hi James,

    Those values changed frequently, we checked on both AM5718-IDK as well as our custom board

    Pleas find the attachment in that you can find same value in both EMIF tool spreadsheet and board.c 

    Regards,

    Ravi

    AM5718_DDR_CONFIG_TEST_22May2019.zip

  • Hi James,

    Those values changed frequently, we checked on both AM5718-IDK as well as our custom board

    Pleas find the attachment in that you can find same value in both EMIF tool spreadsheet and board.c 

    We are  looking forward for your replay.

    Regards,

    Ravi

    8741.AM5718_DDR_CONFIG_TEST_22May2019.zip

  • Hi James,

    We try to do debugging  uboot from CCS,u-boot-spl loaded and executed successfully.

    Then we try to load u-boot, for this we get following error

    CortexA15_0: File Loader: Verification failed: Values at address 0x80800000 do not match Please verify target memory and memory map.

    CortexA15_0: GEL: File: /home/firmware/ti-processor-sdk-linux-am57xx-evm-05.03.00.07/board-support/u-boot-2018.01+gitAUTOINC+313dcd69c2-g825ac6e1ac/u-boot: a data verification error occurred, file load failed.

    CortexA15_0: Unable to terminate memory download: NULL buffer pointer at 0x3aa4 (Emulation package 8.1.0.00007)

    We updated "AM571x_ddr_config.gel"  with respect  to our EMIF spreadsheet registers value but in "LISA_MAP" we didn't change because it look vise versa.

    I attached our EMIF spreadsheet and gel file for your reference

    Regards,

    Ravi

    AM5718_DDR_CONFG_GEL_FILE_22May19.zip

  • Hi Ravi,

    Those values changed frequently, we checked on both AM5718-IDK as well as our custom board

    Could you please explain what you mean by values frequently changing?

    Regards,

    Krunal 

  • We do the testing for multiple times and we noticed some of the "EMIF_EXT_PHY_CONTROL_*" are changing every time we run this "am57xx-ddr.dss" script.

    Same behaviour observed in both AM5718-IDK and Custom board.

    Regards,

    Ravi

  • Ravi, the EMIF_EXT_PHY_CONTROL_* registers should not be changing on successive runs of the DSS script. This may be the root of your problem. The EMIF_EXT_PHY_STATUS_* registers may change. Can you post successive runs of the DSS script.

    Regards,
    James
  • Hi James,

    Even though EMIF_EXT_PHY_CONTROL_* registers change in AM5718-IDK it's working fine, u-boot booted successfully.

    What is the cause of change value in EMIF registers and  can you please guide us how to make EMIF_EXT_PHY_CONTROL_* registers static.

    In the mean time I will try to check all EMIF registers value via JTAG.

    We are looking forward for your replay ASAP.

    Regards,

    Ravi

  • Ravi, the EXT_PHY_CONTROL registers can only change with software writes. So after your board fails to boot, those values should be consistent with multiple runs of the DSS script. Please post successive runs of the script after a failure.

    Regards,
    James
  • Hi james,

    We found A14 is root cause for this issue,we replace with 256MB RAM chip now we got u-boot console.

    Thanks for your support.

    Regards,

    Ravi