Hi,
I have read this link:http://processors.wiki.ti.com/index.php/Keystone_SoC_Level_Optimizations#Maximum_Bandwidths
How to calulate Emif16 bandwidth?
1、EMA_CLK(EMIF CLOCK)=100MHZ
SETUP+STROBE+HOLD=1
100mhz/1*16bit
OR
2、EMA_CLK(EMIF CLOCK)=100MHZ
SETUP+STROBE+HOLD=3
100mhz/3*16bit*2(2 cycles per peroid)
What's correct calculition? Please help explain in detail.
