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CCS/TMS320C6678: ISR execute and receive data process in the hyplnk_exampleProject

Part Number: TMS320C6678

Tool/software: Code Composer Studio


Hi.

I use evm6678, MCSDK 2.1.2.6 and CCS 8.3.

I am going to use the HyperLink function in addition to the customer's request.
The customer's board has two 6678 DSPs designed.
So I'm trying to test the example project from EVM6678 to LOOPBACK mode, but I don't understand, so I ask.

(hyplnk_exampleProject)

First, I removed the annotation. Then I do an experiment.
 #define hypplnk_EXAMPLE_LOOPBACK


1) The ISR was initialized in the example project, but the ISR function was not executed. (void hypplnkExampleIsr (void *eventId)
 - ISR not running in LOOPBACK mode?
 - ISR running in Two 6678 DSP?

2) When the void hypplnkExampleIsr (void *eventId) function is executed, the transmitted data must be read. However, there was no function within the function to read or process the transmitted data.
 - How do I check the data sent each time an interrupt is run?   ...   dataBuffer?~ Read whenever the receiving ISR is executed.!?~

Test LOG data as see below

//####################################################################################################

[C66xx_0] Version #: 0x01000105; string HYPLNK LLD Revision: 01.00.01.05:Nov 19 2012:16:04:15
About to do system setup (PLL, PSC, and DDR)
Power domain is already enabled.  You probably re-ran without device reset (which is OK)
Constructed SERDES configs: PLL=0x00000228; RX=0x0046c485; TX=0x000cc305
system setup worke
About to set up HyperLink Peripheral
============== begin registers before initialization ===========
Revision register contents:
  Raw    = 0x4e901900
Status register contents:
  Raw        = 0x00002004
Link status register contents:
  Raw       = 0x00000000
Control register contents:
  Raw             = 0x00000001
Control register contents:
  Raw        = 0x00000000
============== end registers before initialization ===========
SERDES_STS (32 bits) contents: 0x00000001; lock = 1
============== begin registers after initialization ===========
Status register contents:
  Raw        = 0x04400005
Link status register contents:
  Raw       = 0xccf00cf0
Control register contents:
  Raw             = 0x00006202
============== end registers after initialization ===========
Waiting 5 seconds to check link stability
Precursors 0 Analysis: 1,0,1,0,0,1,0,0
Postcursors: 19 Analysis: 0,1,1,0,0,1,0,1
Link seems stable
About to try to read remote registers
============== begin REMOTE registers after initialization ===========
Status register contents:
  Raw        = 0x0440080f
Link status register contents:
  Raw       = 0xfdf0bdf0
Control register contents:
  Raw             = 0x00006202
============== end REMOTE registers after initialization ===========
Peripheral setup worked
About to read/write once
Single write test passed
About to pass 65536 tokens; iteration = 0
=== this is not an optimized example ===
Link Speed is 4 * 6.25 Gbps
Passed 65536 tokens round trip (read+write through hyplnk) in 16222 Mcycles
Approximately 247535 cycles per round-trip
=== this is not an optimized example ===
Checking statistics
About to pass 65536 tokens; iteration = 1
=== this is not an optimized example ===
Link Speed is 4 * 6.25 Gbps
Passed 65536 tokens round trip (read+write through hyplnk) in 16222 Mcycles
Approximately 247535 cycles per round-trip
=== this is not an optimized example ===
Checking statistics
About to pass 65536 tokens; iteration = 2
=== this is not an optimized example ===
Link Speed is 4 * 6.25 Gbps
Passed 65536 tokens round trip (read+write through hyplnk) in 16222 Mcycles
Approximately 247535 cycles per round-trip
=== this is not an optimized example ===
Checking statistics
About to pass 65536 tokens; iteration = 3
=== this is not an optimized example ===
Link Speed is 4 * 6.25 Gbps
Passed 65536 tokens round trip (read+write through hyplnk) in 16222 Mcycles
Approximately 247535 cycles per round-trip

//####################################################################################################

Thanks.

  • Hi,

    Not sure what is the case in MCSDK (this is an outdated RTOS version). In Processor SDK RTOS:

    1. The ISR is working in loopback mode (from what I see on first glance of the code).

    2. The hyplnk example generates only error interrupts as far as I see from hyplnkIsr.c

    You can take a look at the release notes: software-dl.ti.com/.../index_device_drv.html

    Best Regards,
    Yordan
  • Thanks.

    I use MCSDK 2.1.2.6.

    I might have misunderstood the code.

    Then there's a question.
    When the sender receives the data, how does the receiver know that the data was received?
    Wouldn't data be written and erased in the same space?

  • Hi,

    As I said these were my initial findings from glancing the code (I may have missed something). Let me do a more detailed search and I will provide my feedback.

    Best Regards,
    Yordan
  • Hi.
    Thank you for your reply.

    I confirmed what you said. (Error ISR)  ...  The example project had been set to intlocal = 1, int2cfg = 0, so I thought it was not caught in LOOPBACK mode.
    In general, ISR was mistaken because it thought it would confirm and process reception. I'll analyze it a little more.
     
    When the sender sends the data, the receiver must handle the delivered data without omission.
    How do you process reception?   (Question same as see above.)

  • Hi.

    I'm trying to connect two DSPs and send and receive data.
    But now I have one evm6678 board.

    In the example project provided, the LOOPBACK mode can be used on one evm6678 board to test the function??
    In the example project code, the intlocal is modified to zero and the remote device is being tested to receive incoming interrupts, but it is not working.

    Please answer.

  • Hi,

    You can use 2 6678 EVM connected together via Hyperlink cable for data exchange test. You can also generate interrupt from one board to another.

    If you only have one EVM, you can run the Hyperlink in loopback mode, and also test interrupt in loopback. You need play with intlocal and int2cfg bit to understand how it work (check the hyperlink user guide). Also, there is a test project and discussion found here: https://e2e.ti.com/support/processors/f/791/t/193417?Generating-interrupts-on-hyperlink-recieve.

    I used it several years ago and I remember it worked.

    Regards, Eric 

  •  

    Hi.
    Thank you for your reply.

    I'm testing the evm6678 board in LOOPBACK mode.
    It doesn't work to see the code you answered and modify parts of the example project code to test.

    In the example project provided, the modifications are as follows:

    1.hyplnkLLDCfg.h

    2.hyplnkisr.c

    3.hyplnkLLDIFace.c

    I referred to "1462.Hyperlink_EVM_example_LE.zip" code.

     

    HyperLink Register status as see below (CORE0 execute)


     

    Q1 ) Is there any modify wrong, or is there anything else that needs to be done?

        This code is not execute ISR ...    I don't understand information 64 ?? 

     

     

    >>>  I modified the HostInterrupt and EventId values in the above modification codes as follows for test. ( same supported example source )

            CSL_CPINTC_mapSystemIntrToChannel (hnd, CSL_INTC0_VUSR_INT_O, 32);

            CSL_CPINTC_enableHostInterrupt (hnd, 32);

            hyplnkExampleIntcHnd = CSL_intcOpen (&hyplnkExampleIntcObj, 21, &vectId, NULL);

            eventId = 21;
            hyplnkExampleEvtHdlrRecord[0].arg     = (void *)eventId;

    In the modified code, ISR was executed once.
    However, ISR did not run in the transfer process that was run in the example project. ( at hyplnkExampleIOCycle(); )

    If I write 0x00000002 randomly on the Interrupt Pending/Set Register through the memory browser, ISR is executed.

    Control register 0x6202, 0x6282, 0x2202, 0x2282, 0x6082, 0x2082    ...   for intlocal and int2cfg setting test same.


    Q2 ) Is there any modify wrong, or is there anything else that needs to be done? 

            When does the interrupt packet go? ( A hyperlink transmission does not activate the receive interrupt. )

    No interruptions are generated.  (as see below Test-LOG)

     ============== begin REMOTE registers after initialization ===========
    Status register contents:
      Raw        = 0x0440080f
    Link status register contents:
      Raw       = 0xfdf0bdf0
    Control register contents:
      Raw             = 0x00006082
    ============== end REMOTE registers after initialization ===========

  • Hi.

    I did test in loopback as see above but it's not working.
    I modified related section of example project by refer your reply.

    When a sender sends data, i wants to activate the receive interrupt.

    I think there is still a problem with the setup for the generate sw interrupt.

    Please look at my experiment and give me advice.

    What is wrong or strange ??

    Thanks.

  • Hi,

    I need to create a CCS project and code for testing Hyperlink interrupt in loopback mode. We don't have production code and the E2E code is for reference only not maintained. This may take some time.

    Regards, Eric

  • Hi.
    Thank you for your reply.

    Do you have not a product code?~~
    I thought it would be relatively simple.

    It was hoped that only SW-generated interrupt would be reviewed.
    The source of the site provided was not felt to be the source of evm6678.

    Please review even if it takes time.

  • Hi.

    The part I asked for confirmed the drive using the reference code.
    I wanted to check if it was the right move, but after analyzing it, it was confirmed.

    Thank you.

  • Hi,

    I saw you closed the thread, I just created a test case for C6678 Hyperlink interrupt in loopback mode. I am attaching it here for your reference. Note this is not TI production and will not be merged into Processor SDK RTOS package. The code is mostly CSL and register level. Below is the build log you can see what source code is used and what library is linked:

    "C:\\ti\\ccs_8_3_0\\ccsv8\\utils\\bin\\gmake" -k all

    Building file: "../Hyperlink_SW_Interrupt_test.c"
    Invoking: C6000 Compiler
    "C:/ti/ti-cgt-c6000_8.3.2/bin/cl6x" -mv6600 --abi=eabi --include_path="C:/ti/ti-cgt-c6000_8.3.2/include" --include_path="C:/ti/pdk_c667x_2_0_13/packages" --include_path="C:/ti/pdk_c667x_2_0_13/packages" --include_path="C:/Project/Hyperlink_Int/Hyperlink_EVM_example_LE/include" --define=xdc_target__littleEndian -g --diag_warning=225 --display_error_number --strip_coff_underscore --preproc_with_compile --preproc_dependency="Hyperlink_SW_Interrupt_test.d_raw" "../Hyperlink_SW_Interrupt_test.c"
    Finished building: "../Hyperlink_SW_Interrupt_test.c"

    Building file: "../hyperlink_functions.c"
    Invoking: C6000 Compiler
    "C:/ti/ti-cgt-c6000_8.3.2/bin/cl6x" -mv6600 --abi=eabi --include_path="C:/ti/ti-cgt-c6000_8.3.2/include" --include_path="C:/ti/pdk_c667x_2_0_13/packages" --include_path="C:/ti/pdk_c667x_2_0_13/packages" --include_path="C:/Project/Hyperlink_Int/Hyperlink_EVM_example_LE/include" --define=xdc_target__littleEndian -g --diag_warning=225 --display_error_number --strip_coff_underscore --preproc_with_compile --preproc_dependency="hyperlink_functions.d_raw" "../hyperlink_functions.c"
    "../hyperlink_functions.c", line 145: warning #552-D: variable "linkstat" was set but never used
    "../hyperlink_functions.c", line 145: warning #552-D: variable "status" was set but never used
    Finished building: "../hyperlink_functions.c"

    Building file: "../psc_util.c"
    Invoking: C6000 Compiler
    "C:/ti/ti-cgt-c6000_8.3.2/bin/cl6x" -mv6600 --abi=eabi --include_path="C:/ti/ti-cgt-c6000_8.3.2/include" --include_path="C:/ti/pdk_c667x_2_0_13/packages" --include_path="C:/ti/pdk_c667x_2_0_13/packages" --include_path="C:/Project/Hyperlink_Int/Hyperlink_EVM_example_LE/include" --define=xdc_target__littleEndian -g --diag_warning=225 --display_error_number --strip_coff_underscore --preproc_with_compile --preproc_dependency="psc_util.d_raw" "../psc_util.c"
    Finished building: "../psc_util.c"

    Building target: "Hyperlink_EVM_example_LE.out"
    Invoking: C6000 Linker
    "C:/ti/ti-cgt-c6000_8.3.2/bin/cl6x" -mv6600 --abi=eabi --define=xdc_target__littleEndian -g --diag_warning=225 --display_error_number --strip_coff_underscore -z -m"Hyperlink_EVM_example_LE.map" -i"C:/ti/ti-cgt-c6000_8.3.2/lib" -i"C:/ti/ti-cgt-c6000_8.3.2/include" -i"C:/ti/pdk_c667x_2_0_13/packages/ti/csl/lib" -i"C:/ti/pdk_c667x_2_0_13/packages/ti/drv/cppi/lib" -i"C:/ti/pdk_c667x_2_0_13/packages/ti/drv/qmss/lib" --reread_libs --warn_sections --xml_link_info="Hyperlink_EVM_example_LE_linkInfo.xml" --rom_model -o "Hyperlink_EVM_example_LE.out" "./Hyperlink_SW_Interrupt_test.obj" "./hyperlink_functions.obj" "./psc_util.obj" "../hyperlink_test.cmd" -l"C:/ti/pdk_c667x_2_0_13/packages/ti/csl/lib/c6678/c66/release/ti.csl.intc.ae66" -l"C:/ti/pdk_c667x_2_0_13/packages/ti/csl/lib/c6678/c66/release/ti.csl.ae66" -llibc.a
    <Linking>
    Finished building target: "Hyperlink_EVM_example_LE.out"

    **** Build Finished ****

    You should be able to run it with C6678 EVM in no-boot mode and use GEL to initialize the SOC first. The loopback is controlled by "iLoopModeOn". CCS console output:

    [C66xx_0]
    Beginning Hyperlink SW generated Interrupt test

    Interrupt issued !

    Ending Hyperlink SW generated Interrupt test

    Regards, EricHyperlink_EVM_example_LE_C6678.7z

     

  • Hi.

    It took some time to get around the activation of the interrupt, but it was resolved by referring to the data provided.
    I'll also look at the additional data.

    Thank you.