OMAPL138B-EP: MMCSD_FatfsConsole_lcdkOMAPL138 1-BIT BUS

Hi,

I think the log you posted is not complete. I can't see nothing wrong in the output you've posted.

Best Regards,

Yordan

Hi Yordan

thanks for replying.

On the FAT Console I cant get a directory listing or help it just sits on the drive letter

Regards

developerR

Hi Sahin / Yordan

Have you been able to test this?

Thanks

Hi developerR,

Could you please check if you observe the same issue with the non-DMA version of the project? The reason I ask is because there is a known issue with the DMA version where the application will hang when more than 4 MB of data is transferred. 

From Processor SDK Known Issues: Record ID PRSDK-5981

We have not yet determined if this is the root cause of your issue but it would be good to rule this out. 

Hi Sahin

For :

MMCSD_FatfsConsole_lcdkOMAPL138_c674xExampleProject

The output was

Card inserted.
All tests have PASSED
0:>ls

Thank you and regards

developerR

Hi Sahin

I tried the Beaglebone black MMCSD_FatfsConsole_bbbAM335x_DMA_armExampleProject

I added the buswidth and clock parameters without recompiling the libraries and it worked perfectly

#ifdef MMCSD_EDMA_ENABLED
    gEdmaHandle = (EDMA3_RM_Handle)edma3init(MMCSD_EDMACC_NUM, &edmaResult);

    if(MMCSD_socGetInitCfg(0,&hwAttrsConfig)!=0) {
        MMCSD_log ("\nUnable to obtain MMCSD config.Exiting. TEST FAILED.\r\n");
       return;
    }
    hwAttrsConfig.supportedBusWidth=MMCSD_BUS_WIDTH_1BIT;
    hwAttrsConfig.inputClk=25000000u;

    hwAttrsConfig.edmaHandle = gEdmaHandle;
    if(MMCSD_socSetInitCfg(0,&hwAttrsConfig)!=0) {
        MMCSD_log ("\nUnable to set config.Exiting. TEST FAILED.\r\n");
         return;
     }
#endif

thanks and regards

developerR

Hi 

Has anyone been able to test the MMCSD on the LCDK with the BUS_WIDTH_ONE setting?

thank you

developerR 

Hi developerR,

I tested the MMCSD_FatfsConsole (non-DMA) example on the LCDK and it is passing. Please see logs below.

I changed 

(MMCSD_BUS_WIDTH_1BIT | MMCSD_BUS_WIDTH_4BIT)

to 

(MMCSD_BUS_WIDTH_1BIT)

in MMCSD_soc.c. Have you made any modifications to the LCDK? I see you are configuring the input clk to 250Mhz (default clk is 150Mhz). Could you please explain the reasoning for this?

Here are my passing logs:

Card inserted.
All tests have PASSED
0:>ls
D-HS- 2019/08/21 15:43         0  System Volume Information

   0 File(s),         0 bytes total
   1 Dir(s),   15207392K bytes free
All tests have PASSED
0:>help

Available commands
------------------
help : Display list of commands
ls   : Display list of files
cd: Change directory
mkdir: Create directory
rm   : Delete a file or an empty directory
pwd  : Show current working directory
cat  : Show contents of a text file : cat <FILENAME>
       Write to a file : cat <INPUTFILE> > <OUTPUTFILE>
       Read from UART : cat dev.UART
       Write from UART : cat dev.UART > <OUTPUTFILE>
All tests have PASSED
0:>mkdir "test"
mkdir: 0:/"test"
All tests have PASSED
0:>ls
D-HS- 2019/08/21 15:43         0  System Volume Information

   0 File(s),         0 bytes total
   1 Dir(s),   15207392K bytes free
All tests have PASSED
0:>cd test
cd: 0:/test
All tests have PASSED
0:>ls
D-HS- 2019/08/21 15:43         0  System Volume Information

   0 File(s),         0 bytes total
   1 Dir(s),   15207392K bytes free
All tests have PASSED
0:>

MMCCTL configured for 1-bit bus width: