OMAPL138B-EP: Omapl138 DDR2 connection

Nancy Wang

Part Number: OMAPL138B-EP
Other Parts Discussed in Thread: OMAPL138, OMAP-L138

Hi,

The customer connected omapl138 with MT46H64M16LFBF-5 up to 1Gb by multiple DDRs, now he wants to upgrade to 2Gb LPDDR, how to connect in hardware?

over 4 years ago

0 Mark Mckeown over 4 years ago

TI__Mastermind 29180 points

Hi Nancy,

This MT46H64M16LFBF device supports 64MB * 16 = 1Gb. The data bus of OMAP-L138 is 16-bits. How is the customer using multiple DDRs if the single MT46H64M16LFBF DRAM uses all 16-bits?

Based on this one Micron datasheet MT46H128M16LF (128 Meg x 16 arranged as 32 Meg x 16 x 4 banks)
The only difference is with the COL addressing: 2K A11, A[9:0] instead of 1K A[9:0] for MT46H64M16LFBF.

Is the customer wanting to design just one 2Gb LPDDR SDRAM?

See these E2E threads:
https://e2e.ti.com/support/processors/f/791/t/493896
- "It only accesses a total range of 256MB from the DDR2 EMIF."

https://e2e.ti.com/support/processors/f/791/p/118037/423664

Regards,
Mark

0 Nancy Wang over 4 years ago in reply to Mark Mckeown

TI__Expert 8210 points

Hi,

Yes, the customer wants to design just one 2Gb LPDDR. Could it be implemented? If yes, how to connect with OMAPL138?

0 Nancy Wang over 4 years ago in reply to Mark Mckeown

TI__Expert 8210 points

Hi,

Any update?

0 Mark Mckeown over 4 years ago in reply to Nancy Wang

TI__Mastermind 29180 points

Hi Nancy,

Sorry for the delay.

When moving from MT46H64M16LF to MT46H128M16LF, I believe the DRAM address pin connections should be the same.

Both devices use A[13:0] for the row address.
MT46H64M16LF uses address bits A[9:0] for the COL address.
MT46H128M16LF uses address bits A11, A[9:0] for the COL address.

All bits A[13:0] need to be connected from EMIF controller to the DRAM.

The address map from logical address to physical address will need to be updated to use A11 during column addressing.

Regards,
Mark

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OMAPL138B-EP: Omapl138 DDR2 connection