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RTOS/AM4379: Combining EtherCAT Slave with IO-Link Master
Part Number: AM4379
Tool/software: Code Composer Studio
what will be - from your point of view - the best approach to combine these two technologies regarding the demos?
With EtherCAT, there is a complete project where IO-Link could be "added" as a kind of library.
Another possibility could be to create an IO-Link project first and then to "merge" both.
(But with respect to the existing demo setup of IO-Link, this seems to be much more effort...).
Or is it possible to think about adding IO-Link only in a file based manner?
But therefore its necessary to have detailed knowledge about the build setup.
Any help welcome,
Hi Thomas, the idea is to create a gateway? or could you explain us better your use case?
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In reply to Paula Carrillo:
Yes, the device should act as a gateway between EtherCAT and IO Link slave devices. For complexity reasons
and because we only want to use it in closed systems, the number of IO Link ports as well as IO Link device compatibility
will be limited. In the end, we only support custom specific bus configurations, provided e.g. by file.
Meanwhile I have already started using the EtherCAT full slave reference design adding the self-generated IO link library
(which isn't accessed at the moment). Even if EtherCAT and IO Link are using different PRU's, I don't see the
PRU0 handle assigned in the IO Link example code. Seems to be some kind of memory mapped adressing,
part of the script based toolchain required for the IO Link reference design?
In reply to Thomas Kuhnt:
another point: you mentioned the TI Design that shows a Profinet-Profibus gateway.
It seems to be a Linux project - is there anything comparable for Windows (I'm not a Linux expert....)?
Probably the 'CCS Linux version 6.1.2' noted in that TI design confused you, the profinet-profibus gateway was actually a TI-RTOS project, and the CCS could be either Windows or Linux version.
In reply to Garrett Ding:
>>Even if EtherCAT and IO Link are using different PRU's, I don't see the PRU0 handle assigned in the IO Link example code. Seems to be some kind of memory mapped adressing, part of the script based toolchain required for the IO Link reference design?
This is configured in the structure iolinkInitCfg in IOLINK_soc.c:
/* IOLINK Soft IP configuration structure */
IOLINK_v0_SwAttrs iolinkInitCfg[IOLINK_SWIP_MAX_CNT] =
/* version */
/* pruIcssConfig */
1, /* icssNum, 1: ICSS0, 2: ICSS1 */
0, /* pruNum */
PRU_ICSS_DATARAM(0), /* dataMem0 */
PRU_ICSS_DATARAM(1), /* dataMem1 */
PRU_ICSS_IRAM(0), /* instMem */
SOC_PRU_ICSS0_U_DATA_RAM0, /* dataMemBaseAddr */
SOC_PRU_ICSS0_U_INTC_REG /* intcBaseAddr */
Thanks for this hint; necessary to know for me (as newbee) where different assignments are located (*_soc.c).
Another important point is the configuration setup (*.cfg file) used for IOLINK. I found 2 ones:
iolink_arm_idkam437x.cfg at ..\drv\iolink\test\stack_test\am437x\armv7\bios
iolink_arm_idkam437x_pa9fg.cfg in the folder ..\binary\IOLINK_Stack_TestApp\obj\idkAM437x\a9host\release\configuro\package\cfg
The 2nd one seems to be generated and one part of its content is data/code location definition.
-> When setting up a CCS project, the contents of both files need to be "merged" or the 2nd one executed in "post build" process?
You don't need to merge the 'post build' .cfg. The 1st one will be sufficient.
now I got it...Thanks!
Meanwhile I was able to create separated Profibus master and ProfiNet slave projects for AM572x platform.
But GIT project ProfibusMaster_ProfinetSlave_01.00.00.00 mentioned in http://www.ti.com/lit/ug/tiducu0/tiducu0.pdf
seems to be no more accessible, so it's not possible to create the gateway reference design in the way described.
Is there any other option to create it?
The reference design was developed based on old PRSDK release and unfortunately not been updated.
Essentially, you can look into the .cfg files and CCS build configuration (compile options, defined symbols, libraries...) of each project and merge them into one.
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