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TDA3XEVM: Fastboot usecase hangs

Part Number: TDA3XEVM
Other Parts Discussed in Thread: PGA460

Hi.

I am having problems modifying the fastboot usecase,

If I open IPU1_1 in  "cfg.mk", the program will hang on the app , 

else work well.

My SDK version : PROCESSOR_SDK_VISION_03_04_00_00

Modified use case :

Debug with CCS :

Q1 : Can I add IPU1_1 if I use the demo fastboot usecase?

Beacause I restore original sdk and only cange below  but still hang .

1."C:\PROCESSOR_SDK_VISION_03_04_00_00\ti_components\drivers\pdk_01_10_00_08\packages\ti\boot\sbl_auto\sbl_app\src\tda3xx\sbl_tda3xx_main.c"

2."C:\PROCESSOR_SDK_VISION_03_04_00_00ti_components\drivers\pdk_01_10_00_08\packages\ti\boot\sbl_auto\sbl_utils\src\tda3xx\

sbl_utils_tda3xx_ddr_config.c"

3."C:\PROCESSOR_SDK_VISION_03_04_00_00\ti_components\drivers\pdk_01_10_00_08\packages\ti\build\

Rules.make"

4."C:\PROCESSOR_SDK_VISION_03_04_00_00\vision_sdk\apps\configs\tda3xx_evm_bios_all\cfg.mk"

5."C:\PROCESSOR_SDK_VISION_03_04_00_00\vision_sdk\apps\configs\tda3xx_evm_bios_all\uc_cfg.mk"

6."C:\PROCESSOR_SDK_VISION_03_04_00_00\vision_sdk\build\Rules.make"

The modify file :

3617.code.7z

The  hang log

0871.2514.teraterm.log
 TDA3xx SBL Boot 

 Identified 15X15 Silicon 

 DPLL Configuration Completed 

 Clock Domain Configuration Completed 

 Module Enable Configuration Completed 

 TI EVM PAD Configuration Completed 

 DDR Configuration Completed 

 TDA3xx SOC Init Completed 

 App Image Download Begins 

 Manufacturer ID - 0x9d
 Device ID - 0x18
 IPU1 CPU0 Image Load Completed 

 IPU1 CPU1 Image Load Completed 

 App Image Download Completed 

 EVE MMU configuration completed 

*****************************************************************

 32K Timer is used to measure cycles, divide by 32K to get time in seconds 

 Reset to SBL Init Cycles - 342  (10.43 ms) 

 SBL Initial Config Cycles - 178  (5.43 ms) 

 SOC Init Cycles - 468  (14.28 ms) 

 DDR Config Clock Cycles - 229  (6.98 ms) 

 App Image Load Cycles - 5827  (177.82 ms) 

 Slave Core Bootup Cycles - 113  (3.44 ms) 

 SBL Boot-up Cycles - 6818  (208.06 ms) 

 Time at which SBL started IPU1_0 - 7160  (218.50 ms) 

*****************************************************************

 Jumping to IPU1 CPU1 App 

 Jumping to IPU1 CPU0 App 

Regards,

YI_ING

  • Hi,

    Why are making change in PDK?

    When FAST_BOOT_INCLUDE is set to yes then by default all cores are enable.

    There should be some issue with DCAN link.

    For checking you can add a null link in ipu1_1 link and remove dcan link and check.

    Regards,

    Anuj

  • I need to use fastboot and need DCAN, so I need IPU1_0, IPU1_1, DSP

    But I hanged after joining IPU1_1


    So I reinstalled the SDK and only modified the necessary build files and comment the SBLUtilsConfigAllVoltageRails(apear hang problem) of sbl_tda3xx_main.c.

    but still hang, So I guess this is the problem when the original SDK was added to IPU1_1.

    By the way I use the custom board, the Custom board reference EVM board

    Modify file below

    1."C:\PROCESSOR_SDK_VISION_03_04_00_00\ti_components\drivers\pdk_01_10_00_08\packages\ti\boot\sbl_auto\sbl_app\src\tda3xx\sbl_tda3xx_main.c"

    2."C:\PROCESSOR_SDK_VISION_03_04_00_00ti_components\drivers\pdk_01_10_00_08\packages\ti\boot\sbl_auto\sbl_utils\src\tda3xx\

    sbl_utils_tda3xx_ddr_config.c"

    3."C:\PROCESSOR_SDK_VISION_03_04_00_00\ti_components\drivers\pdk_01_10_00_08\packages\ti\build\

    Rules.make"

    4. FAST_BOOT_INCLUDE is set to yes

    The "gmake showconfig" :

    C:/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/windows/xdctools_3_32_01_22_core/bin/rm C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda3xx_evm_bios_all/vision_sdk/bin/tda3xx-evm/sbl_boot/AppImage_UcEarly_LE
    C:/PROCESSOR_SDK_VISION_03_04_00_00/ti_components/os_tools/windows/xdctools_3_32_01_22_core/bin/rm C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda3xx_evm_bios_all/vision_sdk/bin/tda3xx-evm/sbl_boot/AppImage_UcLate_LE
    '# AppImage UC Early is @ C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda3xx_evm_bios_all/vision_sdk/bin/tda3xx-evm/sbl_boot/AppImage_UcEarly_BE'
    '# AppImage UC Late is @ C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/binaries/apps/tda3xx_evm_bios_all/vision_sdk/bin/tda3xx-evm/sbl_boot/AppImage_UcLate_BE'
    gmake[2]: Leaving directory `C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/build/rtos/makerules'
    gmake[1]: Leaving directory `C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/build/rtos/makerules'

    C:\PROCESSOR_SDK_VISION_03_04_00_00\vision_sdk\build>gmake showconfig
    gmake -C C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/configs -f build_makeconfig.mk showconfig
    gmake[1]: Entering directory `C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/configs'
    #
    # Build Config is [ tda3xx_evm_bios_all ]
    # Build Config file is @ C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/configs/tda3xx_evm_bios_all/cfg.mk
    # Build Config .h file is @ C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/links_fw/include/config/apps/tda3xx_evm_bios_all/system_cfg.h
    # Build CPUs is @ ipu1_0 ipu1_1 dsp1 dsp2 eve1
    #
    # CPUs included in application,
    # PROC_IPU1_0_INCLUDE=yes
    # PROC_IPU1_1_INCLUDE=yes
    # PROC_IPU2_INCLUDE=no
    # PROC_DSP1_INCLUDE=yes
    # PROC_DSP2_INCLUDE=yes
    # PROC_EVE1_INCLUDE=yes
    # PROC_EVE2_INCLUDE=no
    # PROC_EVE3_INCLUDE=no
    # PROC_EVE4_INCLUDE=no
    # PROC_A15_0_INCLUDE=no
    #
    # Platform config,
    # VSDK_BOARD_TYPE=TDA3XX_EVM [options: TDA2XX_EVM TDA2EX_EVM TDA3XX_EVM TDA3XX_RVP TDA2XX_RVP]
    # PLATFORM=tda3xx-evm
    # DUAL_A15_SMP_BIOS=no
    # IPU1_SMP_BIOS=no
    # DDR_MEM=DDR_MEM_512M [options: DDR_MEM_128M DDR_MEM_512M DDR_MEM_1024M]
    # EMIFMODE=SINGLE_EMIF_512MB [options: SINGLE_EMIF_512MB SINGLE_EMIF_1GB ref build_pdk.mk]
    # NDK_PROC_TO_USE=none [options: a15_0 ipu1_0 ipu1_1 ipu2 none]
    # NSP_TFDTP_INCLUDE=no [options: yes no]
    # TDA2EX_ETHSRV_BOARD=no [options: yes no]
    # FATFS_PROC_TO_USE=ipu1_0 [options: ipu1_0 none]
    # RADAR_BOARD=none [options: TDA3XX_AR12_ALPS TDA3XX_AR12_VIB_DAB_BOOSTER TDA3XX_RADAR_RVP none]
    #
    # Build config,
    # BUILD_OS=Windows_NT [options: Windows_NT Linux]
    # BUILD_DEPENDENCY_ALWAYS=no
    # BUILD_ALGORITHMS=no
    # BUILD_INFOADAS=no
    # PROFILE=release [options: debug release]
    # KW_BUILD=no
    # CPLUSPLUS_BUILD=no
    # IPU_PRIMARY_CORE=ipu1_0 [options: ipu1_0 ipu2]
    # IPU_SECONDARY_CORE=ipu2 [options: ipu1_0 ipu2]
    # A15_TARGET_OS=Bios [options: Bios Linux Qnx]
    # BSP_STW_PACKAGE_SELECT=all [options: all vps-iss-dss-only vps-vip-vpe]
    #
    # Safety Module config,
    # RTI_INCLUDE=no
    # ECC_FFI_INCLUDE=no
    # DCC_ESM_INCLUDE=no
    #
    # Video Module config,
    # IVAHD_INCLUDE=no
    # VPE_INCLUDE=no
    # CAL_INCLUDE=yes
    # ISS_INCLUDE=yes
    # ISS_ENABLE_DEBUG_TAPS=no
    # WDR_LDC_INCLUDE=yes
    # DSS_INCLUDE=yes
    #
    # Open Compute config,
    # OPENCL_INCLUDE=no
    # TARGET_ROOTDIR=C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/src/rtos/opencl
    # ENABLE_OPENCV=no
    # ENABLE_OPENCV_TESTS=no
    # OPENVX_INCLUDE=no
    #
    # Log config,
    # ENABLE_UART_LOG=yes
    # ENABLE_NETWORK_LOG=no
    # ENABLE_CCS_LOG=no
    # CIO_REDIRECT=yes
    #
    # IPC config,
    # WORKQ_INCLUDE=no
    # IPC_LIB_INCLUDE=no
    #
    # Surround View config,
    # SRV_FAST_BOOT_INCLUDE=no
    #
    # Other Module config,
    # AVB_INCLUDE=no
    # DCAN_INCLUDE=no
    # RADAR_ONLY=no
    # CPU_IDLE_ENABLED=yes
    # FAST_BOOT_INCLUDE=yes
    # DATA_VIS_INCLUDE=no
    # HS_DEVICE=no
    # ULTRASONIC_INCLUDE=no
    # PGA450=
    # PGA460=
    # ENABLE_ALL_DEPTH=
    #
    # Linux config,
    # DEFAULT_UBOOT_CONFIG=dra7xx_evm_vision_config
    # DEFAULT_KERNEL_CONFIG=ti_sdk_dra7x_release_defconfig
    # DEFAULT_DTB=dra7-evm-infoadas.dtb
    # CMEM_INCLUDE=no
    # IPUMM_INCLUDE=no
    # IPU1_EVELOADER_INCLUDE=no
    # ROBUST_RVC_INCLUDE=no
    # BUILD_ADAM_CAR=no
    #
    # Alg plugins included in build,
    # ALG_autocalibration ALG_autoremap ALG_census ALG_clr ALG_crc ALG_denseopticalflow ALG_deWarp ALG_disparityhamdist ALG_dmaSwMs ALG_drawRearview ALG_edgedetection ALG_framecopy ALG_lanedetection ALG_objectdetection ALG_remapmerge ALG_safe_framecopy ALG_sceneobstruction ALG_sfm ALG_sparseopticalflow ALG_stereo_postprocessing ALG_subframecopy ALG_surroundview ALG_stereo_app ALG_tidl ALG_iss_aewb ALG_iss_aewb2
    #
    # Use-cases included in build,
    # UC_fast_boot_iss_capture_isp_simcop_pd_display UC_iss_capture_isp_simcop_display UC_iss_mult_capture_isp_2d_3d_sv_tda3x UC_iss_mult_capture_isp_dewarp_3dsv_tda3xx UC_iss_mult_capture_isp_dewarp_3dsv_rearview_tda3xx UC_iss_mult_capture_isp_dewarp_stereo_tda3xx UC_iss_mult_capture_isp_dewarp_stereoplus_tda3xx UC_iss_mult_capture_isp_simcop_stereo_tda3xx UC_iss_mult_capture_isp_simcop_sv_tda3xx UC_iss_mult_capture_isp_stereo_autocalib_tda3xx UC_srv_calibration UC_lvds_vip_multi_cam_view_tda3xx UC_lvds_vip_sv_tda3xx UC_null_src_display UC_saveDisFrame UC_vip_single_cam_analytics2 UC_vip_single_cam_dense_optical_flow UC_vip_single_cam_edge_detection UC_vip_single_cam_frame_copy UC_vip_single_cam_frame_copy_safety UC_vip_single_cam_lane_detection UC_vip_single_cam_object_detection2 UC_vip_single_cam_sfm UC_vip_single_cam_sparse_optical_flow UC_vip_single_cam_subframe_copy UC_vip_single_cam_tlr UC_vip_single_cam_view UC_vip_single_cam_view_dsswb UC_vip_single_cam_display_metadata UC_csi2_cal_multi_cam_view UC_csi2_cal_sv_standalone UC_tidl
    #
    gmake -s -fbuild_makeconfig.mk check_cpu_include
    gmake[2]: Entering directory `C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/configs'
    #
    # CPUs that are NOT required but included in config [ tda3xx_evm_bios_all ],
    #
    # WARNING: IPU1_1 can be excluded from application
    #
    # CPUs that are required but not included in config [ tda3xx_evm_bios_all ],
    #
    #
    # Edit C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/build/configs/tda3xx_evm_bios_all/cfg.mk to include or exclude CPUs in an application
    #
    gmake[2]: Leaving directory `C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/configs'
    gmake[1]: Leaving directory `C:/PROCESSOR_SDK_VISION_03_04_00_00/vision_sdk/apps/configs'

  • Hi,

    I still do not understand the motive of modifying sbl code.

    By default all cores are enabled for fastboot usecase.

    Can you try first to run fastboot usecase in a freshly installed sdk and without any modification done.

    If this work then add your dcan link.

    Regards,

    Anuj

  • Hi.

    We have custom board , so I do not need some EVM boad,s module and ddr diff than EVM board.

    If I don,t comment the funtion "SBLUtilsConfigAllVoltageRails" will apear hang problem.

    I  run fastboot usecase in a freshly installed sdk and just  comment the funtion "SBLUtilsConfigAllVoltageRails".

    Do you think this part of the reason is not working?

  • Hi,

    It seems that you have hooked up voltage rails differently as compared to the EVM due to which this API hangs for you.

    You can comment this API to unblock development for now but you actually need to scale voltage as per silicon and hence you will need to modify this API as per your board connections.

    Regards,

    Rishabh

  • Hi,

    Thank you for your reply.

    Give me some time to clarify this issue.

    Best Regard

    YI TING

  • HI.

    The Custom board without pmic voltage current is just determined by hardware.
    What do I need to modify? (such as registers to ensure operation)

  • Hi,

    Voltage level is set to a default value which might not be sufficient for some silicons.

    Hence you need to program the voltage.

    Please refer to chapter 3 of http://www.ti.com/lit/an/sprac22/sprac22.pdf on how to set voltage rails.

    Hope this helps.

    Regards,

    Rishabh

  • I don't understand the purpose of modifying the function.

    My understanding is that TDA3 get voltage through I2C and PMIC, compares it with the voltage value of EFUSE, and then adjusts the voltage through I2C and PMIC communication.

    However, our custom board POWER IC is not control from the software what is the possible reason cause of the VPDAM HANG problem??

  • Hi,

    Can you elaborate how exactly are you controlling voltage on custom board i.e. the statement "our custom board POWER IC is not control from the software".

    Regards,

    Rishabh

  • HI,

    Custom board ues POWER IC "TPS65053RGET" , The power IC without commuication like I2C , hence is not control from the software".

    My understanding is that the voltage depends on the hardware configuration.

  • Hi,

    By default AVS voltage is not set and hence you need to configure using I2C.

    I will ask HW experts for their opinion in this case.

    Regards,

    Rishabh

  • Hi,

    Looking forward to your reply.

    I have a question about EVM BOARD in "FAST_BOOT_INCLUDE=yes" and "IPU1_1=yes" is it working well ?

    (Means that there is no hang)

  • Hi,

    It should work when IPU1_1 is set to yes.

    Are you facing an issue?

    Regards,

    Rishabh

  • Hi,

    I face a hang problem in the vpdma load fireware.

    Did the hardware expert answer the question?

  • Hi,

    As per the HW expert: "In theory as long as the default voltage is at the top end of the OPP target voltage then things should be functional.  That said, we always recommend AVS"

    So it should be ok if the default voltage is set appropriately.

    Please mark appropriate posts as "This resolved my issue" and close this thread.

    Kindly start a new thread for IPU1_1 include issue.

    Regards,

    Rishabh

  • I measure the voltage of VDD_CORE to 1139 mv.
    The maximum voltage of AVS is 1200mv.
    The original design board has a calculated AVS voltage ideal value of 1150mv
    Is the AVS voltage at the high end?

  • Hi,

    I borrowed the EVM Board to do the test and just open IPU1_0, IPU1_1, DSP1, DSP2, EVE, FAST_BOOT_INCLUDE, there will be a hang problem, if I do not open IPU1_1, it will not

  • Hi,

    AVS voltage varies from silicon to silicon.

    For cold silicons AVS voltage is closed to max whereas for hot silicons it is lesser than the default voltage.

    Regards,

    Rishabh

  • Hi,

    Regarding IPU1_1 include you have another open thread: https://e2e.ti.com/support/processors/f/791/t/843063

    Please follow up for IPU1_1 on that thread.

    Regards,

    Rishabh

  • Hi,

    I haven't heard back from you, I'm assuming you were able to resolve your issue.
    If not, just post a reply below (or create a new thread if the thread has locked due to time-out).

    Regards,
    Rishabh