Compiler/PROCESSOR-SDK-AM65X: DP to VGA adapter issue

Hello,

I am wondering if you have tested your custom board using a displayport cable directly instead of going through an adapter.

Regards,
Krunal

Hi,

I test it  use DP Direct Connection:

SDK 5.3:   EVM (Fail)         My own custom board  (OK)

SDK 6.0:   EVM (OK)         My own custom board  (OK)

Tank you for you help !

Hello,

On PSDK5.3, we were using the mcu_i2c0 bus in the k3-am654-evm-tc358876.dtbo file. However, due to hardware issues, we changed to the main_i2c1 bus in PSDK6.0. In order to have PSDK5.3 work on TI EVM, please make the following changes in the k3-am654-evm-tc358876.dtso file:

diff --git a/arch/arm64/boot/dts/ti/k3-am654-evm-tc358876.dtso b/arch/arm64/boot/dts/ti/k3-am654-evm-tc358876.dtso
index c9873fd744b..b695164c4d9 100644
--- a/arch/arm64/boot/dts/ti/k3-am654-evm-tc358876.dtso
+++ b/arch/arm64/boot/dts/ti/k3-am654-evm-tc358876.dtso
@@ -61,7 +61,7 @@
        };
 };
 
-&mcu_i2c0 {
+&main_i2c1 {
        #address-cells = <1>;
        #size-cells = <0>;
 
@@ -74,6 +74,8 @@
                clock-names = "ref";
                clocks = <&dp_refclk>;
 
+               toshiba,hpd-pin = <0>;
+
                ports {
                        #address-cells = <1>;
                        #size-cells = <0>;
~

With regards to the adapter issues, are the four adapters working or not working on PSDK5.3?

Regards,
Krunal

Hi  Krunal,

Modify I2C according to your description, SDK5.3 can display the screen.

I tested the results with EVM and my board.(Y: with picture N: without picture)

On Evm

1.  Use SDK6.0 or  SDK5.3   (biaze, choseal, ce-link) these all no  picture. 

On My board:

1. There is no picture in 6.0 of u-boot.   (biaze, choose, ce-link) 

2. The u-boot in version 5.3 all  adpater's has picture  , but (biaze, choseal, ce-link) these will flicker.

So I don't know why

Tank you for your help !

Regards,
Long

Hello Long,

When the displays are not functional, are you seeing any error messages in the Kernel boot up logs? If yes, I am wondering if you could please share them with us. 

Also, while using Uboot5.3+Kernel6.0, are the displays (biaze, choose, ce-link) still flickering?

Regards,
Krunal

Hi Krunal,

1. There is no  error messages in the Kernel boot up .  I debugged the trace and found that DP recognized the connection event on the display, and link trianing succeeded, but it did not display it.

2. Using Uboot5.3 + kernel 6.0, displays (bias, choseal, CE link) still flicking.

Regards,
Long

Hi Long,

We are looking into Uboot code and in the meantime, please share the complete boot logs for the following scenarios:
1. Biaze adapter with Uboot-5.3 + Kernel-5.3 
2. Biaze adapter with Uboot-5.3 + Kernel-6.0
3. Biaze adapter with Uboot-6.0 + Kernel-6.0

Also, I have attached a patch and please let me know if it helps with the flickering issues.

Regards,
Krunal

From a54ab58f915b4681e179e9d1671d15ec2f6f8436 Mon Sep 17 00:00:00 2001
From: Tomi Valkeinen <tomi.valkeinen@ti.com>
Date: Tue, 24 Sep 2019 15:13:27 +0300
Subject: [PATCH] drm/bridge: tc358767: fix max_tu_symbol value

max_tu_symbol was programmed to TU_SIZE_RECOMMENDED - 1, which is not
what the spec says. Calculate the value as recommended in the spec.

This fixes artifacts in some videomodes (e.g. 1024x768@60 on 2-lanes &
1.62Gbps was pretty bad for me).

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
---
 drivers/gpu/drm/bridge/tc358767.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/bridge/tc358767.c b/drivers/gpu/drm/bridge/tc358767.c
index e7346ae2d556..d9219b869a46 100644
--- a/drivers/gpu/drm/bridge/tc358767.c
+++ b/drivers/gpu/drm/bridge/tc358767.c
@@ -686,6 +686,8 @@ static int tc_set_video_mode(struct tc_data *tc,
 	int upper_margin = mode->vtotal - mode->vsync_end;
 	int lower_margin = mode->vsync_start - mode->vdisplay;
 	int vsync_len = mode->vsync_end - mode->vsync_start;
+	u32 bits_per_pixel = 24;
+	u32 in_bw, out_bw;
 
 	/*
 	 * Recommended maximum number of symbols transferred in a transfer unit:
@@ -693,7 +695,10 @@ static int tc_set_video_mode(struct tc_data *tc,
 	 *              (output active video bandwidth in bytes))
 	 * Must be less than tu_size.
 	 */
-	max_tu_symbol = TU_SIZE_RECOMMENDED - 1;
+
+	in_bw = mode->clock * bits_per_pixel / 8;
+	out_bw = tc->link.base.num_lanes * tc->link.base.rate;
+	max_tu_symbol = DIV_ROUND_UP(in_bw * TU_SIZE_RECOMMENDED, out_bw);
 
 	dev_dbg(tc->dev, "set mode %dx%d\n",
 		mode->hdisplay, mode->vdisplay);
-- 
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

Hi Krunal,

After I run  this patch, the adapters with problems has a display screen, (EVM and My board)It's OK, and there is no flickering phenomenon. Want to know why?

Regards,
Long

Hi Long,

Please correct me if I am wrong but you are no longer observing flickering issues. Also, the adapters (biaze, choseal, ce-link) work on PSDK5.3 and PSDK6.0 with the above patch.

Regards,
Krunal

Hi Krunal,

When I tested the hotplug of DP-to-VGA adapter, this print appeared and did not display, Only this adapter.

I want to know what's the cause of this.

Reproduce Rate: 1/10

DP-to-VGA adapter :  CHOSERL.

Log：

~# [ 413.742082] tc358767 5-000f: Interlane align failed
[ 413.746991] tc358767 5-000f: 0x0202 LANE0_1_STATUS: 0x77
[ 413.753281] tc358767 5-000f: 0x0203 LANE2_3_STATUS 0x00
[ 413.759593] tc358767 5-000f: 0x0204 LANE_ALIGN_STATUS_UPDATED: 0x80
[ 413.765880] tc358767 5-000f: 0x0205 SINK_STATUS: 0x00
[ 413.772162] tc358767 5-000f: 0x0206 ADJUST_REQUEST_LANE0_1: 0x00
[ 413.778444] tc358767 5-000f: 0x0207 ADJUST_REQUEST_LANE2_3: 0x00
[ 413.784721] tc358767 5-000f: main link enable error: -19

Regards,
Long

Hi,Krunal

Because  INTERLANE_ALIGN_DONE  bit , it's not set, I found these one word in DP specification. seems to be related to physical layer.

Regards,
Long

Hi Long,

I apologize for the delayed response but I was out of office for the past few days. With regards to INTERLANE_ALIGN_DONE, I will get back to you within 24-48 hours.

Regards,
Krunal 

Hello Long,

The above errors are generated by the Toshiba's DP bridge and due to limited knowledge about the Toshiba bridge, we are trying to understand the debug process and I will keep you posted on any updates.

Regards,
Krunal

Hi Krunal,

OK, thank you very much!

Regards,
Long