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AM5728: Bit-banged SPI

Part Number: AM5728

When configuring bit-banged SPI over GPIO, must ALL SPI signals be assigned to ONE GPIO? 

In particular, can some chip selects be assigned to GPIOs other than the one that has MOSI, MISO, and SCLK?

For example, is the following a valid configuration?

MOSI: GPIO 5 bit 4

MISO: GPIO 5 bit 7

SCLK: GPIO 5 bit 5

CS0: GPIO 5 bit 6

CS1: GPIO 8 bit 15    <= note: this and next two chip selects on GPIO 8

CS2: GPIO 8 bit 16

CS3: GPIO 8 bit 17