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TCIEVMK2X: TCIEVMKX

Part Number: TCIEVMK2X

HI i am working with a 6630k2l and i am having trouble utilizing its EDMA. I am grabbing proper transfer configurations but once the request is "submitted"(im not sure if it does but interrupt pending register goes high after) i dont see the data being transferred to the memory address. so im just trying to transfer whatever value it is from the source to my destination. I followed sprugs5b B.1.1  to try and setup my simple driver. 

here is my sample test code to get the EDMA working: (*I think this is also my first question here so i apologize if there are guidelines i forgot to follow*)

#include <stdio.h>
...
#include <ti/csl/csl_edma3.h>
#include <ti/csl/cslr_tpcc.h>
#include <ti/csl/cslr_tptc.h>

#include <ti/csl/device/k2l/src/cslr_device.h>
#include <ti/csl/device/k2l/src/csl_device_interrupt.h>
#include <ti/csl/device/k2l/src/csl_qm_queue.h>

#include "src/drivers/edma/customEdma.h"

#define _CUSTOMEDMA_C
#define FIRST_SAMPLE_CAPT_EVT 0 //first event to be captured

CSL_Edma3ChannelObj edmaTestChan;
CSL_Edma3ChannelHandle hEdmaTestChan;
CSL_Edma3ParamHandle hParamTest;
CSL_Edma3Handle hEdma0;
CSL_Edma3Obj edmaObj0;

void UTILS_sampleTransfer(uint32t_t *src, uint32t_t *dst){
CSL_Edma3ChannelAttr chAttr;
CSL_Status status;

hEdma0 = CSLedma3OPen (&edmaObj0, CSL_EDMACC_0,NULL,&status);

chAttr.regionNum = CSL_EDMA3_REGION_GLOBAL;
chAttr.chaNum = FIRST_SAMPLE_CAPT_EVT;
status = 0;

hEdmaTestChan = CSL_edma3ChannelOpen(&edmaTestChan, CSL_EDMACC_0, &chAttr, &status);

status = CSL_edma3HwChannelSetupQue(hEdmaTestChan, CSL_EMDA3_QUE_0);
status = CSL_edma3HwChannelSetupParam(hEdmaTestChan, FIRST_SAMPLE_CAPT_EVT);

hParamTest = CSL_edma3GetParamHandle(hEdmaTestChan, FIRST_SAMPLE_CAPT_EVT, &status);

CSL_emda3SetEventQueuePriority(hEdma0, CSL_EDMA_QUE_0, CSL_EDMA_QUE_PRI_0);

/********PaRAM Setup***********/
CSL_Edma3ParamSetup myParamSetup;

myParamSetup.option = CSL_EDMA3_OPT_MAKE(CSL_EDMA3_USER_PRIV,
CSL_EDMA3_RESERVED_0, //always 0
0,
CSL_EDMA3_ITCCH_DIS,
CSL_EDMA3_TCCH_DIS,
CSL_EDMA3_ITCINT_DIS,
CSL_EDMA3_TCINT_DIS,
CSL_EDMA3_RESERVED_0,
0
CSL_EDMA3_ITCCH_DIS,
CSL_EDMA3_FIFOWIDTTH_8BIT,
CSL_EDMA3_RESERVED_0,
CSL_EDMA3_STATIC_DIS,
CSL_EDMA3_ADDR_INCR,
CSL_EDMA3_ADDR_INCR);

myParamSetup.aCntBcnt = CSL_EDMA3_CNT_MAKE(4,1);//4 bytes
myParamSetup.cCnt = 1;
myParamSetup.srcDstBidx = CSL_EDMA3_BIDX_MAKE(0,0);
myParamSetup.srcDstCidx = CSL_EDMA3_CIDX_MAKE(0,0);

myParamSetup.srcAddr = (uint32) src;
myParamSetup.dstAddr = (uint32) dst;

myParamSetup.linkBcntrld = CSL_EDMA3_LINKBCNTRLD_MAKE(hParamTest,1); //link to self

//interrupt setup?
hEdma0->regs->TPCC_IESR = 0x01;
//write to ESR to trigger manual transfer?
hEdma->regs->TPCC_ESR = 0x01;

//Clear Channel event
CSL_edma3HwChannelControl(hEdmaTestChan, CSL_EDMA3_CMD_CHANNEL_CLEAR, NULL);

//Trigger Channel
CSL_edma3HwChannelControl(hEdmaTestChan, CSL_EDMA3_CMD_CHANNEL_SET, NULL);

//UTILS_resetEdma();


}

  • Hi,

    Which Processor SDK RTOS is this?

    Best Regards,
    Yordan

  • Hi,

    You know the IPR is high on bit position 0 after transfer, is it correct? And what is source and destination of the transfer? It looks that you are transfer 4 bytes from a FIFO? And if you do a typical memory transfer, say from DDR/L2 to DDR/L2 with something like 64 or 128 bytes, will your code work? 

    And why you trigger the transfer twice:

    hEdma->regs->TPCC_ESR = 0x01;

    CSL_edma3HwChannelControl(hEdmaTestChan, CSL_EDMA3_CMD_CHANNEL_SET, NULL);

    Regards, Eric

  • i am using ccs8 and an xd560v2-stm pod

  • i wanted to try writing to the ESR to see if it actually triggers it, i might have forgotten to comment it out.

    IPR does go high at bit 0 for some reason it starts at 0x20, then goes 0x21 after the transfer.

    i have 
    uint32_t sampleVal = 0xff; (SRC)
    uint32_t temp = 0x00; (DST)

    then just feed it to my UTILS_sampleTransfer(&sampleVal, &temp);

    now after the IPR goes high, i look at the memory address for temp and it is still 0;

    Thank you!

  • Hi,

    What are you trying to transfer? They are not valid address! Have you looked at the K2L memory map to determine where you read from and try to transfer to? You need some valid memory address, e.g. DDR, MSMC, global L2, or some peripheral FIFO, or some memory mapped peripheral data space (e.g. PCIE, Hyperlink), etc. 

    Regards, Eric 

  • You are right. I just realized it too. I am fairly new to the EDMA stuff and it probably went over my head that it is specific to those addresses. so i tried using ddr memory and now it works. Thank you so much for your help.

    Regards