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[FAQ] PROCESSOR-SDK-DRA8X-TDA4X: What processing cores can configure the Gigabit Ethernet Switch (CPSW)?

Intellectual 2710 points

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Part Number: PROCESSOR-SDK-DRA8X-TDA4X

I see different processing cores available in the Jacinto 7 device, which processing cores can I use to configure the Gigabit Ethernet Switch (CPSW)?

  • The 9-port Gigabit Ethernet Switch (CPSW0) is a subsystem present in the Jacinto 7 family of devices which provides Ethernet packet communication for the device and can be configured as an Ethernet switch. CPSW features different MAC interfaces such as SGMII, RGMII and RMII, and also provides a MDIO interface for PHY management.

    Any processing core in the Jacinto 7 device is capable of configuring the CPSW Ethernet Switch registers. However, the TI Processor SDK defines a dedicated ARM Cortex-R5F core to run the Ethernet Firmware, MAIN_MCU0 core 0. The CPSW Ethernet Firmware (EthFw) is a component developed by TI and distributed in source and binary form through TI Linux and RTOS Processor SDKs (http://www.ti.com/tool/PROCESSOR-SDK-DRA8X-TDA4X).

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