D3-3P-TDA3X-SK: Cascade Usecase in VisionSDK 3.04

Khai Trinh

Part Number: D3-3P-TDA3X-SK
Other Parts Discussed in Thread: TDA2, AWR1243, PGA460

I am playing with the Cascade usecase in VisionSDK. I understand in a cascade setup, there will be multiple transceiver chips used. Thus, there will be more than 4 RX channels coming down to the IssCapture link as each transceiver chip outputs max 4 RX channels. My questions:

1. Will a single instance of the IssCapture link in this usecase processing chain capture all cascade chips RX channels? If so, how does time sync take place between the different RF chips?

2. What's the SelectLink in the Chain graph for? I don't understand the need for the SelectLink?

3. I see the need to parallel process in the FFT Link thus 4 copies of it are deployed. Does that mean this example assume only 4 RX channels (or single RF chip used)? I also notice the 4 FFT Links are processing in IPU0. Wouldn't this be much slower than if it's done in DSP? And since 4 FFTs are done in IPU0, does this mean 4 FFT threads are launched to handle the processing? Would it be wide to maybe take advantage of IPU1 and assign 2 FFT processing to it to balance the processing load? or Even assign 2 FFTs to DSP1 and 2 to DSP2 which will process even faster than IPUs?

Thank you,

--Khai

over 4 years ago

0 Gaviraju Doddabettahalli Bettegowda over 4 years ago

TI__Genius 14305 points

Note: Each transceiver chips may contain multiple RX antenna & currently we are using Capture(VIP Capture) link because data coming from VIP port &

Both IssCpature & Capture link will support Multi-channel processing

1) Yes single instance of the Capture link will support processing of cascade chips RX channels & Synchronization will happen in Sync link, Please refer the

sync link source code for more details
.
2) The Select link will take a Multi-channel I/p data & It will split the data into multiple single-channel data.

Some links will not support Multi-channel data processing, So we need to use select link to convert multi-channel data into multiple single-channel data.

3) currently in cascade use-case 4 channel of data we are processing & These 4 FFT links are not running on IPU core.

Each FFT link is running on the following core

Alg_RadarProcess_fft1 is running on EVE1

Alg_RadarProcess_fft1 is running on EVE2

Alg_RadarProcess_fft1 is running on EVE3

Alg_RadarProcess_fft1 is running on EVE4

Actually, they are using WorkQ concept for scheduling work from IPU core to the remote core(EVE core is remote here), For more information about WorkQ

please refer the below document

VSDK/vision_sdk/docs/FeatureSpecificUserGuides/VisionSDK_UserGuide_WorkQ.pdf.

So there is no much load on IPU core.

Thanks
Gaviraju

0 Khai Trinh over 4 years ago in reply to Gaviraju Doddabettahalli Bettegowda

Genius 4140 points

HI Gaviraju,

So since we have 4 channels of FFT processing and only one EVE, processing the 4 FFT on EVE will have to be scheduled and done in sequential manner. Am i correct to assume then that in cascade mode, the more RX channels involved, the more processing time is required to process all the channels as they are done one by one?

Thanks,

--Khai

0 Gaviraju Doddabettahalli Bettegowda over 4 years ago in reply to Khai Trinh

TI__Genius 14305 points

Hi

We have 4 channels of FFT processing and we have 4 EVE core, So we scheduling all 4 FFT processing on each core.
ex: FFT1 is running on EVE1 core
    FFT2 is running on EVE2 core
    FFT3 is running on EVE3 core
    FFT4 is running on EVE4 core.

So this will not consume more time to process to FFT algorithm.

For more information you can refer the below usecase file:
vision_sdk/apps/src/rtos/radar/src/usecases/cascade_radar_beam_form/chains_cascadeRadarBf.c
or
vision_sdk/apps/src/rtos/radar/src/usecases/cascade_radar_object_detect/chains_cascadeRadarOd.c

pObj->radarFftParams1.workQcpuId = SYSTEM_PROC_EVE1;
pObj->radarFftParams2.workQcpuId = SYSTEM_PROC_EVE2;
pObj->radarFftParams3.workQcpuId = SYSTEM_PROC_EVE3;
pObj->radarFftParams4.workQcpuId = SYSTEM_PROC_EVE4;

These are parameter are set in the use-case, this will tell each FFT algorithm will run on each different EVE core.

Thanks
Gaviraju

0 Khai Trinh over 4 years ago in reply to Gaviraju Doddabettahalli Bettegowda

Genius 4140 points

Hi Gaviraju,

Do you have a use case that performs 2D FFT and then PeakDetection? I am using VisionSDK 3.04 which only has chains_cascadeRadarOd.c but it only does 1D FFT. Does the use case in chains_cascadeRadarBf.c does 2D-FFT? If so, where can I find that use case in the source code?

Thanks,

--Khai

0 Khai Trinh over 4 years ago in reply to Khai Trinh

Genius 4140 points

Hi Gaviraju,

Just so you are aware, I am looking for cascade use case and not the single transceiver use case.

Thanks,

--Khai

0 Gaviraju Doddabettahalli Bettegowda over 4 years ago in reply to Khai Trinh

TI__Genius 14305 points

By default 1D FFT (RADAR_FFT_MODE_HORIZONTAL) is enabled in chains_cascadeRadarOd.c usecase file such as

pObj->radarFftParams1.algFFTMode = RADAR_FFT_MODE_HORIZONTAL; (FFT is calculated along the direction of 1st dimension (horizontal) of buffer)

set as below if required

pObj->radarFftParams1.algFFTMode = RADAR_FFT_MODE_VERTICAL; ( FFT is calculated along the direction of 2nd dimension (vertical) of buffer)

You can modify as below if you want to do both 1D & 2D FFT

pObj->radarFftParams1.algFFTMode = RADAR_FFT_MODE_HORZ_AND_VERT

By default 1D & 2D FFT is enabled in chains_cascadeRadarBf.c.

This is enbled inside this function "ChainsCommon_ar12xxSetFFTParams" & this function is called from chains_cascadeRadarBf.c

Thanks

Gaviraju

0 Khai Trinh over 4 years ago in reply to Gaviraju Doddabettahalli Bettegowda

Genius 4140 points

Hi Gaviraju,

TDA3 doesn't have 4 EVEs. Looks like this use case is intent to run on TDA2 EVM? Please confirm.

Thanks,

--Khai

0 Khai Trinh over 4 years ago in reply to Khai Trinh

Genius 4140 points

Hi Gaviraju,

Do you have a doc that explains how the Cascade Use case work in the TDA2 board? It has an FPGA part which i am not sure what it's for? What's this use case capable of doing? We have the board in house but initial bring up we don't seem to be able to make some sense out of it.

Thanks,

--Khai

0 Gaviraju Doddabettahalli Bettegowda over 4 years ago in reply to Khai Trinh

TI__Genius 14305 points

Hi,

Yes, this use-case intent to run on TDA2 EVM.

Thanks

Gaviraju

0 Gaviraju Doddabettahalli Bettegowda over 4 years ago in reply to Khai Trinh

TI__Genius 14305 points

Hi,

Please refer to the below document.

chapter 4: vision_sdk/docs/Radar/ProcessorSDKRadar_DataSheet.pdf

Thanks

Gaviraju

0 Khai Trinh over 4 years ago in reply to Gaviraju Doddabettahalli Bettegowda

Genius 4140 points

Hi Gaviraju,

Building VisionSDK 3.04 (we need to use this version as this has been our development version for more than 1 year) for Cascade use case failed with following link error. Please advice. I have tried stripping the number of supported use cases in vision_sdk/apps/configs/cfg.mk to hopefully make the binary size smaller but didn't help.

RADAR_UC_LIST = \
UC_radar_capture_only \
UC_radar_read_fft_write \
UC_radar_objectdetect_display \
UC_radar_objectdetect_null \
UC_radar_capture_process \
UC_multi_radar_capture_fft_display \
UC_radar_read_objectdetect_write \
UC_cascade_radar_object_detect

Thanks,

--Khai

Build of libraries done.
# Configuro done!
# Making tda2xx-evm:arp32_1:release:vision_sdk_lib...
# Compiling tda2xx-evm:arp32_1:release:vision_sdk: src/main_common_eve1.c
# Compiling tda2xx-evm:arp32_1:release:vision_sdk: src/tlb_config_eve1.c
# Compiling tda2xx-evm:arp32_1:release:vision_sdk: ../eve_common/tlb_config_eve_common.c
# Compiling tda2xx-evm:arp32_1:release:vision_sdk: ../eve_common/main_eve_common.c
# Compiling tda2xx-evm:arp32_1:release:vision_sdk: C:/TI/processor_sdk_vision_03_04_00_00-poc.cas/vision_sdk/apps/src/common/main_app/tda2xx/eve1/src/main_eve1.c
# Compiling tda2xx-evm:arp32_1:release:vision_sdk: C:/TI/processor_sdk_vision_03_04_00_00-poc.cas/vision_sdk/apps/src/common/app_init/app_init_eve.c
# Compiling generated MAIN_APP_eve1_pearp32F.oearp32F
# Linking into C:/TI/processor_sdk_vision_03_04_00_00-poc.cas/vision_sdk/binaries/apps/tda2xx_cascade_bios_radar/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_1_release.xearp32F...
#
"C:/TI/processor_sdk_vision_03_04_00_00-poc.cas/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/eve1/linker_cmd_eve1_release.cmd", line 7: warning:
no matching section
"C:/TI/processor_sdk_vision_03_04_00_00-poc.cas/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/eve1/linker_cmd_eve1_release.cmd", line 8: warning:
no matching section
"C:/TI/processor_sdk_vision_03_04_00_00-poc.cas/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/eve1/linker_cmd_eve1_release.cmd", line 13: warning:
no matching section
"C:/TI/processor_sdk_vision_03_04_00_00-poc.cas/vision_sdk/links_fw/src/rtos/bios_app_common/tda2xx/eve1/linker_cmd_eve1_release.cmd", line 14: warning:
no matching section
"C:/TI/processor_sdk_vision_03_04_00_00-poc.cas/vision_sdk/binaries/apps/tda2xx_cascade_bios_radar/obj/vision_sdk/tda2xx-evm/arp32_1/release/vision_sdk_configuro/linker_mod.cmd", line 195: error:
program will not fit into available memory. run placement with alignment
fails for section ".bss:extMemNonCache:ipcShm" size 0xa66c0 page 1.
Available memory ranges:
SYSTEM_IPC_SHM_MEM size: 0x78000 unused: 0x78000 max hole:
0x78000
error: errors encountered during linking;
"C:/TI/processor_sdk_vision_03_04_00_00-poc.cas/vision_sdk/binaries/apps/tda
2xx_cascade_bios_radar/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_1_release.
xearp32F" not built
gmake[7]: *** [C:/TI/processor_sdk_vision_03_04_00_00-poc.cas/vision_sdk/binaries/apps/tda2xx_cascade_bios_radar/vision_sdk/bin/tda2xx-evm/vision_sdk_arp32_1_release.xearp32F] Error 1
gmake[6]: *** [arp32_1] Error 2
gmake[5]: *** [apps_eve1] Error 2
gmake[4]: *** [apps] Error 2
gmake[3]: *** [apps] Error 2
gmake[2]: *** [apps_exe] Error 2
gmake[1]: *** [apps] Error 2
gmake: *** [vision_sdk] Error 2

0 Gaviraju Doddabettahalli Bettegowda over 4 years ago in reply to Khai Trinh

TI__Genius 14305 points

Can you share the O/P of the below command?

gmake showconfig

Thanks

Gaviraju

0 Khai Trinh over 4 years ago in reply to Gaviraju Doddabettahalli Bettegowda

Genius 4140 points

$ gmake showconfig
C:/TI/processor_sdk_vision_03_04_00_00-poc.cas/vision_sdk/apps/configs/autorules_footer_cfg.mk:78: ipc_PATH does not exist! ()
gmake -C C:/TI/processor_sdk_vision_03_04_00_00-poc.cas/vision_sdk/apps/configs -f build_makeconfig.mk showconfig
gmake[1]: Entering directory `C:/TI/processor_sdk_vision_03_04_00_00-poc.cas/vision_sdk/apps/configs'
C:/TI/processor_sdk_vision_03_04_00_00-poc.cas/vision_sdk/apps/configs/autorules_footer_cfg.mk:78: ipc_PATH does not exist! ()
#
# Build Config is [ tda2xx_cascade_bios_radar ]
# Build Config file is @ C:/TI/processor_sdk_vision_03_04_00_00-poc.cas/vision_sdk/configs/tda2xx_cascade_bios_radar/cfg.mk
# Build Config .h file is @ C:/TI/processor_sdk_vision_03_04_00_00-poc.cas/vision_sdk/links_fw/include/config/apps/tda2xx_cascade_bios_radar/system_cfg.h
# Build CPUs is @ ipu1_0 ipu1_1 dsp1 eve1 eve2 eve3 eve4
#
# CPUs included in application,
# PROC_IPU1_0_INCLUDE=yes
# PROC_IPU1_1_INCLUDE=yes
# PROC_IPU2_INCLUDE=no
# PROC_DSP1_INCLUDE=yes
# PROC_DSP2_INCLUDE=no
# PROC_EVE1_INCLUDE=yes
# PROC_EVE2_INCLUDE=yes
# PROC_EVE3_INCLUDE=yes
# PROC_EVE4_INCLUDE=yes
# PROC_A15_0_INCLUDE=no
#
# Platform config,
# VSDK_BOARD_TYPE=TDA2XX_EVM [options: TDA2XX_EVM TDA2EX_EVM TDA3XX_EVM TDA3XX_RVP TDA2XX_RVP]
# PLATFORM=tda2xx-evm
# DUAL_A15_SMP_BIOS=no
# IPU1_SMP_BIOS=no
# DDR_MEM=DDR_MEM_512M [options: DDR_MEM_128M DDR_MEM_512M DDR_MEM_1024M]
# EMIFMODE=SINGLE_EMIF_512MB [options: SINGLE_EMIF_512MB SINGLE_EMIF_1GB ref build_pdk.mk]
# NDK_PROC_TO_USE=ipu1_1 [options: a15_0 ipu1_0 ipu1_1 ipu2 none]
# NSP_TFDTP_INCLUDE=yes [options: yes no]
# AWR1243_METAWAVE_LRR_CONFIG=no [options: yes no]
# TDA2EX_ETHSRV_BOARD=no [options: yes no]
# FATFS_PROC_TO_USE=ipu1_0 [options: ipu1_0 none]
# RADAR_BOARD=TDA2XX_CASCADE_RADAR [options: TDA3XX_AR12_ALPS TDA3XX_AR12_VIB_DAB_BOOSTER TDA3XX_RADAR_RVP none]
#
# Build config,
# BUILD_OS=Windows_NT [options: Windows_NT Linux]
# BUILD_DEPENDENCY_ALWAYS=no
# BUILD_ALGORITHMS=no
# BUILD_INFOADAS=no
# PROFILE=release [options: debug release]
# KW_BUILD=no
# CPLUSPLUS_BUILD=no
# IPU_PRIMARY_CORE=ipu1_0 [options: ipu1_0 ipu2]
# IPU_SECONDARY_CORE=ipu2 [options: ipu1_0 ipu2]
# A15_TARGET_OS=Bios [options: Bios Linux Qnx]
# BSP_STW_PACKAGE_SELECT=all [options: all vps-iss-dss-only vps-vip-vpe]
#
# Safety Module config,
# RTI_INCLUDE=no
# ECC_FFI_INCLUDE=no
# DCC_ESM_INCLUDE=no
#
# Video Module config,
# IVAHD_INCLUDE=no
# VPE_INCLUDE=no
# CAL_INCLUDE=no
# ISS_INCLUDE=no
# ISS_ENABLE_DEBUG_TAPS=no
# WDR_LDC_INCLUDE=no
# DSS_INCLUDE=yes
#
# Open Compute config,
# OPENCL_INCLUDE=no
# TARGET_ROOTDIR=C:/TI/processor_sdk_vision_03_04_00_00-poc.cas/vision_sdk/apps/src/rtos/opencl
# ENABLE_OPENCV=no
# ENABLE_OPENCV_TESTS=no
# OPENVX_INCLUDE=no
#
# Log config,
# ENABLE_UART_LOG=yes
# ENABLE_NETWORK_LOG=no
# ENABLE_CCS_LOG=no
# CIO_REDIRECT=no
#
# IPC config,
# WORKQ_INCLUDE=yes
# IPC_LIB_INCLUDE=yes
#
# Surround View config,
# SRV_FAST_BOOT_INCLUDE=no
#
# Other Module config,
# AVB_INCLUDE=no
# DCAN_INCLUDE=no
# RADAR_ONLY=yes
# CPU_IDLE_ENABLED=yes
# FAST_BOOT_INCLUDE=no
# DATA_VIS_INCLUDE=no
# HS_DEVICE=no
# ULTRASONIC_INCLUDE=no
# PGA450=
# PGA460=
# ENABLE_ALL_DEPTH=
#
# Linux config,
# DEFAULT_UBOOT_CONFIG=dra7xx_evm_vision_config
# DEFAULT_KERNEL_CONFIG=ti_sdk_dra7x_release_defconfig
# DEFAULT_DTB=dra7-evm-infoadas.dtb
# CMEM_INCLUDE=no
# IPUMM_INCLUDE=no
# IPU1_EVELOADER_INCLUDE=no
# ROBUST_RVC_INCLUDE=no
# BUILD_ADAM_CAR=no
#
# Alg plugins included in build,
# ALG_dmaSwMs ALG_radarprocess
#
# Use-cases included in build,
# UC_cascade_radar_capture_only UC_cascade_radar_object_detect UC_cascade_radar_object_detect_display
#
gmake -s -fbuild_makeconfig.mk check_cpu_include
gmake[2]: Entering directory `C:/TI/processor_sdk_vision_03_04_00_00-poc.cas/vision_sdk/apps/configs'
C:/TI/processor_sdk_vision_03_04_00_00-poc.cas/vision_sdk/apps/configs/autorules_footer_cfg.mk:78: ipc_PATH does not exist! ()
#
# CPUs that are NOT required but included in config [ tda2xx_cascade_bios_radar ],
#
#
# CPUs that are required but not included in config [ tda2xx_cascade_bios_radar ],
#
#
# Edit C:/TI/processor_sdk_vision_03_04_00_00-poc.cas/vision_sdk/build/configs/tda2xx_cascade_bios_radar/cfg.mk to include or exclude CPUs in an application
#
gmake[2]: Leaving directory `C:/TI/processor_sdk_vision_03_04_00_00-poc.cas/vision_sdk/apps/configs'
gmake[1]: Leaving directory `C:/TI/processor_sdk_vision_03_04_00_00-poc.cas/vision_sdk/apps/configs'

0 Gaviraju Doddabettahalli Bettegowda over 4 years ago in reply to Khai Trinh

TI__Genius 14305 points

Hi,

We are not able to reproduce the issue in our setup with your changes.

So the issue is here related memory requirement

The available SYSTEM_IPC_SHM_MEM size: 0x78000 but for your requirement needs size = 0xa66c0.

So Please increase the SYSTEM_IPC_SHM_MEM size for EVE1 core & try again.

Refer to the below document for more information.

chapter 6.2:vision_sdk/docs/FeatureSpecificUserGuides/VisionSDK_UserGuide_MemoryMap.pdf

Thanks

Gaviraju

0 Khai Trinh over 4 years ago in reply to Gaviraju Doddabettahalli Bettegowda

Genius 4140 points

HI Gaviraju,

I am able to get the 3.04 SDK code to build. Activating the cascade use case on TDA2 stuck, however.. Was there issue with 3.04 that you know about? We also have stock SDK 3.08 built that' built fine and running cascade mode on the TDA2 board no problem.

Since our development thus far was on 3.04, we would like to get 3.04 to be able to work on TDA2 cascade mode as porting would be much faster staying on the same development code base.

Attached are logs for both 3.04 vs 3.08 SDK running cascade. Note that in the 3.04 log, you will see 3 cascade use cases that's not typical. That's because I added one that show RDM on HDMI out. However, for both version, I simply activated use case (a).

Thanks,

--Khai

3.04-tda2.txt

[IPU1-0]  9: Cascade Radar (4 AWR1243) Capture + Null (TDA2xx Only)
[IPU1-0]  a: Cascade Radar (4 AWR1243) Capture + Radar Object Detect (DSP) + Null (TDA2xx Only)
[IPU1-0]  e: Cascade Radar (4 AWR1243) Capture + Radar Object Detect (DSP) + Display (TDA2xx Only)
[IPU1-0]
[IPU1-0]  x: Exit
[IPU1-0]
[IPU1-0]  Enter Choice:
[IPU1-0]
[IPU1-1]      6.524766 s:  NETWORK_CTRL: Starting Server (port=5000) !!!
[IPU1-1]      6.525010 s:  NETWORK_CTRL: Starting Server ... DONE (port=5000) !!!
[IPU1-0]      9.838193 s:
[IPU1-0]      9.838345 s: CHAINS_COMMON_CASCADE AR12xx Initializing FPGA ...
[IPU1-0]     10.838040 s: CHAINS_COMMON_CASCADE AR12xx Initializing FPGA Done...
[IPU1-0]     10.838223 s:  CHAINS: Init AR12xx ...
[IPU1-0]     10.838498 s:  UTILS_MCSPI: McSPI is configured in interrupt mode!!
[IPU1-0]     10.838681 s:  UTILS_MCSPI: McSPI is configured in interrupt mode!!
[IPU1-0]     11.064570 s:  AR12XX: ES3.0 Device detected!!
[IPU1-0]     11.064692 s:  AR12XX: Firmware Download Started : Ftype: META_IMAGE
[IPU1-0]     11.211187 s:  AR12XX: Firmware Download Successful : Ftype: META_IMAGE
[IPU1-0]     11.243488 s:  AR12XX: ES3.0 Device detected!!

3.08-tda2.txt

[IPU1-0]  RADAR Usecases
[IPU1-0]  ---------------
[IPU1-0]
[IPU1-0]  9: Cascade Radar (4 AWR1243) Capture + Null (TDA2xx Only)
[IPU1-0]  a: Cascade Radar (4 AWR1243) Capture + Radar Object Detect (DSP) + NetworkTx (TDA2xx Only)
[IPU1-0]  b: Cascade Radar (4 AWR1243) Capture + FFT (EVE) + Tx Beam Form Static Map (DSP)  + NetworkTx (TDA2xx Only)
[IPU1-0]
[IPU1-0]  x: Exit
[IPU1-0]
[IPU1-0]  Enter Choice:
[IPU1-0]
[IPU1-1]      6.508936 s:  NETWORK_CTRL: Starting Server (port=5000) !!!
[IPU1-1]      6.509211 s:  NETWORK_CTRL: Starting Server ... DONE (port=5000) !!!
[IPU1-0]     10.362349 s:
[IPU1-0]     10.362410 s:
[IPU1-0]
[IPU1-0]  ========================
[IPU1-0]  2D FFT Core Selection
[IPU1-0]  ========================
[IPU1-0]
[IPU1-0]  1: DSP
[IPU1-0]
[IPU1-0]  2: EVE
[IPU1-0]  Enter Choice:
[IPU1-0]
[IPU1-0]     21.383334 s: CHAINS_COMMON_CASCADE AR12xx Initializing FPGA ...
[IPU1-0]     22.983377 s: CHAINS_COMMON_CASCADE AR12xx Initializing FPGA Done...
[IPU1-0]     22.983590 s: Parsing radar_test_vector/sensor_master_config.txt
[IPU1-0]     22.993686 s: !!!No Valid Configuration file is found. Use Default Configurations!!!
[IPU1-0]     22.993838 s:  CHAINS: Init AR12xx ...
[IPU1-0]     22.994082 s:  UTILS_MCSPI: McSPI is configured in interrupt mode!!
[IPU1-0]     22.994540 s:  UTILS_MCSPI: McSPI is configured in interrupt mode!!
[IPU1-0]     22.994723 s:  UTILS_MCSPI: McSPI is configured in interrupt mode!!
[IPU1-0]     22.994845 s:  UTILS_MCSPI: McSPI is configured in interrupt mode!!
[IPU1-0]     23.220886 s:  AR12XX: ES3.0 Device detected!!
[IPU1-0]     23.221008 s:  AR12XX: Firmware Download Started : Ftype: META_IMAGE
[IPU1-0]     23.323552 s:  AR12XX: Firmware Download Successful : Ftype: META_IMAGE
[IPU1-0]     23.355883 s:  AR12XX: ES3.0 Device detected!!
[IPU1-0]     23.973708 s:  AR12XX: Firmware Download Started : Ftype: META_IMAGE
[IPU1-0]     24.260721 s:  AR12XX: Firmware Download Successful : Ftype: META_IMAGE
[IPU1-0]     24.297474 s:  AWR12XX: Version Master : 1.10.0.20
[IPU1-0]     24.297596 s:  AWR12XX: Version RF:2.0.0.1
[IPU1-0]     24.297688 s:  AWR12XX: Version mmWaveLink:1.2.0.0
[IPU1-0]     24.297779 s:  AWR12XX: Version Master Patch[dd.mm.yy]:14.9.18
[IPU1-0]     24.297871 s:  AWR12XX: Version RF Patch[dd.mm.yy]:14.9.18
[IPU1-0]     24.299731 s:  CHAINS: Config AR12xx ...
[IPU1-0]     24.299792 s:  CHAINS: Configuring the parameters for Normal Frame for Radar Number 1
[IPU1-0]     24.299914 s:  CHAINS: Configuring the parameters for Normal Frame for Radar Number 2
[IPU1-0]     24.300006 s:  CHAINS: Configuring the parameters for Normal Frame for Radar Number 3
[IPU1-0]     24.300097 s:  CHAINS: Configuring the parameters for Normal Frame for Radar Number 4
[IPU1-0]     24.387177 s:  AWR12XX: RF Boot Status = 0x71bfffb
[IPU1-0]     24.387268 s:  AWR12XX: RF Boot Time = 10347 us
[IPU1-0]     24.485024 s:  AWR12XX: RF Boot Status = 0x71bfffb
[IPU1-0]     24.485115 s:  AWR12XX: RF Boot Time = 10347 us
[IPU1-0]     24.582504 s:  AWR12XX: RF Boot Status = 0x71bfffb
[IPU1-0]     24.582596 s:  AWR12XX: RF Boot Time = 10281 us
[IPU1-0]     24.679985 s:  AWR12XX: RF Boot Status = 0x71bfffb
[IPU1-0]     24.680076 s:  AWR12XX: RF Boot Time = 10338 us
[IPU1-0]     24.691667 s:  CHAINS: Init AR12xx ... DONE !!!
[IPU1-0]     24.691911 s: Parsing radar_test_vector/sensor_master_config.txt
[IPU1-0]     24.693954 s: Parsing radar_test_vector/sensor_master_config.txt
[IPU1-0]     24.695967 s: Parsing radar_test_vector/sensor_master_config.txt
[IPU1-0]     24.698316 s: Parsing radar_test_vector/sensor_master_config.txt
[IPU1-0]     24.700359 s: Parsing radar_test_vector/sensor_master_config.txt
[IPU1-0]     24.705148 s: FILE_IO: Calibration file(calib_coef.bin) is present in sd card
[IPU1-0]     24.705270 s: Chains: NetworkTx Link
[IPU1-0]     24.705301 s:
[IPU1-0]
[IPU1-0]  Select Network Mode,
[IPU1-0]  --------------------
[IPU1-0]  1: TFDTP
[IPU1-0]  2: TCP/IP
[IPU1-0]
[IPU1-0]  Enter Choice:
[IPU1-0]

0 Gaviraju Doddabettahalli Bettegowda over 4 years ago in reply to Khai Trinh

TI__Genius 14305 points

A known issue in SDK 3.04
[Radar][Network]: Network transmission fails when running only IPU1_0 and IPU1_1 on Cascade Radar EVM

Steps to reproduce:

Build only for IPU1_0 and IPU1_1 for tda2xx_cascade_bios_radar in the SDK.

Run the capture and Network Tx use-case.

Run the network_rx tool from the PC side. UART console shows the assertion.

Description:

The Network Transmission Fails when running only IPU. The failure shows up as an assertion in the use-case.

The issue does not occur when all the other cores are enabled. Happens for TCP/IP and TFDTP

issue not observed if DSP, EVE or A15 enabled along with IPU cores.

If you running the use-case using multi-core, then you can ignore this issue.

Please use JTAG for debugging to find out where it's stuck.

Thanks

Gaviraju

0 Khai Trinh over 4 years ago in reply to Gaviraju Doddabettahalli Bettegowda

Genius 4140 points

Hi Gaviraju,

What's the reason for the number of 1D FFT chunks at the output of EVEs in the cascade mode on TDA2?

Thanks,

--Khai

Processors

Processors forum

D3-3P-TDA3X-SK: Cascade Usecase in VisionSDK 3.04