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AM4376: MAC to Switch configuration

Karthik M3
Prodigy 50 points
Part Number: AM4376
Other Parts Discussed in Thread: TLK105

Hi,

We have a custom board with 3 AM4376 processors on it. They are connected to a KSZ8567 Ethernet switch. The 2 processors are connected to the switch (Port 6/7) through a digital isolator to the RMII interface.

There is no PHY connected to the 2 processors. 

For testing and code reference purpose, We have carried out tranmistting packets on IDKAM437x EVM. We are able to transmit and receive packets.

On the custom board, we have modified the pin muxing and set the following

PHY = NWAY_NOPHY mode and

phy_addr = EMAC_CPSW_NO_PHY_ADDR (0xFFFFFFFF). 

We are transmitting the packets with the above configuration, But we don't see any packet transfer on wireshark. We tried all the different configuration on PHY mode and PHY_Addr, but nothing seems to work.

The only difference between IDKAM437x and custom board is there is no PHY and connected to a switch.

We have verified the custom board Ethernet is working by Linux UBoot (Modified the device tree to configure PHY as FIXED PHY and set address to 0xf) and SBL (Fixed PHY). Both work fine.

What should be the configuration or modifications to the EMAC & CPSW modules to work with NO phy and a switch?

We are using

1) Processor-SDK-RTOS-AM437x 06_00_00_07

Thanks

-

  • 0
    TI__Mastermind 41935 points

    Hi Karthik,

    Officially AM437x EMAC does not support the connecting to a switch directly due to the asymmetric nature of the in-band signaling from a phy to EMAC. You may see some people had success in connecting EMAC directly to a MAC port on a switch. It is because some switch has the phy enabled MAC port. If you really want to do this, you have to make sure the switch (KSZ8567) your use has the phy enabled MAC port.

    Ming

  • 0 in reply to Ming Wei
    Prodigy 50 points

    Hi,

    Thanks for the response - Ming. All the 3 CPUs works fine with UBOOT and SBL.

    We have a similar observation on the third CPU (CPU C) which is connected to a PHY (TLK105LRHBR) and then to switch KSZ8567R. 

    We are able to send/receive raw packets and perform example loopback test on IDKAM437x board successfully.

    But when we run the same codes on CPU C, we are unable to receive any packets in loopback test or observe any packets on wireshark when we send the raw packets. We observe the packets are transmitted by reading CPSW_STATS register.

    As informed earlier, the difference between IDK board supports RGMII and CPU C supports RMII. We have modified the mac type and mode flags based on RMII. But still no packet reception.

    Are we missing any configuration? 

    Thanks,

    Karthik

  • 0 in reply to Karthik M3
    TI__Mastermind 41935 points

    Hi Karthik,

    I am not sure I understand your statement above. You said that the 3rd CPU works fine with the phy in between the EMAC and switch, but you have problem with the same code on CPU-C. Did you mean that the problem happens when removed the phy? If that is the case, then it proves the phy is needed, because one of the in-band signaling from phy to the EMAC is the 10Mbps support.

    Ming

  • 0 in reply to Ming Wei
    Prodigy 50 points

    Hi Ming,

    Thanks for the reply and Sorry for the confusion

    On IDKAM437x EVM board, Loopback and trasmit codes works. But on Custom board it doesn't work.

    On the custom board, there are three AM4376 soc's. Two are connected to switch directly and one AM4376 (CPU C) is connected to PHY (TLK105LRHBR) and then to switch

    CPU C --> PHY (TLK105LRHBR) --> Switch.

    We are unable to transmit and receive packets on the CPU C. 

    -Regards,

    Karthik

  • 0 in reply to Karthik M3
    TI__Mastermind 41935 points

    Hi Karthik,

    1. Can you connect the CPU C to the switch directly?

    2. If you have to connect the CPU C to the Phy then the switch, did you change the BOARD library for TLK105LRHBR in ti_am4_610\pdk_am437x_1_0_16\packages\ti\board\src\idkAM437x\device\enet_phy.c and enet_phy.h?

    Ming

  • 0 in reply to Ming Wei
    Prodigy 50 points

    Hello Ming,

    As informed earlier, We have 3 CPUs on our custom board

    1) CPU A & B are connected to the switch

    2) CPU C is connected to PHY and then to the switch. What are the changes for the board library for TLK105LRHBR to be carried out?

    I modified the Speed  and loopback (For Loopback testing) register configuration in the PHY.C file as per TLK105LRHBR register set. 

    With both the configurations, we are not seeing any packets trasmitted on the wireshark? 

    -Regards,

    Karthik

  • 0 in reply to Karthik M3
    TI__Mastermind 41935 points

    Hi Karthik,

    The iceAMIC110 (AM335x a variant) is using the same phy (TLK105). You can refer to the changes made in iceAMIC110.

    Simply search the "TLK105" in C:\ti_am4_610\pdk_am437x_1_0_16\packages\ti\board\

    Ming