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OMAP-L138: Parallel NOR flash driving by interrupt

Part Number: OMAP-L138

 Hi all,

I'm working on an OMAP-L138 (ARM side) project that has a S29GL512S as its non-volatile memory and program storage. We wanna use TI-RTOS instead of Linux. Our Hardware designer team, connected EMA_WAIT0 pin to the #RY/BY pin of the NOR flash. I want to know, is it possible to use WR(Wait Rise Interrupt) and LT(Asynchronous Timeout Interrupt) interrupts to make a queue of Erase/Write operation commands by software?

Otherwise, I have to implement a NOR status polling that will makes more busy my processor and will blocks other tasks. Also, If I use "Task_sleep" in this polling, I will miss real-time handling of NOR flash.

According to the S29GLxxx TRM, a single word programming takes 400μs, and according to the EMIFA manual, the maximum value for AWCC.MAX_EXT_WAIT is 255. Then maximum timeout value will be ((MAX_EXT_WAIT+ 1) x 16) / EMA_Freq (EMA_CLKSRC). If we assume EMA_Freq = 50MHz, maximum extended timeout value will be 81μs that is not useful for my purpose. Is it correct?

Any suggestion would help me.

Thanks in advance.