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TSW38J84EVM: Setting PWD_TX_DIV = 0 on TRF3722 register 4 resets the DAC38J84

Prodigy 90 points

Replies: 5

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Part Number: TSW38J84EVM

When I set the PWR_TX_DIV to 0 (to enable the TX output) the board resets, requiring me to reconfigure the DAC, LMK and the TRF3722. I'm able to get the signal out of the DAC (measured on the current to voltage converter circuit), but when I enable the PWR_TX_OUT the signal out of J4 in 99% of times shows up for a moment and disappears the next. Reading back the register values seems to indicate that all the devices have been reset. 

I have narrowed down this event to when I change this bit to 0, but it may be that that is not the only way to trigger it. 

Is there anything I should be aware of when dealing with the setting up the TRF?

  • Hi Blaz,

    setting the PWR_TX_DIV should not interfere with the DAC38j84 on the PCB. The TRF3722 and DAC38j84 should have independent programming, unless the CPLD that controls the two devices have the wrong firmware during manufacturing.
    we will check here also and get back to you.

    -Kang
  • In reply to Kang Hsia:

    Hi Kang,

    thank you for the answer.

    I have found code supposedly running on the CPLD in this forum post: e2e.ti.com/.../2620764 and the DAC reset (but the DAC is not the only that resets) is connected to selection of the devices.
    ...
    if (!FMC_SEN_DAC && !FMC_SEN_LMK && !FMC_SEN_TRF) begin
    if (DAC_RESET_COUNTER < 3) begin
    DAC_RESET_COUNTER <= DAC_RESET_COUNTER + 2'd1;
    ...

    Is the pof file linked to in this post the correct one?

    Is it possible for me to download the pof file from the board's CPLD for you to verfiy against the correct one?
  • In reply to Blaz Kelbl:

    Hi,

    I would like to add that the code in forum post I linked above has a latch on the SEN_TRF_ROUTE signal - it's not assigned in all cases of the combinatorial process on lines 150-180. The code though has several syntax errors. Is it possible to get the original source file?

  • In reply to Blaz Kelbl:

    Hi,

    I have discovered the source of the issue and it was my mistake entirely. I limited the current on the 5 V power supply to 1.3 A, while the board consumes ~1.5 A when TRF3722's TX output is enabled, briefly dropping the voltage "reseting" to board to a strage state.

    Regardless, I would be greateful if you could provide the source and constrain file for the 5M80ZT100 as a starting point for intended modifications - I'd like to enable control of the TRF3722 from the FPGA va FMC.

    Best Regards,
    Blaz
  • In reply to Blaz Kelbl:

    Hi Blaz, 

    Thanks for updating this thread.

    the CPLD code and the firmware for the design is in the earlier post that you have mentioned. Unfortunately these are all I can allocate for this project. Sorry for the news. 

    I have pasted the link for the CPLD code for future references

    https://e2e.ti.com/support/rf-microwave/f/220/p/710952/2620764?tisearch=e2e-sitesearch&keymatch=TSW38J84EVM%20%20spi#2620764

    -Kang

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