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Part Number: TSW38J84EVM
When I set the PWR_TX_DIV to 0 (to enable the TX output) the board resets, requiring me to reconfigure the DAC, LMK and the TRF3722. I'm able to get the signal out of the DAC (measured on the current to voltage converter circuit), but when I enable the PWR_TX_OUT the signal out of J4 in 99% of times shows up for a moment and disappears the next. Reading back the register values seems to indicate that all the devices have been reset.
I have narrowed down this event to when I change this bit to 0, but it may be that that is not the only way to trigger it.
Is there anything I should be aware of when dealing with the setting up the TRF?
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In reply to Kang Hsia:
In reply to Blaz Kelbl:
Hi, I would like to add that the code in forum post I linked above has a latch on the SEN_TRF_ROUTE signal - it's not assigned in all cases of the combinatorial process on lines 150-180. The code though has several syntax errors. Is it possible to get the original source file?
Thanks for updating this thread.
the CPLD code and the firmware for the design is in the earlier post that you have mentioned. Unfortunately these are all I can allocate for this project. Sorry for the news.
I have pasted the link for the CPLD code for future references
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