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AFE7444EVM: Setting the right configuration using AFE7444 evaluation GUI

Prodigy 115 points

Replies: 13

Views: 279

Part Number: AFE7444EVM

Hello, TI.

First of all a small feedback.
I've been already struggling with AFE7444 configuration for several week. I've used the main datasheet, programmer's guide and TRM. I found that information is really scattered and information is not given straightforwardly. Also some terms, abbreviations and shortenings, registers names differ in each document!

So, I hope that you could help me to figure out how to set at least the main settings.

My target is:
RX (ADC): Data: 2x16 bit, IQ SR: 491.52 MS/s, ADC SR: 2929.12 MS/s, Decimation: 6
TX (DAC): Data: 2x16 bit, IQ SR: 491.52 MS/s, DAC SR: 8847,36 MS/s, Interpolation 18.

The thing is that those parameters of Decim and Interp are not mentioned in any example table, but in text description, even on the first page, we could find that this device has such configs.

1) Simply I'm really confused with how to set the particular value for Decimation.
It's said that decimation is set in: DDC reg 0x21
But decim field is only 4 bits, how it's possible to use it for example 32 decim factor? Also there is information: "In Half Rate Mode, the decimation factors are halved so that the final output rate is same. In Half Rate Mode, DecimFactorIndex 0 and 1 are invalid"
Half Rate mode is barely mentioned in the main data sheet and also in DDC reg 0x40 description it's said HALF_RATE_MODE "NOT USED"..... Really confusing.

I saved startup sequences for all predefined modes to comapre them! But I haven't found any correlation with the decimation value and the value of register! More over I unintentionally found comment in TRM page 449 reg 0x248: "DecimFactor = 0xD which is Decimation By 3 (IQ)". What is the dependence between reg value and the decimation itself?

2) Absolutely the same situation with Interpolation. It's tx_duc reg 0x26, but I don't understand how to choose it correctly. In the main datasheet on page 68 Table 2 there is some kind of information, but not for all interpolation values!


3) Also there is said that: "The AFE7444 evaluation module (EVM) GUI should be used to set up the AFE7444 in the desired mode and automatically generate all the necessary registers to use for SPI configuration." But there is no any instructions how to use it unless it's not predefined modes!

I tried to set the needed settings in advance tab and then pressed run complete startup sequence also on this tab. But nothing changes. I opened script window and press start recording to follow the sequence but it's always the same! I haven't figure out how to change and save new configuration.

4) Also I haven't found how to estimate/calculate the configuration of JESD according to parameters of DDC/DUC.

I really hope that Ti community could help me with all of these questions. I'm pretty sure that it would help a lot of other new users of AFE74xx.

Looking forward to hearing from you,
Thank you

  • In reply to Nihal Ummer:

    Also it's not clear, how to choose the right JESD config through your GUI.

    For example:

    I have 16 bit (I, Q) data with sampling rate 491.52 MS/s for ADC and DAC.

    From the description in datasheet I can't understand is it possible to make 8 independent JESD links in AFE7444 with the following config: 22210? (for RxA, RxB, RxC, RxD, TxA, TxB, TxC, TxD)

    Or it's only possible to make 4 independent  JESD links with the following config: 44210? (for RxTOP0, RXTOP1 and TX_TOP0, TX_TOP1)

    That is the first question.

    The second question is, how those settings are connected with your GUI? Look at the JESD Settings section.

    There are ADC0/1 Path and ACD2/3 path. What is it? Is it AB and CD from each RXTOP? Why the name is different?? And what does it mean /2RX or /1RX on the right side of these configs??

    And if you you show different settings for each RXTOP, why the DAC path has only one section? And the same question about /2TX or /1TX, what does it mean??

  • In reply to Nihal Ummer:

    Nihal, 

    To answer your question, its only possible to make 3 independent JESD links with the AFE. RXTOP0 & RXTOP1 can have two different link configurations. TXTOP0&1 share the same configuration. 

    The way this translates to the GUI is that ADC 0/1 corresponds to RX A/B. ADC 2/3 are RX C/D. You can see how both paths can be programmed separately, where are the DAC path only has one option. 

    The part of the GUI allowing you to select either /2TX or /1TX is just trying to specify whether the LMFS paramters you selected correspond to 1TX or 2TX's. 

    For example. A JESD setting of 44210 /2TX. indicates that for 2TX, There are 4 lanes for 4 devices (1 device = either Idata or Qdata therefore 4 devices = 2 i/q pairs. and each TX consists of 1 i/q pair) which means that each TX is programmed to transmit it's respective data on 2 of 8 total serdes lanes. TX JESD setting of 44210 / 2TX is the exact same as 22210 /1TX. (see the image below) So programming the GUI to either JESD setting result in the same configuration, it just depends on which you wish to choose. 

    Now for the RX. Since there are two paths capable of running at two different JESD links, I can program RXA/B using 1 Jesd link setting and RXC/D to a different one using ADC 2/3 path in the GUI. 

    Does this answer you question?

    Yusuf

     

  • In reply to Nihal Ummer:

    Nihal Ummer

    Instructions:
    1) Turn on AFE7444evm.

    2) Run AFE74xx software as admin

    3) Go to advance tab.

    4) In the right bottom corner you could find "Seq. Dump Mode" section. By default it's OFF. Select ON for PG30 (i don't know what's the difference between versions of PG, but at least with this it works). This settings make provides you a logFile (c:\Program Files (x86)\Texas Instruments\AFE74xx\Python Integration Plugin\SupportScripts\logFile.txt) with the programming sequences instead of writing them directly to the device. IMPORTANT NOTE: software is buggy, so if you have used this Dump function and closed the software, next time you start the software it will be shown that this function if OFF, but actually it's NOT. To deactivate it - turn it on once again and next tun it off. Otherwise GUI will be still writing sequences in the file rather than sending commands to the chip.

    5) After you've turned on dump mode (4) next step is to go to the upper right corner of the GUI to press button Init. script. This is like a reset function for GUI as far as I've understood. You could see that after pressing this button logFile will be refreshed.

    6) Now it's the time to make all the needed settings with the GUI interface.

    7) When you have finished with the settings you need to "save" this conditions. In the same section near Init Script there is "Get RX/TX Dig path and JESD config". This is latched button. Once you press it - it freezes all the set settings.

    8) Next step is to get the SPI sequence for LMK module (clocking module). Press LMK Config button and you will see the results in logFile.

    9) logFIle has a really good desription of your settings and the SPI sequence as well. Check everything carefully and if everything is OK I recomend you to use function "Convert to CFG format" (you could find it in the right bottom corner). It converts current logFile to cfg format so it will be possible to use cfg file for future configuration.

    10) When you are done with the step 9 it's time to get the main sequence. For this please press "Run Complete startup sequence" button in the upper right corner. This function rewrites logFile with the new sequence (because of this it is important to save results of previous step). Use "Convert to CFG format" function to save Startup sequence in cfg format.

    After conversion with Yusuf,  I fixed some details for proper work in the quotation!

    I need to add important NOTE: in cfg file for start up sequence you could find:

    W  0x005e  0x00		//The value in 0xbc should be written here.
    W  0x005e  0xXXXXXXX  	// Above line should be modified accordingly and this line should be removed.

    0xbc it's reg in TRAFFICCNTL page. You should read the value for your chip and place in instead of those two lines, e.g.

    W  0x005e  0x3C

    After that I combined LMK cfg with Start up sequence cfg in one common cfg file and use this file with Low Level View tab in AFE74xx GUI.

    Now it works!