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AFE7444EVM: Setting the right configuration using AFE7444 evaluation GUI

Prodigy 115 points

Replies: 13

Views: 279

Part Number: AFE7444EVM

Hello, TI.

First of all a small feedback.
I've been already struggling with AFE7444 configuration for several week. I've used the main datasheet, programmer's guide and TRM. I found that information is really scattered and information is not given straightforwardly. Also some terms, abbreviations and shortenings, registers names differ in each document!

So, I hope that you could help me to figure out how to set at least the main settings.

My target is:
RX (ADC): Data: 2x16 bit, IQ SR: 491.52 MS/s, ADC SR: 2929.12 MS/s, Decimation: 6
TX (DAC): Data: 2x16 bit, IQ SR: 491.52 MS/s, DAC SR: 8847,36 MS/s, Interpolation 18.

The thing is that those parameters of Decim and Interp are not mentioned in any example table, but in text description, even on the first page, we could find that this device has such configs.

1) Simply I'm really confused with how to set the particular value for Decimation.
It's said that decimation is set in: DDC reg 0x21
But decim field is only 4 bits, how it's possible to use it for example 32 decim factor? Also there is information: "In Half Rate Mode, the decimation factors are halved so that the final output rate is same. In Half Rate Mode, DecimFactorIndex 0 and 1 are invalid"
Half Rate mode is barely mentioned in the main data sheet and also in DDC reg 0x40 description it's said HALF_RATE_MODE "NOT USED"..... Really confusing.

I saved startup sequences for all predefined modes to comapre them! But I haven't found any correlation with the decimation value and the value of register! More over I unintentionally found comment in TRM page 449 reg 0x248: "DecimFactor = 0xD which is Decimation By 3 (IQ)". What is the dependence between reg value and the decimation itself?

2) Absolutely the same situation with Interpolation. It's tx_duc reg 0x26, but I don't understand how to choose it correctly. In the main datasheet on page 68 Table 2 there is some kind of information, but not for all interpolation values!


3) Also there is said that: "The AFE7444 evaluation module (EVM) GUI should be used to set up the AFE7444 in the desired mode and automatically generate all the necessary registers to use for SPI configuration." But there is no any instructions how to use it unless it's not predefined modes!

I tried to set the needed settings in advance tab and then pressed run complete startup sequence also on this tab. But nothing changes. I opened script window and press start recording to follow the sequence but it's always the same! I haven't figure out how to change and save new configuration.

4) Also I haven't found how to estimate/calculate the configuration of JESD according to parameters of DDC/DUC.

I really hope that Ti community could help me with all of these questions. I'm pretty sure that it would help a lot of other new users of AFE74xx.

Looking forward to hearing from you,
Thank you

  • Guru 54040 points

    Nihal,

    We are looking into this.

    Regards,

    Jim

  • In reply to jim s:

    Nihal, 

    Please take a look at the video series revolving around this part. Start with "Navigating the datasheet" and go from there. You will find many of your questions answered there.

    https://training.ti.com/getting-started-with-the-afe74xx-rf-sampling-transceiver

    Thanks

    Yusuf

  • In reply to Yusuf%20Agoro:

    Yusuf, are you serious?
    I asked you so many direct and clear questions and have got no answers! You think that after such a long time struggling with this I haven't checked those videos?

    Sorry if you could find me irritated, but I am! I asked you direct question about Decimation, I asked you about direct question about Interpolation, direct question about JESD config, and question about how to implement, how to set settings that are NOT covered with predefined modes but that are mentioned in datasheet.

    Really good Yusuf...

    But yesterday it seems that I found the solution. TI community, this is for whom is interested in using your own settings with AFE74xx series.
    I didn't check it in hardware yet, because I'm in a hurry to provide you the solution because TI has already marked this topic with "solved" and it will be closed soon.
    But at least with this solution you will see that SPI sequence is changes according to your settings.

    Instructions:
    1) Turn on AFE7444evm.

    2) Run AFE74xx software as admin

    3) Go to advance tab.

    4) In the right bottom corner you could find "Seq. Dump Mode" section. By default it's OFF. Select ON for PG1.4 (i don't know what's the difference between versions of PG, but at least with this it works). This settings make provides you a logFile (c:\Program Files (x86)\Texas Instruments\AFE74xx\Python Integration Plugin\SupportScripts\logFile.txt) with the progmramming sequencies instead of writing them directly to the device. IMPORTANT NOTE: software is buggy, so if you have used this Dump function and closed the software, next time you start the software it will be showned that this function if OFF, but actually it's NOT. To deactivate it - turn it on once again and next tun it off. Otherwise GUI will be still writing sequencies in the file rather than sending commands to the chip.

    5) Afteryou've turned on dump mode (4) next step is to go to the upper right corner of the GUI to press button Init. script. This is like a reset function for GUI as far as I've understood. You could see that after pressing this button logFile will be refreshed.

    6) Now it's the time to make all the needed settings with the GUI interface.

    7) When you have finished with the settings you need to "save" this conditions. In the same section near Init Script there is "Get RX/TX Dig path and JESD config". This is latched button. Once you press it - it freezes all the set settings.

    8) Next step is to get the SPI sequence for LMK module (clocking module). Press LMK Config button and you will see the results in logFile.

    9) logFIle has a really good desription of your settings and the SPI sequence as well. Check everything carefully and if everything is OK I recomend you to use function "Convert to CFG format" (you could find it in the right bottom corner). It converts current logFile to cfg format so it will be possible to use cfg file for future configuration.

    10) When you are done with the step 9 it's time to get the main sequence. For this please press "Run Complete startup sequence" button in the upper right corner. This function rewrites logFile with the new sequence (because of this it is important to save results of previous step). Use "Convert to CFG format" function to save Startup sequence in cfg format.


    Next step for all of us to check if these cfgs files will work and set the right settings in the chip.
    Also if you want to make some new changes I recomend you to close AFE74xx software and do everything from the sratch, just in case....

    Regarding another question: To understand how to calculate JESD config correctly you could check this article: https://e2e.ti.com/blogs_/b/analogwire/archive/2014/09/24/jesd204b-determining-your-link-configuration
    Try to calculate your parameters and you could check it with logFile after LMK Config.

    I hope it works in hardware...

  • In reply to Nihal Ummer:

    Guys, I found that such CFG generating does not provides working configuration due to miss understanding of what do PG1.4, 2.0 and 3.0 mean. Still I've managed to run the right settings on hardware.

    To TI: please don't close the topic! After a weekend I'll provide updated algorithm.

  • In reply to Nihal Ummer:

    Nihal, 

    Unfortunately the only configurations supported are the ones listed in the device operating mode table. The datasheet will be updated to reflect that a decimation factor of 6 is not available. 

    Yusuf

  • In reply to Yusuf%20Agoro:

    Yusuf, you are really confusing me..........

    If it doesn't work how I've managed to run chip with this mode?

    When I do the following: (pretty much the same algorithm, just do not use the Seq. Dump Mode)

    1) Turn on AFE7444evm.

    2) Run AFE74xx software as admin

    3) Go to advance tab.

    4) Set required settings.

    5) Press Init script

    6) Press Get RX/TX Dig path and JESD config

    7) Press LMK Config (wait until sequence will be written to the chip)

    8) Press Run Complete Startup Sequence (wait until sequence will be written to the chip, it takes about 20 sec)

    And this works even with Decimation x6 and Interp x18! I checked it with my "repeater mode" script. With such settings bandwidth should be ~400MHz and it is! You could see it on the picture.

    Now I have the question: How could I save the main script??? When I try Start recording in Script menu - it doesn't work for me. It records some commands, but when I try to use this script - it doesn't provide the same result as when I press "run Complete Startup Sequence".

    I tried to record with "Start recording" my own working script - and it did it wrong! Recorded sequence is missing some commands in comparison with my original script.

    When I tried to get the CFG file with "Seq. Dump Mode" as I described previously, it provides different results when you choose different PG option. I even don't know what PG means! And the thing is that CFGs also don't work when I use it "Low level view" tab.

    Please help me! We bought this chip because it's important to have 400 MHz bandwidth! How it's possible that now you tell me that it doesn't work? 

    As I told you I've managed to set this mode, now please, just help me to get the SPI sequence from you software!

  • In reply to Nihal Ummer:

    Nihal, 

    Send me a picture of the advanced mode settings you are using. 

    Yusuf

  • In reply to Yusuf%20Agoro:

    Yes, Yusuf, please:

    After that for checking I use this script:

    
    
    import time
    
    ########################################
    def write_and_check (page, reg, w_value) :
    
        r_value = 0
        GUI.write_register(page, reg, w_value)
        r_value = GUI.read_register(page,reg)
    
        if ( r_value != w_value ) :
            print ('ERROR: w_value = ', w_value, 'r_value = ', r_value)
          
        #else :
        #    print ('GOOD FOR YOU')
    
    ########################################
    
    
    ########################################
    print '################################'
    print 'START SCRIPT LOOPBACK MODE'
    print '################################'
    
    GUI_Module=__import__('AFE74xx')
    GUI=GUI_Module.Device_GUI("AFE74xx")
    
    
    ## Repeater Mode sequence
    #
    print "Start Sequence"
    
    write_and_check ( "LMK04828", 0x0139, 0x02 )      # Sysref Pulse
    write_and_check ( "LMK04828", 0x0139, 0x03 )      # Sysref Continuous
    
    
    GUI.write_register ( "AFE76xx_GLOBAL",0x11,0x8 )  # Select TRAFFICCNTL page
    write_and_check ( "TRAFFICCNTL",0x1A0,0xB8 )      # Disable SYSREF gating
    GUI.write_register ( "AFE76xx_GLOBAL",0x11,0x0 )  # Close TRAFFICCNTL page
    
    
    GUI.write_register ( "AFE76xx_GLOBAL",0x10,0x01 ) # Select TX_DUC_P0 (ch A)
    write_and_check ( "tx_ducp0", 0x7E, 0x1A )        # Depth of JESD elastic buffer. Value <= mem_k_m1 (p: jesd_tx, r: 0x20)
    GUI.write_register ( "AFE76xx_GLOBAL",0x10,0x00 ) # Close TX_DUC_P0 (ch A)
    
    
    GUI.write_register ( "AFE76xx_GLOBAL",0x11,0x3 )  # Select TXDIG_P0 page
    write_and_check ( "tx_digp0",0x20,0x3 )           # TX init_state set for both TX_TOPs
    GUI.write_register ( "AFE76xx_GLOBAL",0x11,0x0 )  # Close TXDIG_P0 page
    
    
    GUI.write_register ( "AFE76xx_GLOBAL",0x17,0xC )  # Select SerDes_JESD_TX page
    write_and_check ( "jesd_tx",0x45,0x80 )           # RX init_state set
    write_and_check ( "jesd_tx",0x26,0xF )            # RX jesd_clear_data set
    write_and_check ( "jesd_tx",0x45,0xC0 )           # FB init_state set
    write_and_check ( "jesd_tx",0x45,0xE0 )           # FIFO inti_state set
    GUI.write_register ( "AFE76xx_GLOBAL",0x17,0x0 )  # Close SerDes_JESD_TX page
    
    
    GUI.write_register ( "AFE76xx_GLOBAL",0x11,0x8 )  # Select TRAFFICCNTL page
    write_and_check ( "TRAFFICCNTL",0xC5,0x5 )        # RX-TX loop-back enabled for both 2T2R_TOPs
    write_and_check ( "TRAFFICCNTL",0xCF,0x1 )        # loop-back FIFO init_state set
    write_and_check ( "TRAFFICCNTL",0xCF,0x0 )        # loop-back FIFO init_state clear
    GUI.write_register ( "AFE76xx_GLOBAL",0x11,0x0 )  # Close TRAFFICCNTL page
    
    
    GUI.write_register ( "AFE76xx_GLOBAL",0x17,0xC )  # Select SerDes_JESD_TX page
    write_and_check ( "jesd_tx",0x45,0xC0 )           # RX init_state clear
    write_and_check ( "jesd_tx",0x45,0x80 )           # FB init_state clear
    write_and_check ( "jesd_tx",0x45,0x00 )           # FIFO inti_state clear
    write_and_check ( "jesd_tx",0x26,0x00 )           # RX jesd_clear_data clear
    GUI.write_register ( "AFE76xx_GLOBAL",0x17,0x0 )  # Close SerDes_JESD_TX page
    
    
    GUI.write_register ( "AFE76xx_GLOBAL",0x11,0x3 )  # Select TXDIG_P0 page
    write_and_check ( "tx_digp0",0x20,0x0 )           # TX init_state clear for both TX_TOPs
    GUI.write_register ( "AFE76xx_GLOBAL",0x11,0x0 )  # Close TXDIG_P0 page
    
    
    GUI.write_register ( "AFE76xx_GLOBAL",0x11,0x8 )  # Select TRAFFICCNTL page
    write_and_check ( "TRAFFICCNTL",0x1A0,0xFC )      # Gate SYSREF
    GUI.write_register ( "AFE76xx_GLOBAL",0x11,0x0 )  # Close TRAFFICCNTL page
    
    
    ## SYNC programming
    GUI.write_register ( "AFE76xx_GLOBAL",0x17,0xC )  # Select SerDes_JESD_TX page
    write_and_check ( "jesd_tx",0x72,0xFF )           # Override STX output with K28.5
    time.sleep ( 0.10 )                               # Delay 100 ms
    write_and_check ( "jesd_tx",0x72,0xF0 )           # Override STX output with K28.5
    GUI.write_register ( "AFE76xx_GLOBAL",0x17,0x0 )  # Close SerDes_JESD_TX page
    
    print "Finish sequence"
    
    
    
    print '################################'
    print 'END SCRIPT LOOPBACK MODE'
    print '################################'
    

  • In reply to Yusuf%20Agoro:

    Hi, Yusuf!

    Do you have any updates? Have you tested my settings?

    We are loosing our time and of course money! If it works, how I can save the sequence of commands to set my settings without your GUI....Script recording doesn't work properly, log converting to CFG file has different results according to PG version (don't know what does it mean) and using this cfg also doesn't work. Help me to solve this issue please.

    We paid for eval board, we bought several pieces of chips and now we got stuck because of your inactivity.

  • In reply to Nihal Ummer:

    Nihal, 

    As I mentioned previously, the mode you desire is not currently supported. However, I went ahead and created the configuration file for the custom mode you want and I will send it to you in a private message. 

    Yusuf