Part Number: DAC38RF80
The DAC38RF80 allows three ways (section 8.3.8 of the data sheet) to set up the link to the DACs through the JESD interface: Dual DAC dual link, Dual DAC single link, and Single DAC single link.
For Dual DAC single link, does that just mean whatever data I send over the 8 JESD lanes gets sent to both DACs identically?
For Single DAC single link, does the output of this always have to go through DAC A or can I switch it so it only goes through DAC B?
The following discussion may help you in understanding dual link applications:
We are glad that we were able to resolve this issue, and will now proceed to close this thread.
If you have further questions related to this thread, you may click "Ask a related question" below. The newly created question will be automatically linked to this question.
In reply to Kang Hsia:
I actually read that thread, along with several others, before posting my question. Unfortunately, that thread is discussing the dual link applications. You will notice that my two questions in this thread are asking about the single link applications that this DAC offers.
In reply to Jacob Rohde:
If you refer to JESD204 standard, link aggregation has nothing to do the type of data going into the DUC channels or DACs. For instance, if each DAC (either single DUC or dual DUC per DAC digital path) requires 2 lanes, single link means the JESD204 state machine will treat the total of 4 lanes as a single link. If any of the lanes have errors, then the link establishment will need to restart again (i.e. restart the hand-shake).
Dual link simply means that the two of the two lanes are completely independent of each other. If the lanes on one DAC path is bad, that link will go through link re-establishment, without impacting other lanes (link).
JESD204 standards can be downloaded free at the JEDEC website.
I understand the JESD interface. My questions are not about what the definition of a single/dual link are.
My first question is asking if I used both DACs in a singe link do I have to send DAC A's information over 4 lanes and DAC B's information over 4 lanes? Or can I send all of DAC A's information over 8 lanes and then have that data be sent through the DAC B path after the JESD block (either by sending it down the other DUC or by using the output summer on the adjacent DUC)? In the latter scenario I would essentially have an 8 lane link that would look like I was only talking to one DAC, but the other DACs output would mimic it.
My next question was whether or not I could use DAC B in single DAC single link mode, instead of DAC A. That's it.
The reason I ask these questions is because I plan on routing both DAC A and DAC B's outputs in hardware. However, I would also like to use and LMFSHd of 82121. I don't care if I am using only one at a time (not simultaneous but can still switch between them with register re-writes) or if both outputs are identical, as long as I am able to send data out of A and B using this specific LMFSHd. Hopefully understanding my application will clarify my problem.
Understood. Thank you for your clarification.
I believe the 82121 mode is a special case where only one DUC (I/Q pair) can be used. I believe it is limited to channel A DUC active. You may use the output summing block to route the data to either DAC A channel or DAC B channel.
I will have our expert on this device to comment better.
"My next question was whether or not I could use DAC B in single DAC single link mode, instead of DAC A. That's it."
[Eben]: Yes you can. You can use TXA DUC data path for the digital processing. The output sum block can be diasbled for DAC A and enabled for DAC B to route the data out from DAC A digital to DAC B analog. See below illustration:
In reply to Ebenezer Dwobeng:
The path you drew in your picture was from DUC2 to DAC A. I am assuming you meant to draw the path from DUC1 to DAC B. Thank you for the help!
All content and materials on this site are provided "as is". TI and its respective suppliers and providers of content make no representations about the suitability of these materials for any purpose and disclaim all warranties and conditions with regard to these materials, including but not limited to all implied warranties and conditions of merchantability, fitness for a particular purpose, title and non-infringement of any third party intellectual property right. No license, either express or implied, by estoppel or otherwise, is granted by TI. Use of the information on this site may require a license from a third party, or a license from TI.
TI is a global semiconductor design and manufacturing company. Innovate with 100,000+ analog ICs andembedded processors, along with software, tools and the industry’s largest sales/support staff.