Is there a Digital Down Converter, Digital Up Converter IF translator design
with an EVM example?
The TI TSW4100, has a hardware design with a clock solution, Data converter solution,
power solution, DDC, DUC, FPGA connectivity, and design software for configuring 2 and 4 channel
digital repeaters with a single antenna. The TI webpage link for the TSW4100 is:
Thanks for asking,
I have purchased the TSW4100 and am familiarizing myself with its operation. I have been unable to find any documentation or source related to the program currently in the Cypress FPGA .... is this available, if so where can I get it and what format is it in.
Thanks in advance for any input.
The EVM engineer has included the TSW4100 firmware files in the attached ZIP file. Please reference the TSW4100 User Guide also.
Thanks for the firmware I am digging into that. I have a problem with the TSW4100 DAC5688 and CDCD7005 Control software. I'm hoping that someone has seen it before and can suggest a solution.
When I hit "Load Settings" from any one of the pages it typically just flashes and does bring up a File Select Dialog. Once or twice it did and I was able to load the settings file and verifiy that I could get a PLL lock, but I have not yet been able to reproduce a situation where the File Select Dialog does open on a reliable basis.
Thanks for any input.
The TSW4100 GUI software is a MATLAB GUI, that calls specific DOS-terminal programs. There is a GUI panel, and a DOS terminal panel. If you look at the DOS terminal panel, it may indicate
a USB driver error, or other error message. Check in the TSW4100 user guide, there are specific USB peripherals in the System->DeviceManager->USB that indicate if the proper driver is installed
and running. You can uninstall and reinstall the software, and/or send us a screen shot of the error messages. It would help if you can do this Thurs or Fri, as I wll not be in the office/lab next week.
Eric (Zhang, Eric [email@example.com]) can be contacted as well for software GUI specific questions.
This is not a TSW4100 GUI issue, it is a TSW4100 DAC5688 and CDM7005 Control program issue. The USB drivers appear to be working fine. I get status messages that say that there is successful DAC5688 register communication.
On Further research it seems to be a problem with NI LVRT system. Using Procmon I can see that ther are attempts to access registry keys in HKLM\SOFTWARE\Microsoft\CTF\KnownClasses and this key does not exist ....
I'd be happy to communicate directly with whomever is responsible for the DAC/CDM control app. Is this still firstname.lastname@example.org
Also, I have uninstalled and reinstalled and the problem persists. There is screen shot to send as the only symptom is that when you click Load Settings, nothing happens.
Eric or Ruben can help with the Labview Runtime LVRT issue. Please contact Eric first.
We are trying to design a Digital GSM Repeater operating at 900/1800 MHz bands. It would mainly comprise of a “Digital Down Converter” and “Digital Up Converter”. Please suggest, what kind of receiver and transmitter architecture is preferred between a Homodyne and Heterodyne architecture?
Thanks in advance.
In repeater applications we can frequency translate a band, or we can isolate a small group or single carriers. The repeater typically has one or two receive and transmit antennas. The zero IF (homodyne) or low IF, standard IF(heterodyne) architectures are typically before the DDC and after the DUC.
The DDC and DUC can be used for isolating small groups or single channels. The frequency translation occurs on part of a band of channels. If an entire block is translated, this can be done without the DDC and DUC, the ADCs sample the quadrature demodulator output, the DAC interpolates and translates the input to a new frequency.
no DDC homoodyne, and possible DAC tuning. ( TRF3711 quadrature demodulator -> dual ADC) TSW6011to (DAC5688 to TRF3703) TSW3003.
a) RF -> IF (range of 61 to 90Mhz) integrated ADC+DDC (AFE8406) AFE8406 SEK -> multichannel format conversion to dual DAC -> (DAC5688 to TRF3703) TSW3003
this would support a dual ADC, dual DAC indoor / outdoor version without diversity, and the transmit portion is low IF direct upconversion
(b) a real IF only single antenna input and output (ADC, GC5016, DAC) TSW4100. This technology could be extended to two ADCs and
two DAC by adding a second ADC and second DAC.
Please contact Roland Sperlich [email@example.com] about the EVMs and experiment data that his group has collected with these EVMs.
Hi Radio Joe,
Thanks for your detailed reply.
From your reply I understand a couple of Architectural options are available for a GSM Digital Repeater design.
Please let us know if it would be possible to meet the ETSI GSM Repeater specification by following the Homodyne approach as proposed by you. Such a solution would truly be a very low cost one.
References of any TI based GSM digital repeater solution following the homodyne approach as proposed by you would be appreciated.
Hi Radio Joe,
Our application is a band selective GSM 900/1800 MHz repeater that amplifies & re-transmits the signals to increase the coverage area. We are looking for a cost-effective solution with the basic specification given below:
The solution may use a Homodyne or Heterodyne Tx / Rx architecture, our basic concern is its compliance with ETSI standards as well as cost.
Hi Roland Sperlich,
Please find below our requirements:
· No. of Sub-bands : 3 at a time
· Sub-band : 0.8, 2.2, 4.2, 6.2, 10.2, 16.2, 20 MHz
· Sub-band : 0.8, 2.2, 4.2, 12.2, 25 MHz
Output power level
UL: 16dBm (GSM 900 & 1800)
DL: 19dBm (GSM 900 & 1800)
Adjustable gain: 40-65 dB, in steps of 1 dB
Output power level
+33.0 dBm DL & UL (GSM 900)
+37.0 dBm UL & +40 dBm DL (GSM1800)
Adjustable gain: 65-95 dB, in steps of 1 dB
Please suggest a suitable time for telecon.
Could we select band of interest from second or third nyquist zone.
The ADC can be used with either Nyquist zone 1,2,3,4,5. A single (nyquist zone) range of IF frequencies is filtered and converted. Zero IF or low IF architectures, the first nyquist zone is used. If the IF is higher in frequency, there is a tradeoff in ADC performance, and sample clock quality for higher nyquist zones.
We have a low IF downconversion, 910Mhz input, 900Mhz LO, quadrature down converted to 12Mhz I and Q. In this example we want to have a 20Mhz band. We could use a ADC sampling at 50Mhz for both I and Q. The ADC input is filtered from 1 to 24Mhz. The DDC (GC6016) can provide the DC offset removal, and IQ imbalance correction, depending on the number of channels. The DDC processing is done between the Rx and DDUC blocks. We translate the low IF to 0IF, filter, and decimate. The DDUC output at a 25Mhz rate, has an 80% BW filter to pass the 20Mhz signal.
We have a real mixer that translates the 910Mhz input, with a 840Mhz LO, the output is filtered for 70Mhz +/- 12Mhz. The ADC sampling at 100Mhz, uses the 2nd nyquist zone to sample the real 70Mhz IF. The DDC (GC6016) converts the real input to complex, and translates the complex input to 0IF. The Rx and DDUC blocks, filter and decimate the 0IF translated signal. The DDUC output is at a 25Mhz rate, has an 80% BW filter to pass the 20Mhz signal.
The GC6016 can be used with both real and complex IF inputs. You can discuss desired IF planning with Roland in your conference call.
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