I have attached ultra wideband mode configuration file of GC4016. This configuration is working fine for Decimations 8,10 and 16 and not working for 9,11,12,13,14 and 15. Why it is behaving like that.
/* Wideband configuration file *//* general modes register */ global_reset 1 out_blk_reset 1 pad_reset 1resampler_reset 1 edge_write 1 ck_2x_en 0 ck_2x_test 0ck_loss_detect 0/* general sync */ lvds 0 4_bit_address 0 output_sync 4 diag_sync 7 /* count sync */ one_shot 1 os_mode 1 count_test 0 counter_sync 7 diag_source 0 /* terminal count */ cnt 0 /* channel configurations */ channel 0 phase 0 freq 0x4CCCCCCD cfir_coef ../Taps/cfir_150.taps pfir_coef ../Taps/pfir_150.taps ch_reset 0 use_shift 1 shift 4 freq_sync 7 phase_sync 7 dither_sync 0 /* Original is 4 */ nco_sync 4 zpad_en 0 zpad_sync 4 nzeros 0 flush_sync 4 dec_sync 4 dec 7 gain_sync 7 mix20b 1 big_scale 7 scale 5 /* Changed - ELSEC */ qonly 0 ionly 1 splitiq 1 neg_ctl 0 test 0 coarse 0 idly_cfir 0 qdly_cfir 0 no_sym_cfir 0 peak_select 0 idly_pfir 0 /* Changed - ELSEC */ qdly_pfir 1 no_sym_pfir 0 msb_pol 0 in_fmt 0 ab_sel 0 input_sel 0 peak_mode 0 peak_threshold 3 peak_sync 5 fine_gain 1070 channel 1 /* copy_channel 0 same as 0 */ /* ch_reset 1*/ phase 0x4000 freq 0x4CCCCCCD cfir_coef ../Taps/cfir_150.taps pfir_coef ../Taps/pfir_150.taps ch_reset 0 use_shift 1 shift 4 freq_sync 7 phase_sync 7 dither_sync 0 /* Original is 4*/ nco_sync 4 zpad_en 0 zpad_sync 4 nzeros 0 flush_sync 4 dec_sync 4 dec 7 gain_sync 7 mix20b 1 big_scale 7 scale 5 /* Changed - ELSEC */ qonly 1 ionly 0 splitiq 1 neg_ctl 0 test 0 coarse 0 idly_cfir 0 qdly_cfir 0 no_sym_cfir 0 peak_select 0 idly_pfir 0 /* Changed - ELSEC */ qdly_pfir 1 no_sym_pfir 0 msb_pol 0 in_fmt 0 ab_sel 0 input_sel 0 peak_mode 0 peak_threshold 3 peak_sync 5 fine_gain 1070 channel 2/* copy_channel 0 same as 0 *//* ch_reset 1*/ phase 0x0 freq 0x4CCCCCCD cfir_coef ../Taps/cfir_150.taps pfir_coef ../Taps/pfir_150.taps ch_reset 0 use_shift 1 shift 4 freq_sync 7 phase_sync 7 dither_sync 0 /* Original is 4*/ nco_sync 4 zpad_en 0 zpad_sync 4 nzeros 0 flush_sync 4 dec_sync 4 dec 7 gain_sync 7 mix20b 1 big_scale 7 scale 5 /* Changed - ELSEC */ qonly 0 ionly 1 splitiq 1 neg_ctl 0 test 0 coarse 0 idly_cfir 0 qdly_cfir 0 no_sym_cfir 0 peak_select 0 idly_pfir 0 qdly_pfir 0 no_sym_pfir 0 msb_pol 0 in_fmt 0 ab_sel 0 input_sel 0 peak_mode 0 peak_threshold 3 peak_sync 5 fine_gain 1070 channel 3/* copy_channel 0 same as 0 *//*ch_reset 1*/ phase 0x4000 freq 0x4CCCCCCD cfir_coef ../Taps/cfir_150.taps pfir_coef ../Taps/pfir_150.taps ch_reset 0 use_shift 1 shift 4 freq_sync 7 phase_sync 7 dither_sync 0 /*Original is 4*/ nco_sync 4 zpad_en 0 zpad_sync 4 nzeros 0 flush_sync 4 dec_sync 4 dec 7 gain_sync 7 mix20b 1 big_scale 7 scale 5 /* Changed - ELSEC */ qonly 1 ionly 0 splitiq 1 neg_ctl 0 test 0 coarse 0 idly_cfir 0 qdly_cfir 0 no_sym_cfir 0 peak_select 0 idly_pfir 0 qdly_pfir 0 no_sym_pfir 0 msb_pol 0 in_fmt 0 ab_sel 0 input_sel 0 peak_mode 0 peak_threshold 3 peak_sync 5 fine_gain 1070 /* resampler parameters */ ratio_0 0x04000000 ratio_1 0x04000000 ratio_2 0x04000000 ratio_3 0x04000000 res_coef 0 ../Taps/res_bypass_1024.taps res_sync 4 nf 0 nc 0 no_sym_res 1 nm 6 filter_sel_3 0 filter_sel_2 0 filter_sel_1 0 filter_sel_0 0 tag_22 0 round 3 final_shift 4 chan_map_d 0 chan_map_c 0 chan_map_b 0 chan_map_a 0 ratio_sync 7 add_c_to_d 0 add_b_to_c 0 add_a_to_b 0 res_clk_div 0 ratio_map 0x00/* output control */ en_par 1 en_p3 1 en_p2 1 en_p1 1 en_p0 1 en_sfs 1 en_rdy 1 en_sck 1 /* outsync */ out_blk_sync 2 rdy_width 0 tag_en 0 inv_sfs 0 inv_rdy 0 inv_sck 0 /* out format */ reverse_iq 0 output_mode 3 real_only 0 master 1 parallel 1 nibble 0 link 0 /* out frame length */ sfs_mode 2 frame_length 0 /* out word size */ block_size 0 bits_per_word 5words_per_frame 0 /* out clock */ output_order 0 nserial 0 sck_rate 0 /* serial port selection */ smux_3 3 smux_2 2 smux_1 1 smux_0 0 /* tags */ tag_ai 0 tag_aq 1 tag_bi 2 tag_bq 3 tag_ci 4 tag_cq 5 tag_di 6 tag_dq 7/* miscellaneous */ en_so 1 en_4_fs 0
Hello,
The GC4016 in wideband downconvert mode uses a CIC in splitIQ mode, CFIR in splitIQ mode, and PFIR in a polyphase mode. In this case, the CFIR decimates by 2, the
CIC decimates by values from 4 to 1024. The two splitIQ channels in a polyphase mode, cause the PFIR to decimate by 1 between the two pairs of splitIQ channels.
This means that the decimation is based on CICdec * cfir_dec = (4 to 1024) * 2 * 1. The decimation range is 8 to 2048 in steps of 2. So decimation of 9, 11, 13, 15 are not
possible in the CIC, CFIR, PFIR structure. The values 8, 10, 12, 14, 16 are all possible.
Under the CIC programming description, the value for CIC is 2N-1 for splitIQ mode, so for a CIC decimation of 4, we put in a value of 7.
dec pgm value, desired CIC decimation, desired wideband decimation
7, 4, 8,
9, 5, 10,
11, 6, 12,
13, 7, 14,
15, 8, 16
When you change these decimations the CIC scaling parameters also need to be recomputed for BIG_SCALE and SCALE. The CFIR coefficients
have both a Low pass filter, and High pass CIC compensation. As you change the CIC decimation, the High pass CIC compensation can be recomputed to
generate a flatter passband response.
I have run the wideband decimations 8, 10, 12, 14, and 16 through the cmd4016 tool.
Regards,
Radio Joe
Hi,
I have attached my configuration for SPLIT I/Q mode configuration file of GC4016. I am trying to run this configuration for decimation rate of 2,6, and 12. It does not work for
decimation rate 6 and 12, but i get some result for 2. I am running the chip in Nibble Mode, with Output Order of 0, and the resampler is bypassed.
Channel Control
Dec :[0:7] = 7
SHIFT = 4
SCALE = 5
BIG_SCALE = 7
MIX20B = 1
Resampler Control Page (Pg 64)
NC = 1
NF = 0
FINAL_SHIFT = 5
ROUND = 1;
Output Control Page (98)
FRAME_LENGTH = 7;
WORDS_PER_FRAME = 7;
BITS_PER_WORD = 0;
BLOCK_SIZE = 2
NSERIAL = 0
OUTPUT_ORDER = 0;
GLOBAL REGISTERS
Address
0
1
2
3
4
5
6
7
f8
cf
f2
PAGED REGISTERS
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
CHA
Pages 0,1
cFIR Coefficents
Pages 2-5
pFIR Coefficents
Page 6
FREQ
Unused
Page 7
0c
44
70
7D
10
1c
e0
8
CHB
Pages 8,9
Pages 10-13
Page 14
40
Page 15
50
CHC
Pages 16,17
Pages 18-21
Page 22
Page 23
CHD
Pages 24,25
Pages 26-29
Page 30
Page 31
RES
Pages 32-63
By Pass Resampler
Page 64
41
0e
15
Page 65
OUT
Page 98
7d
ca
87
43
65
Hello
The GC4016 Wideband Downconvert mode, has a CIC that decimates from 4 - 1024, a CFIR that decimates by 2, and a PFIR that is polyphased to not decimate.
I have attached a decimate by 8 example, that has worked inthe past with the GC4016 tool. The allowable decimations would be 8 - 1024 as the CIC increases from 4 to 512.
In this mode two sets of splitIQ channels are combined.
I have attached the example configuration file, filter taps, and cmd4016 tool. This example is decimation of 8. The general cmd4016 tool is available on the TI website under the GC4016.
REgards,