I have just bought the TSW4100 EVM. I have a network analyser connected up to the input and output of the EVM board. I pass through a sweep from 50Mhz - 200Mhz. I go through the usual setup routine. I load the example2_config.mat file and press configure. My issue is I get only one filter showing not three as per the example. Why is this so. Sometimes I can get 2 filters showing but checking the off box but its seems flakey.
TSW4100Example3_config.mat is the same. I can't get the 4 filters working. I can however get 2 of them showning.
Network analyser: Agilent E5062a
I also have aspectrum analyser AgilentE4404b where I can view the filters also.
I click through the sync delay but no luck there either..
Sometimes I can see the filter showing whilst its calculating and writing to the chip, but once finished, it disappears..
check the switch named SW2 on the board if they all 4 closed
Thanks Ariel for the response. Actually I got them working by playing with the filter params. They do seem quite flaky though. I program the chip with 2 filters lets say and one does not show up. Then I reprogram again without changing anything and I get the 2 filters showing up perfectly. How is that so?
Also sometimes the passbands show up with a notch in the center band hopping up and down (3-10db aprox). Have others seen this also. I have eliminated all sources of noise so this is an artifact of the filter itself.
Finally it takes a long time to design the filters and write them to the chip (40secs per filter). Would it be possible to have, lets say 100 pre-defined filter designs in a program. A user could then press a button up and down on a program, and "move" the filter up and down accordingly?
Is it possible to change the filter BW after its loaded to the chip also or is it required to redesign the filter and load it once again?
Ie, is there a faster way to change the filter params?
Any suggestions would be very helpful.
for the problem of notch in the center band you must adjust the sync delay until the notch dissapears (see picture)
in order to load already designed filters you must save as files: TXfir1.taps, TXfir2.taps, TXfir3.taps, TXfir4.taps, RXfir1.taps, RXfir2.taps, RXfir3.taps & RXfir4.taps created after design on the folder with other names & you can load them after without redesign
you can save sets of files with names you changed & reopen them when you want (seepicture)
The Filter design program determines the Low Pass filter response 0 - Fpass/2, Fstop/2 to PFIR Nyquist frequency. The TSW4100 program determines the decimation CIC, decimation pfir 2, and interpolation pfir 2, and interpolation cic, from this structure the program passes the Low Pass parameters to a filter designer in Matlab.
As Ariel indicated you can save and load different DUC and DDC files, one of the keys is that you have to then SYNC the DUC and DDC.
If you follow the GC5016 IO Application note, for the Baseband interface for DDC output and DUC inputs, Sync delay tuning is not required.
Running the cmd5016 program is quite fast, what takes the longest time is PFIR design. You can design these yourself externally, substitute the PFIR name, run
cmd5016, and save several DDC and DUC files to be uploaded through the USB interface.
Once the PFIR information is downloaded, the chip is synchronized, there is no method to update the PFIR further. The configuration generated by the program only allows the PFIR to be updated once at initialization.
If you save several %BW options, you can reload these prebuilt configurations.
Thanks Joe. We also verified the example on test bench. We swept a tone and monitor the output from a spectrum analyzer. It is pretty clean in pass band.
Thank you for the responses above.
I have 10 filters designed with 10 different bandwidths (BW). I would like to do the following..
Using the load section, load the tap files for one of my filters with for example a BW of 5Mhz. Then press Configure. (this takes 5-10 secs)
Then load a different tap file with, lets say a BW of 10Mhz and press configure. and so on..
This way the user can specify a bandwidth(out of a choice of 10 saved tap files) and a frequency, and have that filter within 5-10 seconds once configure is pressed.
But, I can only succeed in doing this by first designing and loading the filter (which takes about 1 minute) and then once this is done I can change the frequency of the designed filter by loading the saved tap files and changing the freq value. But if I try the load the saved taps straight away it get the error below.
The GC5016 in splitIQ (2channel mode) or not splitIQ (4channel mode) has 16 Multiplier Accumulator cells that can calculate the PFIR computed taps * IQ signal.
In 4 channel mode, the PFIR is used for both I and Q signal. In the splitIQ mode channels AC are I, BD are Q.
The error you have described is due to inputting a filter with more than the calculated number of coefficients.
The PFIR number of taps are printed out in the .anl file, as an example, if the maximum BW is 20Mhz, we will set the IQ rate for the maximum in 4 channel (non splitIQ mode).
There are 3 different configurations allowed
odd/even - odd, taps are symmetric (normal for DDC) -> cicdec2, pfirdec2 -> 160Mhzclock/(cicdec * pfirdec) = IQrate = 40e6, numtaps est = ((16*cicdec*pfirdec)*(sym+1))/(4chanmode+1) - (odd) = 63taps
odd/even - even, taps are symmetric -> 64taps
odd/even - even, taps are non symmetric -> 32 taps
There are some additional restrictions when the pfirdec is >2 (not supported in TSW4100 software), the pfir dec is set to 2. The PFIR interpolation of 2 for 4 channel mode is the only setting that allows for symmetry.
Lets use 20Mhz, 15, 10, 7.5, 5, 2.5 as an example. Normally a PFIR BW between 80 and 25% is desireable
If the CIC ratio, and PFIR ratio are fixed, the number of PFIR taps are fixed. The DDC filter usually defines the channel selectivity. The DUC filter usually defines the Nyquist filtering for interpolation. In some cases, more PFIR taps are used in the DUC with symmetry for more filtering, if a longer latency is OK.
160/4Mhz IQ rate -> CICdec2, PFIRdec2, PFIRint2, CICint2
20Mhz BW, 0 -> 10Mhz, FPass, x -> 20Mhz Fstop, x is adjusted for desired stopband attenuation, 63taps DDC. 64taps DUC(even sym), <=32 taps DUC (no sym for repeater), 50% BW filter
15Mhz BW, 0 -> 7.5Mhz, FPass, x -> 20Mhz Fstop, x is adjusted for desired stopband attenuation, 63taps DDC, <=32 taps DUC (no sym for repeater), 37.5% BW filter
10Mhz BW, 0 -> 5Mhz, FPass, x -> 20Mhz Fstop, x is adjusted for desired stopband attenuation, 63taps DDC, <=32 taps DUC (no sym for repeater), 25% BW filter
160/6Mhz IQ rate -> CICdec3, PFIRdec2, PFIRint2, CICint3
10Mhz BW, 0 -> 5Mhz, FPass, x -> 13.3 Mhz Fstop, x is adjusted for desired stopband attenuation, 95 taps DDC, 96 taps DUC, <=48 taps DUC(no sym for repeater), 37.5%BW
7.5Mhz BW, 0 -> 3.75Mhz, FPass, x -> 13.3 Mhz Fstop, x is adjusted for desired stopband attenuation, 95 taps DDC, 96 taps DUC, <=48 taps DUC(norm for repeater), 28.1%BW
160/8Mhz IQ rate -> CICdec4, PFIRdec2, PFIRint2, CICint4
10Mhz BW, 0 -> 5Mhz, FPass, x -> 10 Mhz Fstop, x is adjusted for desired stopband attenuation, 127 taps DDC, 128 taps DUC, <=64 taps DUC(no sym for repeater), 50%BW
7.5Mhz BW, 0 -> 3.75Mhz, FPass, x -> 10 Mhz Fstop, x is adjusted for desired stopband attenuation, 127 taps DDC, 128 taps DUC, <=64 taps DUC(norm for repeater), 37.5%BW
5Mhz BW, 0 -> 2.5Mhz, FPass, x -> 10 Mhz Fstop, x is adjusted for desired stopband attenuation, 127 taps DDC, 128 taps DUC, <=64 taps DUC(norm for repeater), 25%BW
160/12Mhz IQ rate -> CICdec6, PFIRdec2, PFIRint2, CICint6
7.5Mhz BW, 0 -> 3.75Mhz, FPass, x -> 6.66 Mhz Fstop, x is adjusted for desired stopband attenuation, 191 taps DDC, 192 taps DUC, <=96 taps DUC(norm for repeater), 56.2%BW
5Mhz BW, 0 -> 2.5Mhz, FPass, x -> 6.66 Mhz Fstop, x is adjusted for desired stopband attenuation, 191 taps DDC, 192 taps DUC, <=96 taps DUC(norm for repeater), 37.5%BW
2.5Mhz BW, 0 -> 1.25Mhz, FPass, x -> 6.66 Mhz Fstop, x is adjusted for desired stopband attenuation, 191 taps DDC, 192 taps DUC, <=96 taps DUC(norm for repeater), 18.75%BW
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