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GC5337 startup error

Other Parts Discussed in Thread: OMAPL138

Hi,

      We made our GC5330 custom board. We are able to boot up our OMAPL138. Now we are trying to program the GC5337. The following is the procedure how we are trying to program the gc and the corresponding error we are getting:

# ./gc5330hostapp
GC Host Control. Version 0.10 build 171 (build time: May 21 2012 12:12:14)
Copyright 2010 Texas Instruments
Type "help" for help
$set x.json
Setting up from <x.json>:
Get DPD_GCNUM_MAP
Get DPD_CBSETUP
Get DPD_IBPM_GT
Get DPD_IBPM_GT_ONESHOT
Get DPD_RAPM_SETUP
Get DPD_BBPM_SETUP
Get DPD_SPCFG 0
Done
$dspload dpd-RevD.bin
Load section 0xC1094400, size 0x200
Load section 0xC108BFA0, size 0x6D60
Load section 0xC1000000, size 0x8BFA0
Load section 0xC1093CC0, size 0x5A0
Load section 0xC1092D00, size 0xFC0
Load section 0x1181EEA0, size 0x200
Load section 0x1181F454, size 0x30
Load section 0x1181F3C8, size 0x50
Load section 0xC12B3698, size 0xC
Load section 0xC12AE7F0, size 0x3E3C
Load section 0xC12B3BB4, size 0x2A8
Load section 0xC12B3FE0, size 0x4C
Load section 0xC12B36A4, size 0xC
Load section 0xC12A6BB0, size 0x7C3C
Load section 0xC12AE7EC, size 0x4
Load section 0x11800000, size 0x20
Load section 0x11813400, size 0xAF24
Launch application
DSP ready
Issue DPD_GCNUM_MAP write
Total errors for the command: 1
_____________________________
1.008: L1 E=53 at 16
sDPD_GCNUM_MAP_WR failed.
GC NUM MAP API Failed.
$gcload gc.tgtcfg 1
Loading <gc.tgtcfg> on chip 1
######Total 64869 registers read.
Issue DPD_TGTCFG write.
Total errors for the command: 1
_____________________________
14.077: L1 E=20 at 1
sDPD_TGTCFG_WR failed with status -1.
Load GC configuration error!$

We are giving the DPDCLK(307.2MHz), GC_RESET(0 to 1), EMIFENA(1) and SYNCA (1 to 0) from FPGA.. Please tell us why  these errors are coming?

Regrds,

Gourab

Research Engineer

Satellite and Wireless

Centre for Development of Telematics

  • The GC533x, GC6016 family requires the e-fuse initialization before writing to the registers of the device.

    You need to call this function and successfully pass efuse init, then write the registers.

     

    Device power OK

    Device Reset asserted and released

    JTAG is in reset

    perform efuse initialization

    write register programming to device

    insure BBClock, BBFrame, DPDClock, and SyncA are active

    Synchronize device.

    Resynchronize DAC

     

    REgards,

    Radio Joe