# tsin_r0_v1p1 # Generate an output sin wave while ignoring the input # 0.063298 Fs #0.071111 Fs # 0.129704 Fs # 0.137781 Fs # for transmit # presumes four separate real outputs at 1x # print table print sim print analysis print gc101 print debug mode ab transmit mode cd transmit fck 100 channel 0 tout_cmplx 0 tout_nsig 4 # 0 half rate cmplx, 1 normal, 2 2x tout_rate 1 # res 0 normal 1 wide 2 differential tout_res 0 tout_sumin 0 # differential coded together with res # cksum adds send in DC tx_pat_gen 2 gen_timer_sync 0 gen_timer 4095 #fir_sync_cnt #fir_en_sync cksum_sync_back 5 cksum_sync_front 5 rinf_zpad_sync 7 toutf_hold_sync 7 tinf_src 0 cic_sync 5 nco_sync 5 dith_sync 5 fir_sync 5 soB_sync 5 sck_sync 5 phase_sync 7 freq_sync 7 pwr_mtr_sync 7 # changed from pwr_sync gain_sync 7 coef_sync 7 freq_msb 0x1034 freq_mid 0x5000 # 0.063298 Fs cic_int 8 bits 16 pins 16 tinf_cmplx 1 fir_int 4 fir_coef tck100.taps tinf_fs_dly 1 channel 1 copy_channel 0 freq_msb 0x1234 freq_mid 0x5000 #0.071111 Fs channel 2 copy_channel 0 freq_msb 0x2134 freq_mid 0x5000 # 0.129704 Fs channel 3 copy_channel 0 freq_msb 0x2345 freq_mid 0xa000 # 0.137781 Fs
Hello,
I have succeed to get the output of four channels by using the output test configurations 'tsin_r0_v1p1'. But when I changed the value of fck (100->160), and used the cmd5016 tool to get the values of all registers. I found that the values of all registers had not change at all.
Also I found some warings in the .anl file: Both freq and fre_msb are set; Using freq_msb setting;
but in the 'tsin_r0_v1p1'., I could not find the setting of freq.
Here is my questions:
1、where does the freq be set in the tsin_r0_v1p1?
2、In the file ,there are '# 0.063298 Fs #0.071111 Fs # 0.129704 Fs # 0.137781 Fs', what does the Fs mean here?? fck or freq??
3、why does the registers' value keep the same when I change the value of fck??
Regards,
nil