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I am developing a new SOC in which different different voltage rails are there.
How do i select the decoupling capacitor for my new SoC development.
The voltage rails mentioned is as below in my application:
Are you using the FDC sensing devices in your SoC? You may have posted in the wrong forum - if you can give me more details about your SoC and/or application, I can move the thread to the correct forum.
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In reply to Rachel Liao:
Thanks for the reply.
We don't have any FDC sensing device.This SOC is basically meant for Digital interface and for RF application.
So i am not aware of how and what value of de-caps should i consider for the voltage rail as it is a new development for me.
In reply to Nitesh Kumar74:
I will move your thread to the RF & Digital Radio forum. They may be able to better help you there.
In the Digital Radio section, Graychip devices, there is typically decoupling based on Core Logic, IO Logic, and peripheral sections.
In the case of the Core Logic there are 3 stages of bypass capacitors, .01uf, .1 or .22uf, and 10 or 22uf. In the IO Logic and peripherals it depends on the speed of the peripheral, but there is usually .1 and 10 or 22 uf. The GC5330/GC6016 EVM has discrete data converters with LVDS transport.
The digital radio either contains an SOC, and an outboard DSP (GC5330 family) with discrete data converters, or TCI6630K2L/66Ak2L06 integrated DSP/ARM, digital radio, and JESD 204B connections to the JESD - ADC/DAC.
You can look at the TCI6630K2L EVM for bypass capacitors for the SOC, and look at the RF in the DAC38J84, and ADC32RF80 EVMs. This example uses the JESD204B serdes data transport.
In reply to Radio-Joe:
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