TRF372017: Power Save Exit Issue

Part Number: TRF372017


I have a design with the TRF372017 and things are going pretty well thus far. The design uses the power save input pin to control the RF output when the transmitter side of things needs to be off. Nine times out of 10 the device returns from the reduced power mode just fine. On that tenth time, the device returns but it has additional spurs and increased phase noise on the LO. If I re-write register 2 and enable a calibration, the spurs go away and the phase noise returns to normal. Can you help me understand what is going on with the PS input and why this is happening.



2 Replies

  • Hi David,

    I will look into this.



  • I tried replicating the issue on an EVM, but didn't see any PFD spurs or an increase in phase noise when repeatedly waking the device from power save mode. The fact that you need to re-write to a register and enable a calibration to fix the issue, tells me that your PLL may be unlocking at some point. When in power save mode, the PLL block should remain powered, so I think there may be more to this than just the PS input.

    Are you turning it on and off rapidly or is something else being written at the same time that could cause the PLL to unlock?