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LM2531 failure to detect lock

Timothy Starr
Expert 2445 points
Other Parts Discussed in Thread: CODELOADER

 Hello-

We're using an LMX2531LQ1742 to synthesize 904MHz. The reference input frequency (OSCin) is 49.156MHz. According to the LM2531 datasheet (see paragraph 2.7.8), XTLSEL should be set to 1. But when writing 1 to XTLSEL, the Lock Detect output (Ftest/LD) is low and intermittently high, even though the VCO is locked. When writing a 2 or 3 to XTLSEL, the Ftest/LD pin is a solid and steady high, and the VCO stays locked.

What is the recommended setting? Why does the status bit toggle when set per the data sheet? Thanks and Best Regards,

-Tim Starr on behalf of HD@CS

  • 0
    TI__Mastermind 27581 points

    Tim,

    What I think is happening is that the calibration is finding a VCO band that works, but is not as optimally centered as it could be.  Perhaps you are using a higher phase detector frequency and modulator order, which makes it harder for the digital lock detect.  I would recommend using the manual mode for a more optimal calibration that better centers the charge pump voltage as follows:

    XTLMAN2 = 1

    XTLDIV = 3

    XTLMAN = 16*49.152/2.5 = 315

    XTLSEL = 4

    In addition to this, if you are running a higher order modulator or higher phase detector frequency, this makes it harder for the digital lock detect.  For diagnostic purposes, you might try reducing the modulator order to see the impact.  Also, for this device, if you are not using the highest charge pump gain, consider increasing this and decreasing the phase detector freuquency.  The higher charge pump gain has a large impact on the phase noise.   The National Clock Design Tool at http://www.national.com/en/clock_timing/codeloader.html simulates phase noise and fractional spurs.

    Regards,


    Dean

  • 0 in reply to Dean Banerjee

    Hello, President!
         I use LM2531LQ1910 chips. Output frequency is 942MHz. OSCIN input frequency: 26MHz. VCO can be locked, but the lock detect output (Ftest / LD) is always low. I ask whether it is configured wrong, my all registers are configured as follows:

        R0:0x216300
        R1:0x2E6A41
        R2:0x5D4042
        R3:0xCDF193
        R4:0x3C0004
        R5_1:0x840005
        R5_2:0x800005
        R5_3:0x8007F5
        R6:0x6
        R7:0x7
        R8:0x28008
        R9:0xBA9
        R10:0
        R11:0
        R12:0x1048C