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TRF372017 output spectrum

Other Parts Discussed in Thread: TRF372017, TRF3765

Dear,

we curently test TI board TRF372017 EVM for low bitrate (100kb / OQPSK) application.

BB 1uF decoupling capacitor were replaced by strap. Common mode voltage (1.7V) is generated by a pair of differential amplifier. Input level is 100mVrms single ended.

We notice 2 strange behaviors :

  •  For I and Q in quadrature/sinus, carrier frequency set to 2400MHz, a parasitic signal appear at Flo-2xFbb and magnitude decrease with increasing BB frequency : (34dBc at Fbb=400kHz  /  45dBc at Fbb=1200kHz).

If we decrease BB signal magnitude by 2 (6dB), Flo-Fbb signal is reduce by 6dB and Flo-2xFbb is also reduced by 6dB : doesn't seems to be a distortion.

//// addition on february 13th:

We fine adjust phase between I and Q branch to -1°. Side band was suppressed by 50dB.

No changes were observe on signal Flo-2xFbb

////

  •  For output carrier frequency set to 2399.999MHz (purple trace), very low level noticed at Flo-2xFbb relative to carrier frequency set to exactly 2400.000MHz (green trace) :

Any idea about this two behaviors?

Last question about datasheet content : what is input BB level and frequency for Carrier Feedthrough and Sideband suppression specifications?

Thanks!

//// addition on february 14th:

We put TRF372017 in LO mode : power up output buffer and TX_DIV then connect spectrum analyzer at LO_OUT signal.

For low frequency on I/Q inputs, around 30kHz, we saw a very clean signal at carrier frequency (2400.000MHz) along with two sidebands at 10dBc ...

These two sidebands were suppressed when power down frequency divider in modulator chain (PWD_TX_DIV). Anyone can tell us how can we overcome this drawback?

Original PLL loop filter have been modified in order to use fractional mode PLL, with a loop bandwidth of 70kHz.

////

  • 2400MHz is the point at which the TRF372017 switches the VCO divide. At 2400MHz, the GUI sets fVCO = 2400MHz and TX_DIV_SEL = LO_DIV_SEL = /1. At 1200MHz <= fLO < 2400MHz, the GUI sets fVCO = 2*fLO and TX_DIV_SEL = LO_DIV_SEL = /2. This is why the behavior is distinctly different under the two conditions described.

    In the /1 scenario, there are tones at fLO (carrier), fLO - fBB (desired), fLO + fBB (sideband), and also at fLO - 2 * fBB (the tone under discussion). The tone moves 1-1 with fLO and 2-1 with fBB. It also moves 2-1 in amplitude with BB amplitude according to TI measurements, not 1-1 as described in the initial discussion. That is, reduction of 5dB in baseband yields a reduction of 10dB in the fLO-2fBB tone. It would be useful to verify the amplitude tracking on the user's setup.

    Injecting an external LO instead of using the internally-generated LO eliminates the fLO-2fBB tone.

    This tone appears to be a 2nd order tone involving a signal that is leaking into the synthesizer.

    Its decreasing magnitude as fBB increases seems to be a response of the leakage path. Supply decoupling near fBB might be able to mitigate the leakage, particularly if an experiment that lifts PLL supply components and brings in fully-isolated external supply decreases the extraneous tone.

  • If the LO sidebands noted at 10dBc are offset by fBB, then these may also be an artifact of leakage into the synthesizer. Although fractional spurs do not reach 10dBc levels, be careful to not contaminate measurements by creating any fractional spur at the noted offset.

     

  • Carrier and sideband measurements were made under the conditions used to generate the charts: 300mVrms se.

  • Dear,

    programmed frequency is exactly 2400.000MHz. With a 40MHz xtal osc, we don't think that we would found spurs.

    For other frequency we must be watchful...

    Many thanks for this real brightening. We had to make further measurements.

    Best regards.

  • Try fLO exactly at 2400MHz. But instead of fVCO = 2400MHz, use fVCO = 4800MHz and LO_DIV_SEL = /2. This is also a valid setting. The extraneous spur will disappear.

    The easiest way to get this setup using the GUI is to set the target to 4800MHz and then manually change the LO_DIV_SEL field.

  • Dear,

    thank you for answer.

    In fact, we had to span up to 2550MHz. Do you think that VCO can tune up to 5100MHz, and over temperature range?

    Refer to fig.63 in TRF3765 datasheet, upper limit would be 4950MHz. (fixed Vtune=1V ??)

    Best regards

  • Dear,

    have found answer in older post "TRF3765 Maximum frequency in typical process & conditions" :

    http://e2e.ti.com/support/rf__digital_radio/high_performance_rf_modulators_pll_and_vco_products/f/224/t/219816.aspx

    best regards.