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TRF372017 MAXIMUM FREQUENCY DIGITAL DIVIDER AND RECOMMENDED VALUES

Other Parts Discussed in Thread: TRF372017

Q1: Maximum freq frequency divider?

Following the datasheet :"Verify that the frequency into the digital divider, fN, is less than or equal to 375 MHz."

But the eval software (TRF3720.vi) shows the warning "Digital counter frequency of 441MHz exceeds 350MHz max"

Q2: Register recommended values?

Following the datasheet :Recommended value for VCO_AMP_CTRL=11

Following the register setting guide :Recommended value for VCO_AMP_CTRL=00

Thanks

  • A1: 375MHz is the correct limit, as stated in the datasheet. Rev. 2.6 GUI software incorrectly sets a limit at 350MHz. TRF372017 GUI Rev. 2.7 is being posted on ti.com and should be available within 24 hours. An update will be posted here if the update gets delayed.

    A2: The datasheet recommended value of VCO_AMP_CTRL=11 is the preferred setting. This value has been in place since RTM of the device. There was a register trim guide created during development which listed the smaller value, but it has been supplanted by the published datasheet.

     

  • Thank you for the fast reply! I will wait for the new release and use the 11 recommended value.

    Other question.

    I cannot run the Loop Filter Calculator v1.3.0 for windows 7. It breaks anytime I click  "Calculate" 

    I have pasted below the details of the error and I have enclosed a a screenshot where it can be seen that the capacitor values are calculated but there is no plots .

    Please,could you provide values for the TRF3720 in Fractional mode and a phase detector freq of 10Mhz?  To have some values to mount while the tool filter is not fixed.

    ---------------------------------------------------------------------------------------------------------------------------------------------------------

    See the end of this message for details on invoking
    just-in-time (JIT) debugging instead of this dialog box.

    ************** Exception Text **************
    System.ArgumentException: Please enter a valid integer number (-2147483648 to 2147483647) ---> System.FormatException: Additional non-parsable characters are at the end of the string.
    at System.ParseNumbers.StringToInt(String s, Int32 radix, Int32 flags, Int32* currPos)
    at System.Convert.ToInt32(String value, Int32 fromBase)
    at loopback_filter_calculator.Loop_Filter_Calculator.string_to_number(String sb, Double& number)
    --- End of inner exception stack trace ---
    at loopback_filter_calculator.Loop_Filter_Calculator.string_to_number(String sb, Double& number)
    at loopback_filter_calculator.Loop_Filter_Calculator.btn_rev_plot_Click(Object sender, EventArgs e)
    at loopback_filter_calculator.Loop_Filter_Calculator.btn_calc_Click(Object sender, EventArgs e)
    at System.Windows.Forms.Button.OnMouseUp(MouseEventArgs mevent)
    at System.Windows.Forms.Control.WmMouseUp(Message& m, MouseButtons button, Int32 clicks)
    at System.Windows.Forms.Control.WndProc(Message& m)
    at System.Windows.Forms.ButtonBase.WndProc(Message& m)
    at System.Windows.Forms.Button.WndProc(Message& m)
    at System.Windows.Forms.NativeWindow.Callback(IntPtr hWnd, Int32 msg, IntPtr wparam, IntPtr lparam)


    ************** Loaded Assemblies **************
    mscorlib
    Assembly Version: 4.0.0.0
    Win32 Version: 4.0.30319.18444 built by: FX451RTMGDR
    CodeBase: file:///C:/Windows/Microsoft.NET/Framework64/v4.0.30319/mscorlib.dll
    ----------------------------------------
    loop_filter_calculator
    Assembly Version: 1.0.0.0

  • And another set of values for freq of 20Mhz?  Thank you

  • We have not been able to reproduce your error message. Please be certain that you are running the correct version for your OS. Also, try setting the Windows number format to US format.

    Note that with an FRef = 10MHz and R = 2, FPFD = 10 / 2 = 5MHz. Either set FRef = 20MHz or R = 1.

    Screen shots are included to clarify communications and provide results for the immediate term.

     

  • Hello,

    Thanks again for given an answer in such a short time. 

    The problem is with the format number, changing it to US type it works.

    The screenshot I sent is not my current configuration, just an example to show the error. Now I can calculate the values since the application is working.

    Regards,

  • Hello,

    I have a question about the prescaler settings calculated by the TRF3720.vi.

    In the attached file you can see a setting calculated by the software where the frequency into the digital divider,  fN, is 400MHz which would exceed the maximum of 375MHz.  Following the datasheet there is no reason why the 8/9 preescaler cannot be used in this configuration. However the using the 8/9 gives an error in the TRF3720.vi and if we program the TRF with that value it does not lock. 

    BTW, could we have access to the TRF3720 source code?

    Thank you

     .

  • Hello,

    Anybody got the question? Or should I post it in a new thread?

    Thank you

  • Hi,

    The Fn in your case is Fvco/Pll-div_sel/P, which is 3200/4/4 = 200MHz. The PLL-div_sel is set to 4, and P is set to 4 due to the 4/5 fractional divider. If P is set to 8 due to the 8/9 fractional divider, the Fn is at 100MHz, which is still less than 375MHz limitation. 

    The use of 4/5 fractional divider or the 8/9 fractional divider depends on the NINT value, which is set by the guidelines suggested by equation 5 in page 43 of datasheet. Since NINT is less than 75 now, the 4/5 fractional divider is used. In order to use 8/9 fractional divider, the NINT must be increased. One way to increase NINT is to decrease the PFD frequency of 40MHz to lower values. Note your step size will be lowered as well. 

    I believe the current issue of PLL not being locked when 8/9 divider is used is due to the NINT value is much lower than the 75 requirement. The 4/5 fractional divider requires NINT between 23 and 75, so it is possible that it is working marginally with 4/5 divider. We are looking into the limitations of lower bound of 23 and will get back to you on a recommendation. 

    -Kang

  • Hi,

    Yes, you are right both 4/5 and 8/9 are under the 375Mhz for this configuration. So, following the datasheet the lower one should be choosen. I wait for the results on the 23 threshold.

    Thank you

  • Hello,

    Following the device datasheet page 41 

    "In Fractional mode, the feedback divider fractional portion is non-zero on average. With 25-bit fractional
    resolution, RF stepsize fPFD/225 is less than 1 Hz with a fPFD up to 33 MHz. The appropriate fractional control bits
    in the serial register must be programmed."

    But the TRF3720.vi shows that the resolution step for a 20Mhz PFD is  2.38419E-6, see attached image. Is that a bug in the software?

    Thank you