Good day.
The question TRF3722.
How to get a TDD mode via Spi interface or through pin PD?
What is the minimum switching time in TDD TX?
Thank you
Hi Alexey,
The PD pin or the SPI interface can be used to control the powerdown modes of the device. The SPI interface powerdown mode occurs on the rising edge of the LE signal after writing the register, so it can be preloaded with the power down mode and activating by raising LE at the required time.
In terms of timing, both SPI and the PD pin are the same if the TX_DIV, MOD, and LO_DIV are all powered down. The speed up bit greatly decreases the power up time for both SPI and PD pin. The powerup time can be improved if only the modulator is powered down through SPI. See below screenshots for measurements.
The minimum toggling time is limited by the power down time and power up time for the mode used. SPI will increase the minimum toggling time due to the longer writes.
Power down (both modes, TX_DIV, MOD, LO_DIV powered down): ~ 2.92 ns
Power up without speedup (both modes, TX_DIV, MOD, LO_DIV powered down): ~ 300 us
Power up with speedup (both modes, TX_DIV, MOD, LO_DIV powered down): ~ 3.15 us
Power up with speed up (Only MOD powered down through SPI): ~176 ns
Regards,
Matt Guibord
