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Related Posts
  • Forum Post: Re: Filter Design for GC5016

    Radio-Joe Radio-Joe
    Hello, The Texas Instruments DDCs, can have 1, 2, or 3 stages of decimating filters. Please review the following items, and if I have guessed incorrectly tell me your system configuration: DDC part# - [GC5016] mode of operation - (splitIQ or 4 channel) - minimum decimation for 4 channel ->...
    on Nov 27, 2010
  • Forum Post: Re: Filter Design for GC5016

    ahsan tanvir ahsan tanvir
    Hellow ! all thanks to Radio-Joe for previous guidance , i have configured my ddc gc5016 with bypassing cic and cfir filter using bypasscic 1 , Now my problem is that i have configured my NCO which is working fine with no cic or cfir filtering or decimation. my problem is that when i interoduce...
    on Dec 28, 2010
  • Forum Post: Re: Filter Design for GC5016

    ahsan tanvir ahsan tanvir
    Dear Radio Joe, In my case ADC sampling frequency is 43.2 MHz input data is real and output data is real decimation required is minimum my issue is that when i use Test My NCO using sine wave of 14 MHZ and i down convert it to 4MHZ as my ddc NCO is tuned at 10MHZ , in this case i bypass cic and bypass...
    on Dec 29, 2010
  • Forum Post: Re: Filter Design for GC5016

    ahsan tanvir ahsan tanvir
    Hellow, thanks alot Radio-Joe for good suggestions, i had to develop a test scenario for varification of my configuration on GC5016 DDC , well here is test scenario: i give sinoside signal at input and visualize the output, as i am using Innovative DR Board so i see output of GC5016 on scnap application...
    on Jan 3, 2011
  • Forum Post: Re: Filter Design for GC5016

    ahsan tanvir ahsan tanvir
    Regards Hellow, thanks alot Radio-Joe for good suggestions, i had to develop a test scenario for varification of my configuration on GC5016 DDC , well here is test scenario: i give sinoside signal at input and visualize the output, as i am using Innovative DR Board so i see output of GC5016...
    on Jan 3, 2011
  • Forum Post: Can filtering be achieved when avoiding decimation in DDC GC5016?

    ahsan tanvir ahsan tanvir
    Hellow! i am using DDC GC5016 I am in SplitIQ mode i.e 1 as i set cic_dec=1 not using cic decimation and i set fir_dec=2 and i achieve fs/2 at output Question is that can i set cic_dec=1 and fir_dec=1 and still achieve Lowpass filtering operation from my FIR filter by fiving coefficients file...
    on Jan 28, 2011
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