Hi TI team,
Are there any distinct recomendations concerning the distance between two coils in a stacked configuration like in LDC0851 applications?
I need criteria to choose the PCB thickness or just a gap between the two stacked coils.
More separation is better. The reason why is because when the LDC0851 compares the inductance between sense and reference an incoming metal that produces a large inductance difference between the two coils gives the most margin in the design. For a stacked coil arrangement, both of the coils sense incoming metal, therefore the difference in inductance is not as large as if one of the coils was placed far away from the metal. Having a close separation would have the effect of reducing sensing range for proximity applications or reducing margin for event counting/inductance comparison.
By increasing the separation, it looks more like a side-by-side coil arrangement which would have the effect of increasing sensing range and adding more margin to the design.
So as a general rule of thumb, more is better. We've used 36mil separation on the coil EVM, but most separation possible is ideal.
Regards,Luke LaPointeSSP Appilcations
Please share your observation when you tried for the more distance between the two coils.i.e. Sense coil & reference coil
i am planning for keeping 2.4mm of the distance between mid1 & mid2 layers.
In reply to seema joshi:
In reply to Igor Gorbounov:
In reply to Luke LaPointe:
You are right! With the 1 mm to 2.4 mm lamination width change between reference & sense coil effectively increased the proximity from 3.8 mm to 7 mm .i.e. 3.2 mm.
As per requirement this coil & interface( LDC0851 chip board ) is needed to be inside the metal encapsulation.When we engage the coil & interface in the encapsulation & do the proximity check the sensing distance reduces reached to 4.85 mm instead of 7 mm.
We can not predict reason for the phenomenon.Please guide how to overcome the effect due to metal encapsulation .
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