• State TI Thinks Resolved
  • Locked Locked
  • Replies 3 replies
  • Answers 1 answer
  • Subscribers 32 subscribers
  • Views 675 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

LDC1000 reset behaviour

Peter Verheij
Prodigy 140 points

The LDC1000 has no reset pin ,but there is some internal reset circuit anyhow.

I noticed that below 3.6V all SPI registers read as zeroes (0x00)

I noticed too that above 3.8V , the SPI reports nothing special , it all seems to work.

I noticed also some grey zone somewhere between 3.6 and 3.8V where all SPI registers report 1's (0xFF)

Now my question is :

What exactly is the internal behaviour ?

What happens when the VccA is below 4.75V , and yet above the reset treshold? Should we have an extra power supply monitoring in order to get dependable results from the LDC1000?

As we work with an STM8 CPU there is only a brownout detection at 2.7V, the LDC1000 is already permanent in the reset state by then.

  • 0
    TI__Intellectual 1690 points
    Hello Peter,
    The recommeded Analog Supply voltage for LDC1000 is 4.75 V to 5.25 V. The behaviour of the device outside this voltage range cannot be guaranteed.
    We recommed you operate the device within the specified voltage range to get the best performance.
    -Best Regards, Suhas R C
  • 0 in reply to Suhas Raja Chandragupta55
    Prodigy 140 points

    Thanks for the answer, but this doesnot help me with my question.

    I know, that I should not get beyond the supply voltage specs in order to get a good working chip.

    I will have to implement a voltage monitoring feature in my product, in order to get reliable results.

  • 0 in reply to Peter Verheij
    TI__Genius 14270 points

    Hi Peter.


    Yes, if you are not able to maintain VDD to within the specified limits, then you may want to monitor the voltage of VDD.

    I suppose if you have an analog ADC input you can use a resistive divider from the analog VCC to ground to generate a voltage proportional to the analog supply voltage and then periodically digitize the voltage. Or perhaps use an external comparator, connect the output of the comparator to a GPIO and generate an interrupt when the comparator indicates a brownout has occurred.

    Regards,

    ChrisO