Hello,
I am trying to program LabVIEW FPGA to communicate with LDC1101 via SPI.
To get the INTB signal, I plan to make CSB asserted (pulled down) by default and deassert it for a short period of time after finishing SPI transaction.
That is, CSB remains low for most of time and becomes high when each SPI transaction is done for couple ticks.
I am curious if there is a minimum tick counts for CSB deassertion, which gives enough time for LDC1101 to update its register value.
Thanks!
MInkyun
