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[LDC1314][DRDY]

Other Parts Discussed in Thread: LDC1314

Hi, All.

This is Masaharu Takahashi.

i'd like to ask you that LDC1314's DRDY.

its D/S indicates as below

I want to confirm that b0 meaning.

Q1. b0 indicates whether LDC1314 finished to take a measurement or not. right ?

(Can customer know LDC1314 finish to take a data using any register (ex:status register))

it means that we'll be able to know whether LDC1314 finishes to take a measurement or not by b0 of DRDY.

on top of that,

LDC1314 has INTB pin for indicating any error status.

Q2.no matter how LDC1314 finishes to take a measurement , INTB pin won't be indicated right ?

  • Hello Takahashi-san,

    The LDC conversion time is deterministic and can be calculated as shown in section 7.3.2. When the device is in single channel continuous conversion mode, which is set by MUX_CONFIG.AUTOSCAN_EN = 0, data ready will occur upon the completion of each conversion.

     When the device is in sequential mode, which is set by MUX_CONFIG.AUTOSCAN_EN = 1, the data ready will occur on completion of the last conversion in a sequence. For example, if MUX_CONFIG.RR_SEQUENCE=0, then data ready will occur when both Channel 0 and Channel 1 conversions are complete.

     Data ready is reported:

    • in the STATUS.DRDY field if ERROR_CONFIG.DRDY_2INT is set to b1
    • by asserting the INTB pin if ERROR_CONFIG.DRDY_2INT is set to b1

     Note that the deterministic conversion time also allows data polling at a fixed interval instead of using DRDY.

    Here is more information on INTB:

    Reporting errors and status on the INTB pin

    Error and status registers can trigger an interrupt on the INTB pin. The following conditions must be met:

    1. The error or status register must be unmasked by enabling the appropriate register bit in the ERROR_CONFIG register
    2. The INTB function must be enabled by setting CONFIG.INTB_DIS to 0

     

    This reporting method supports the following functions:

    • Under-range errors
    • Over-range errors
    • Watchdog timeout errors
    • Amplitude high errors
    • Amplitude low errors
    • Zero count errors
    • Data ready (DRDY)

     

    Interrupts are cleared by the following events:

    1. Entering Sleep Mode
    2. Power-on reset (POR)
    3. Device enters Shutdown Mode (SD is asserted)
    4. S/W reset
    5. I2C read of the STATUS register: Reading the STATUS register will clear any error status bit set in STATUS along with the ERR_CHAN field and de-assert INTB

     

    Setting register CONFIG.INTB_DIS to b1 disables the INTB function and holds the INTB pin high.

  • hi, Ben san.

    thanks your support us always.

  • Hello Ben,

    so if I'm sensing all four channels, STATUS.DRDY = 1 would be identical to all STATUS.CHx_UNREADCONV = 1 ?
    Therefore it would be more reasonable to check the DRDY bit, as long as it's not time-critical to read the results of CH0 while measurement on CH1 isn't already finished?

    Thanks and best regards,
    Andreas H

    Edit: I was wondering if there is C code available, how to do I2C communication with the LDC best, I only found SPI examples and EVM firmware in HEX format? Thanks!

  • Hello Andreas,
    the firmware source code is available; it is installed into the GUI directory (eg. C:\ti\Sensing Solutions EVM GUI-1.8.8\EVM Firmware).

    Here is more information on DRDY and UNREADCONV:

    Data Ready Reporting
    The LDC reports when a conversion has completed and the conversion result is available and can be read from the DATA_CHx registers.
    When the device is in single-channel continuous conversion mode, which is set by MUX_CONFIG.AUTOSCAN_EN = 0, data ready will occur upon the completion of each conversion.
    When the device is in multi-channel (sequential) mode, which is set by MUX_CONFIG.AUTOSCAN_EN =1, the data ready will occur on completion of the last conversion in a sequence. For example, if MUX_CONFIG.RR_SEQUENCE=0, then data ready will occur when both Channel 0 and Channel 1 conversions are complete.
    Data ready is reported:
    • in the STATUS.DRDY field if ERROR_CONFIG.DRDY_2INT is set to b1.
    • by asserting the INTB pin if ERROR_CONFIG.DRDY_2INT is set to b1.

    Note that the deterministic conversion time also allows data polling at a fixed interval instead of using DRDY. It can be calculated as shown in section 'Multi-Channel and Single Channel Operation'' in the LDC161x datasheet and the LDC131x datasheet

    Unread conversion
    The status register bit STATUS.CHx_UNREADCONV shows when a conversion has occurred on a particular channel that has not been read yet. The register is cleared when either DATAx or the STATUS register is read.
    In multi-channel mode, this register can be used to identify a completed conversion result on a particular channel without having to wait until the last conversion in the sequence is complete.
  • Hello Ben,

    thank you very much for those informations!

    Best regards,

    Andreas H