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LDC1612: Synchronizing conversions

Part Number: LDC1612
Other Parts Discussed in Thread: LDC1101, CDCE913

Is there a way to synchronize the LDC conversion cycle to a host-supplied signal?  Only way I could think of is by gating the reference clock, but I'm not sure whether the LDC likes that.

Alternatively, could a configuration register write be used as a synchronization event? For example, is the delay from clearing the SLEEP_MODE_EN bit to the start of the first conversion cycle deterministic?

Thanks!

  • Hi Matthias,

    The LDC161x devices, it is not really feasible to gate the clock, as the device has internal watchdog timers which will generate errors.

    You can gate the clock for the LDC1101 to control sampling windows; however you need to ensure that the exact number of clock pulses are sent. Note that the LDC1101 will still be converting RP for that time interval.

    What are your system requirements (including sample rate and timing accuracy) that you need to achieve?

    Regards,

    ChrisO
  • Timing accuracy must be <62.5µs.  Sample rate is going to be in the 0.5kS/s to 2kS/s range.

  • Hi Matthias,

    Do you need to configure a one-shot measurement or a sequence of measurement?s If you need to do a 1 shot, then there is no real clean method for that.

    The timing for the LDC is deterministic if the external oscillator frequency is provided by the MCU. If the MCU cannot provide a 40MHz frequency, then consider a PLL like the CDCE913. In this way, the MCU timebase will be aligned with the LDC conversion rate.

    For exiting sleep mode, the timing is controlled by the internal oscillator - it takes 16384 cycles on the internal clock to begin conversion after issuing the I2C command to wake up. You can measure the internal oscillator frequency by performing 2 conversions with a fixed sensor:
    first with the internal oscillator and a second with an external oscillator.

    Regards,
    ChrisO