AWR1642: FPD-LINK solution for AWR1642+DM8127

Hello,
Typically a serializer and deserializer parts use a similar interface at both ends, ie CSI at the input side and output side. But for more details I would suggest you put the query on the high speed interface forum : e2e.ti.com/.../138

Regards,
Vivek

Hi Vivek,

May I know the output LVDS of AWR1642 is 24 bits or 16 bits?
Because the ADC in AWR1642 is 10 bits.

B.R.
OC

Hello OC,
The AWR1642 device can be configured for 12/14/16 bits ADC mode. The width is followed on the LVDS lanes.

Regards,
Vivek

Hi Vivek,

So, I could modify CFG_DATA_LL0 register to change the LVDS output format, right?

B.R.

OC

Hello OC,
The "rlAdcBitFormat_t" structure selects the ADC bit width (12/14/16). You can find the details in the doxygen help files (MMWAVE_SDK_v01.00.00.05\packages\ti\control\mmwavelink\docs\doxygen\html).
The same is value has to be applied in the CFG_LVDS_LL0 register you have mentioned above.

regards,
Vivek

Hi Vivek,

Thanks so much for your confirmation.

B.R.
OC