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Tool/software: TI C/C++ Compiler
Hello TI
We made our ToF board based on your demo-board OPT8241&OPT9221.
My question is: Is it important the sequence of writing bit values to register OPT9221 or not,? (because I can not receive right phase data while calibration process for second frequency )
I know about tg_dis and mod_pll_update, but may be there is something more?
// Initialization sequence for OPT9221 // // RegAddr is (slaveID << 16) + RegisterAddress // Translate internally as needed // OPT9221_RegWrite(RegAddr, RegValue) // // The following sequence will bring up OPT9221 with 4 quads, 4 subframes, 9% integration at 20 fps, 48 MHz modulation frequency, no dealiasing // and with (1280 bytes * 240 lines) DVP output with horizontal blank period of 1280 bytes // OPT9221_RegWrite(0x5880, 0x000001); // tg_dis = 1 OPT9221_RegWrite(0x5C3C, 0x005000); // blk_size = 1280 OPT9221_RegWrite(0x5C3D, 0x005000); // blk_blank_size = 1280 // Configure blk_blank_size as needed by the receiving chip OPT9221_RegWrite(0x5C3F, 0x00000A); // fb_ready_en = 0 OPT9221_RegWrite(0x5882, 0x0249F0); // pix_cnt_max = 150000 OPT9221_RegWrite(0x5C4C, 0x800006); // intg_duty_cycle = 6 OPT9221_RegWrite(0x5880, 0x000000); // tg_dis = 0 // Modulation Frequency settings: default of 48 MHz OPT9221_RegWrite(0x580C, 0x100000); // mod_m1 = 16, mod_m_frac1 = 0 OPT9221_RegWrite(0x580F, 0x00049A); // mod_n1 = 2, mod_ps1 = 1 OPT9221_RegWrite(0x5802, 0x00001C); // mod_pll_update = 1 msleep(10); // 10ms delay - very conservative OPT9221_RegWrite(0x5802, 0x000018); // mod_pll_update = 0 // Optional: Set phy_test_enable to get a deterministic test pattern each frame. // This is useful to test the output interface during bringup // The test pattern in bytes is 0, 0, 1, 2, 3, ..., 254, 255, 0, 1, 2, ... // Note the two leading 0s at the start of the frame OPT9221_RegWrite(0x5C29, 0x304042); // phy_test_enable = 1 // Uncomment the next line to clear it //OPT9221_RegWrite(0x5C29, 0x304040); // phy_test_enable = 0
It is important to write register values to OPT9221. I've attached an example init sequence.
Can you send your init settings?
Suramya
Thank you for your answer!
I have just seen this on forum before.
In attachment you can see fragment of code with writing register values to OPT9221.
/* some code */
localparam WRITE_TO_OPT_TOF_5C = {2'b01, 7'h5C};
localparam WRITE_TO_OPT_TOF_58 = {2'b01, 7'h58};
/* some code */
init_data[161] = WRITE_TO_OPT_TOF_58; //tg_dis = 1
init_data[162] = {1'b1, 8'h80}; //
init_data[163] = {1'b1, 8'b0000_0001}; //
init_data[164] = {1'b1, 8'h00}; //
init_data[165] = {1'b1, 8'h00}; //
init_data[166] = WRITE_TO_OPT_TOF_5C; //
init_data[167] = {1'b1, 8'h3C}; //
init_data[168] = {1'b1, 8'b0000_0000}; // blk_size = 1280 (101 0000 0000) 23:4 bit
init_data[169] = {1'b1, 8'b0101_0000}; //
init_data[170] = {1'b1, 8'b0000_0000}; //
init_data[171] = WRITE_TO_OPT_TOF_5C; //blk_blank_size = 10 .. 1280
init_data[172] = {1'b1, 8'h3D}; //
init_data[173] = {1'b1, 8'hC0}; // hC0
init_data[174] = {1'b1, 8'h01}; // h01
init_data[175] = {1'b1, 8'h00}; // h00
init_data[176] = WRITE_TO_OPT_TOF_5C; //
init_data[177] = {1'b1, 8'h3F}; //
init_data[178] = {1'b1, 8'hFB}; // FRM_BLANK_SIZE = 15 23:4; fb_ready_en = 1 0:0 bit, fb_ready_pol = 1 1:1 bit
init_data[179] = {1'b1, 8'h0}; //
init_data[180] = {1'b1, 8'h0}; //
init_data[181] = WRITE_TO_OPT_TOF_58; //
init_data[182] = {1'b1, 8'h82}; //pix_cnt_max = 133333 (10 0000 1000 1101 0101) 21:0 bit
init_data[183] = {1'b1, 8'b1101_0101}; //
init_data[184] = {1'b1, 8'b0000_1000}; //
init_data[185] = {1'b1, 8'b0000_0010}; //
init_data[186] = WRITE_TO_OPT_TOF_5C; //
init_data[187] = {1'b1, 8'h4C}; //
init_data[188] = {1'b1, 8'h12}; // intg_duty_cycle = `18 (12) 5:0 bit, HDR_SCALE = 0 (0) 6:8 bit
init_data[189] = {1'b1, 8'h00}; //
init_data[190] = {1'b1, 8'b1000_0000}; // STANDBY = false (0) 19:19 bit, STANDBY_PIN_POL = false (0) 20:20, STANDBY_PIN_EN = false (0) 21:21 bit, LUMPED_DEAD_TIME = 0 (0) 22:22 bit, EASY_CONF_EN = true (1) 23:23 bit
init_data[191] = WRITE_TO_OPT_TOF_58; //
init_data[192] = {1'b1, 8'h0c}; // mod_m_frac1 = 0 (0) 15:0 bit, mod_m1 = 20 (10100) 21:16 bit
init_data[193] = {1'b1, 8'h00}; //
init_data[194] = {1'b1, 8'h00}; //
init_data[195] = {1'b1, 8'b0001_0100}; //
init_data[196] = WRITE_TO_OPT_TOF_58; //
init_data[197] = {1'b1, 8'h0d}; // mod_m_frac2 = 0 (0) 15:0 bit, mod_m2 = 15 (1111) 21:16 bit
init_data[198] = {1'b1, 8'h00}; //
init_data[199] = {1'b1, 8'h00}; //
init_data[200] = {1'b1, 8'b0000_1111}; //
init_data[201] = WRITE_TO_OPT_TOF_58; //
init_data[202] = {1'b1, 8'h0f}; // mod_n1 = 2 (10) 1:0 bit, mod_n2 = 2 (10) 3:2 bit,
init_data[203] = {1'b1, 8'b0001_1010}; // mod_ps1 = 1 (1) 6:4 bit, mod_ps2 = 0 (0) 9:7 bit,
init_data[204] = {1'b1, 8'b0000_0100}; //
init_data[205] = {1'b1, 8'h00}; // MODULATION_HOLD = false (0) 18:18 bit, DEMOD_STATIC_POL = false (0) 19:19 bit, ILLUM_STATIC_POL = false (0) 20:20 bit
init_data[206] = WRITE_TO_OPT_TOF_5C; //
init_data[207] = {1'b1, 8'h02}; //
init_data[208] = {1'b1, 8'b0100_0010}; // ka*ma-kb*mb = 1; ka = 2 (10) 3:0 bit
init_data[209] = {1'b1, 8'b0000_1100}; // f1 = 40MHZ, f2 = 60 MHZ, feff = GCD(f1, f2) = 20, mb = f2/feff = 60/20 = 3 (11) 13:10 bit, ma = f1/feff = 40/20 = 2 (10) 8:5 bit
init_data[210] = {1'b1, 8'b1101_0000}; // dealias_en = true (1) 23:23 bit, ind_freq_data_en = true 22:22 bit
init_data[211] = WRITE_TO_OPT_TOF_5C; //
init_data[212] = {1'b1, 8'h03}; //
init_data[213] = {1'b1, 8'b0000_0000}; //
init_data[214] = {1'b1, 8'b0001_1000}; // DEALIASED_PH_MASK = 3 (10) 14:11 bit
init_data[215] = {1'b1, 8'b0001_0000}; // ka*ma-kb*mb = 1; kb = 1 (1) 23:20 bit
init_data[216] = WRITE_TO_OPT_TOF_5C; //
init_data[217] = {1'b1, 8'hb2}; //
init_data[218] = {1'b1, 8'b1010_1010}; // freq_ratio = f1*4096/f2 = 40*4096/60 = 2730.(6) = 2730 (101010101010) 11:0 bit
init_data[219] = {1'b1, 8'b0000_1010}; //
init_data[220] = {1'b1, 8'h00}; //
init_data[221] = WRITE_TO_OPT_TOF_5C; //
init_data[222] = {1'b1, 8'h35}; //diods on
init_data[223] = {1'b1, 8'h00}; //
init_data[224] = {1'b1, 8'h00}; //
init_data[225] = {1'b1, 8'b1110_0000}; // ILLUM_MOD_EARLY = true (1) 22:22 bit, ILLUM_EN_EARLY = true (1) 21:21 bit
init_data[226] = WRITE_TO_OPT_TOF_5C; //
init_data[227] = {1'b1, 8'h39}; //
init_data[228] = {1'b1, 8'b0000_0000}; //op_clk_freq = 0 (0) 2:1 bit, OP_CLK_EDGE = false (0) 5:5 bit
init_data[229] = {1'b1, 8'b0000_0000}; // OP_MODE = 0 (0) 9:8 bit, OP_SERIAL_WIDTH = false (0) 12:10 bit, DEBUG_FRAME_NUMBER_EN = false (0) 12:12 bit
init_data[230] = {1'b1, 8'h00}; //
init_data[231] = WRITE_TO_OPT_TOF_58; //
init_data[232] = {1'b1, 8'h83}; //
init_data[233] = {1'b1, 8'b0010_0110}; //sub_frame_cnt_max = 2 (10) 7:4 bit, quad_cnt_max = 6 (110) 3:0 bit
init_data[234] = {1'b1, 8'h00}; //
init_data[235] = {1'b1, 8'h00}; //
init_data[236] = WRITE_TO_OPT_TOF_5C; //
init_data[237] = {1'b1, 8'hb1}; //
init_data[238] = {1'b1, 8'b0000_0100}; // MOD_REF_INV = 0 (7-8th bits)
init_data[239] = {1'b1, 8'b0101_1110}; // fb_error_cnt_threshold = 10 (A) default (0000_1011) (18:11 bits)
init_data[240] = {1'b1, 8'b0010_1000}; // delay_fb_corr_mode = 1 delay_fb_dc_corr_mode = 1
init_data[241] = WRITE_TO_OPT_TOF_58; //
init_data[242] = {1'b1, 8'hbd}; // init_2 = 310 (1 0011 0110) 21:0 bit, init_4 = true (1) 22:22 bit
init_data[243] = {1'b1, 8'b0011_0110}; //
init_data[244] = {1'b1, 8'b0000_0001}; //
init_data[245] = {1'b1, 8'b0100_0000}; //
init_data[246] = WRITE_TO_OPT_TOF_58; //
init_data[247] = {1'b1, 8'hbe}; // init_3 = 330 (1 0100 1010) 21:0 bit
init_data[248] = {1'b1, 8'b0100_1010}; //
init_data[249] = {1'b1, 8'b0000_0001}; //
init_data[250] = {1'b1, 8'b0000_0000}; //
init_data[251] = WRITE_TO_OPT_TOF_58; //
init_data[252] = {1'b1, 8'hbf}; // init_5 = 3 (11) 23:22 bit
init_data[253] = {1'b1, 8'b0000_0000}; //
init_data[254] = {1'b1, 8'b0000_0000}; //
init_data[255] = {1'b1, 8'b1100_0000}; //
init_data[256] = WRITE_TO_OPT_TOF_58; //
init_data[257] = {1'b1, 8'h0e}; // sscg_modulation = 0 (0) 9:7 bit, sscg_period = 6 (110) 6:4 bit, sscg_en = true (1) 3:3 bit
init_data[258] = {1'b1, 8'b0110_1000}; //
init_data[259] = {1'b1, 8'b0000_0000}; //
init_data[260] = {1'b1, 8'b0000_0000}; //
init_data[261] = WRITE_TO_OPT_TOF_5C; //
init_data[262] = {1'b1, 8'h04}; //
init_data[263] = {1'b1, 8'h00}; // sin_f1_q0_coeff = 0 (0) 15:0 bit
init_data[264] = {1'b1, 8'h00}; //
init_data[265] = {1'b1, 8'h00}; //
init_data[266] = WRITE_TO_OPT_TOF_5C; //
init_data[267] = {1'b1, 8'h05}; //
init_data[268] = {1'b1, 8'hFF}; // sin_f1_q1_coeff = 32767 (7FFF) 15:0 bit
init_data[269] = {1'b1, 8'h7F}; //
init_data[270] = {1'b1, 8'h00}; //
init_data[271] = WRITE_TO_OPT_TOF_5C; //
init_data[272] = {1'b1, 8'h06}; //
init_data[273] = {1'b1, 8'h00}; // sin_f1_q2_coeff = 0 (0) 15:0 bit
init_data[274] = {1'b1, 8'h00}; //
init_data[275] = {1'b1, 8'h00}; //
init_data[276] = WRITE_TO_OPT_TOF_5C; //
init_data[277] = {1'b1, 8'h07}; //
init_data[278] = {1'b1, 8'h01}; // sin_f1_q3_coeff = -32767 (8001h) 15:0 bit
init_data[279] = {1'b1, 8'h80}; //
init_data[280] = {1'b1, 8'h00}; //
init_data[281] = WRITE_TO_OPT_TOF_5C; //
init_data[282] = {1'b1, 8'h08}; //
init_data[283] = {1'b1, 8'h00}; // sin_f1_q4_coeff = 0 (0) 15:0 bit
init_data[284] = {1'b1, 8'h00}; //
init_data[285] = {1'b1, 8'h00}; //
init_data[286] = WRITE_TO_OPT_TOF_5C; //
init_data[287] = {1'b1, 8'h09}; //
init_data[288] = {1'b1, 8'h00}; // sin_f1_q5_coeff = 0 (0) 15:0 bit
init_data[289] = {1'b1, 8'h00}; //
init_data[290] = {1'b1, 8'h00}; //
init_data[291] = WRITE_TO_OPT_TOF_5C; //
init_data[292] = {1'b1, 8'h0A}; //
init_data[293] = {1'b1, 8'hFF}; // cos_f1_q0_coeff = 32767 (7FFF) 15:0 bit
init_data[294] = {1'b1, 8'h7F}; //
init_data[295] = {1'b1, 8'h00}; //
init_data[296] = WRITE_TO_OPT_TOF_5C; //
init_data[297] = {1'b1, 8'h0B}; //
init_data[298] = {1'b1, 8'h00}; // cos_f1_q1_coeff = 0 (0) 15:0 bit
init_data[299] = {1'b1, 8'h00}; //
init_data[300] = {1'b1, 8'h00}; //
init_data[301] = WRITE_TO_OPT_TOF_5C; //
init_data[302] = {1'b1, 8'h0C}; //
init_data[303] = {1'b1, 8'h01}; // cos_f1_q2_coeff = -32767 (8001h) 15:0 bit
init_data[304] = {1'b1, 8'h80}; //
init_data[305] = {1'b1, 8'h00}; //
init_data[306] = WRITE_TO_OPT_TOF_5C; //
init_data[307] = {1'b1, 8'h0D}; //
init_data[308] = {1'b1, 8'h00}; // cos_f1_q3_coeff = 0 (0) 15:0 bit
init_data[309] = {1'b1, 8'h00}; //
init_data[310] = {1'b1, 8'h00}; //
init_data[311] = WRITE_TO_OPT_TOF_5C; //
init_data[312] = {1'b1, 8'h0E}; //
init_data[313] = {1'b1, 8'h00}; // cos_f1_q4_coeff = 0 (0) 15:0 bit
init_data[314] = {1'b1, 8'h00}; //
init_data[315] = {1'b1, 8'h00}; //
init_data[316] = WRITE_TO_OPT_TOF_5C; //
init_data[317] = {1'b1, 8'h0F}; //
init_data[318] = {1'b1, 8'h00}; // cos_f1_q5_coeff = 0 (0) 15:0 bit
init_data[319] = {1'b1, 8'h00}; //
init_data[320] = {1'b1, 8'h00}; //
init_data[321] = WRITE_TO_OPT_TOF_5C; //
init_data[322] = {1'b1, 8'h10}; //
init_data[323] = {1'b1, 8'h00}; // sin_f2_q0_coeff = 0 (0) 15:0 bit
init_data[324] = {1'b1, 8'h00}; //
init_data[325] = {1'b1, 8'h00}; //
init_data[326] = WRITE_TO_OPT_TOF_5C; //
init_data[327] = {1'b1, 8'h11}; //
init_data[328] = {1'b1, 8'hD9}; // sin_f2_q1_coeff = 28377 (6ED9) 15:0 bit
init_data[329] = {1'b1, 8'h6E}; //
init_data[330] = {1'b1, 8'h00}; //
init_data[331] = WRITE_TO_OPT_TOF_5C; //
init_data[332] = {1'b1, 8'h12}; //
init_data[333] = {1'b1, 8'h27}; // sin_f2_q2_coeff = -28377 (9127h) 15:0 bit
init_data[334] = {1'b1, 8'h91}; //
init_data[335] = {1'b1, 8'h00}; //
init_data[336] = WRITE_TO_OPT_TOF_5C; //
init_data[337] = {1'b1, 8'h13}; //
init_data[338] = {1'b1, 8'h00}; // sin_f2_q3_coeff = 0 (0) 15:0 bit
init_data[339] = {1'b1, 8'h00}; //
init_data[340] = {1'b1, 8'h00}; //
init_data[341] = WRITE_TO_OPT_TOF_5C; //
init_data[342] = {1'b1, 8'h14}; //
init_data[343] = {1'b1, 8'hD9}; // sin_f2_q4_coeff = 28377 (6ED9) 15:0 bit
init_data[344] = {1'b1, 8'h6E}; //
init_data[345] = {1'b1, 8'h00}; //
init_data[346] = WRITE_TO_OPT_TOF_5C; //
init_data[347] = {1'b1, 8'h15}; //
init_data[348] = {1'b1, 8'h27}; // sin_f2_q5_coeff = -28377 (9127h) 15:0 bit
init_data[349] = {1'b1, 8'h91}; //
init_data[350] = {1'b1, 8'h00}; //
init_data[351] = WRITE_TO_OPT_TOF_5C; //
init_data[352] = {1'b1, 8'h16}; //
init_data[353] = {1'b1, 8'hFF}; // cos_f2_q0_coeff = 32767 (7FFF) 15:0 bit
init_data[354] = {1'b1, 8'h7F}; //
init_data[355] = {1'b1, 8'h00}; //
init_data[356] = WRITE_TO_OPT_TOF_5C; //
init_data[357] = {1'b1, 8'h17}; //
init_data[358] = {1'b1, 8'h00}; // cos_f2_q1_coeff = -16384 (C000) 15:0 bit
init_data[359] = {1'b1, 8'hC0}; //
init_data[360] = {1'b1, 8'h00}; //
init_data[361] = WRITE_TO_OPT_TOF_5C; //
init_data[362] = {1'b1, 8'h18}; //
init_data[363] = {1'b1, 8'h00}; // cos_f2_q2_coeff = -16384 (C000) 15:0 bit
init_data[364] = {1'b1, 8'hC0}; //
init_data[365] = {1'b1, 8'h00}; //
init_data[366] = WRITE_TO_OPT_TOF_5C; //
init_data[367] = {1'b1, 8'h19}; //
init_data[368] = {1'b1, 8'hFF}; // cos_f2_q3_coeff = 32767 (7FFF) 15:0 bit
init_data[369] = {1'b1, 8'h7F}; //
init_data[370] = {1'b1, 8'h00}; //
init_data[371] = WRITE_TO_OPT_TOF_5C; //
init_data[372] = {1'b1, 8'h1A}; //
init_data[373] = {1'b1, 8'h00}; // cos_f2_q4_coeff = -16384 (C000) 15:0 bit
init_data[374] = {1'b1, 8'hC0}; //
init_data[375] = {1'b1, 8'h00}; //
init_data[376] = WRITE_TO_OPT_TOF_5C; //
init_data[377] = {1'b1, 8'h1B}; //
init_data[378] = {1'b1, 8'h00}; // cos_f2_q5_coeff = -16384 (C000) 15:0 bit
init_data[379] = {1'b1, 8'hC0}; //
init_data[380] = {1'b1, 8'h00}; //
init_data[381] = WRITE_TO_OPT_TOF_5C; //
init_data[382] = {1'b1, 8'h1F}; //
init_data[383] = {1'b1, 8'b0010_0001}; //
init_data[384] = {1'b1, 8'b0100_0011}; //
init_data[385] = {1'b1, 8'b0000_0101}; // IQ_SCALE = 0 (0) 22:20 bit
init_data[386] = WRITE_TO_OPT_TOF_5C; //
init_data[387] = {1'b1, 8'hB3}; //
init_data[388] = {1'b1, 8'h00}; // DELAY_FB_COEFF = 2560 (A00) 11:00 bit
init_data[389] = {1'b1, 8'h0A}; //
init_data[390] = {1'b1, 8'h00}; //
init_data[391] = WRITE_TO_OPT_TOF_5C; //
init_data[392] = {1'b1, 8'h80}; //
init_data[393] = {1'b1, 8'h00}; // PHASE_LIN_CORR_PERIOD = 0 (0) 3:2 bit, PHASE_LIN_CORR_EN = 0 (0) 0:0 bit
init_data[394] = {1'b1, 8'h00}; //
init_data[395] = {1'b1, 8'h00}; //
init_data[396] = WRITE_TO_OPT_TOF_5C; //
init_data[397] = {1'b1, 8'h81}; //
init_data[398] = {1'b1, 8'h00}; // PHASE_LIN_COEFF0_0 = 0 (0) 11:0 bit
init_data[399] = {1'b1, 8'h00}; // PHASE_LIN_COEFF0_1 = 0 (0) 23:12 bit
init_data[400] = {1'b1, 8'h00}; //
init_data[401] = WRITE_TO_OPT_TOF_5C; //
init_data[402] = {1'b1, 8'h82}; //
init_data[403] = {1'b1, 8'h00}; // PHASE_LIN_COEFF0_2 = 0 (0) 11:0 bit
init_data[404] = {1'b1, 8'h00}; // PHASE_LIN_COEFF0_3 = 0 (0) 23:12 bit
init_data[405] = {1'b1, 8'h00}; //
init_data[406] = WRITE_TO_OPT_TOF_5C; //
init_data[407] = {1'b1, 8'h83}; //
init_data[408] = {1'b1, 8'h00}; // PHASE_LIN_COEFF0_4 = 0 (0) 11:0 bit
init_data[409] = {1'b1, 8'h00}; // PHASE_LIN_COEFF0_5 = 0 (0) 23:12 bit
init_data[410] = {1'b1, 8'h00}; //
init_data[411] = WRITE_TO_OPT_TOF_5C; //
init_data[412] = {1'b1, 8'h84}; //
init_data[413] = {1'b1, 8'h00}; // PHASE_LIN_COEFF0_6 = 0 (0) 11:0 bit
init_data[414] = {1'b1, 8'h00}; // PHASE_LIN_COEFF0_7 = 0 (0) 23:12 bit
init_data[415] = {1'b1, 8'h00}; //
init_data[416] = WRITE_TO_OPT_TOF_5C; //
init_data[417] = {1'b1, 8'h85}; //
init_data[418] = {1'b1, 8'h00}; // PHASE_LIN_COEFF0_8 = 0 (0) 11:0 bit
init_data[419] = {1'b1, 8'h00}; // PHASE_LIN_COEFF0_9 = 0 (0) 23:12 bit
init_data[420] = {1'b1, 8'h00}; //
init_data[421] = WRITE_TO_OPT_TOF_5C; //
init_data[422] = {1'b1, 8'h86}; //
init_data[423] = {1'b1, 8'h00}; // PHASE_LIN_COEFF0_10 = 0 (0) 11:0 bit
init_data[424] = {1'b1, 8'h00}; // PHASE_LIN_COEFF0_11 = 0 (0) 23:12 bit
init_data[425] = {1'b1, 8'h00}; //
init_data[426] = WRITE_TO_OPT_TOF_5C; //
init_data[427] = {1'b1, 8'h87}; //
init_data[428] = {1'b1, 8'h00}; // PHASE_LIN_COEFF0_12 = 0 (0) 11:0 bit
init_data[429] = {1'b1, 8'h00}; // PHASE_LIN_COEFF0_13 = 0 (0) 23:12 bit
init_data[430] = {1'b1, 8'h00}; //
init_data[431] = WRITE_TO_OPT_TOF_5C; //
init_data[432] = {1'b1, 8'h88}; //
init_data[433] = {1'b1, 8'h00}; // PHASE_LIN_COEFF0_14 = 0 (0) 11:0 bit
init_data[434] = {1'b1, 8'h00}; // PHASE_LIN_COEFF0_15 = 0 (0) 23:12 bit
init_data[435] = {1'b1, 8'h00}; //
init_data[436] = WRITE_TO_OPT_TOF_5C; //
init_data[437] = {1'b1, 8'h91}; //
init_data[438] = {1'b1, 8'h00}; // PHASE_LIN_COEFF1_0 = 0 (0) 11:0 bit
init_data[439] = {1'b1, 8'h00}; // PHASE_LIN_COEFF1_1 = 0 (0) 23:12 bit
init_data[440] = {1'b1, 8'h00}; //
init_data[441] = WRITE_TO_OPT_TOF_5C; //
init_data[442] = {1'b1, 8'h92}; //
init_data[443] = {1'b1, 8'h00}; // PHASE_LIN_COEFF1_2 = 0 (0) 11:0 bit
init_data[444] = {1'b1, 8'h00}; // PHASE_LIN_COEFF1_3 = 0 (0) 23:12 bit
init_data[445] = {1'b1, 8'h00}; //
init_data[446] = WRITE_TO_OPT_TOF_5C; //
init_data[447] = {1'b1, 8'h93}; //
init_data[448] = {1'b1, 8'h00}; // PHASE_LIN_COEFF1_4 = 0 (0) 11:0 bit
init_data[449] = {1'b1, 8'h00}; // PHASE_LIN_COEFF1_5 = 0 (0) 23:12 bit
init_data[450] = {1'b1, 8'h00}; //
init_data[451] = WRITE_TO_OPT_TOF_5C; //
init_data[452] = {1'b1, 8'h94}; //
init_data[453] = {1'b1, 8'h00}; // PHASE_LIN_COEFF1_6 = 0 (0) 11:0 bit
init_data[454] = {1'b1, 8'h00}; // PHASE_LIN_COEFF1_7 = 0 (0) 23:12 bit
init_data[455] = {1'b1, 8'h00}; //
init_data[456] = WRITE_TO_OPT_TOF_5C; //
init_data[457] = {1'b1, 8'h95}; //
init_data[458] = {1'b1, 8'h00}; // PHASE_LIN_COEFF1_8 = 0 (0) 11:0 bit
init_data[459] = {1'b1, 8'h00}; // PHASE_LIN_COEFF1_9 = 0 (0) 23:12 bit
init_data[460] = {1'b1, 8'h00}; //
init_data[461] = WRITE_TO_OPT_TOF_5C; //
init_data[462] = {1'b1, 8'h96}; //
init_data[463] = {1'b1, 8'h00}; // PHASE_LIN_COEFF1_10 = 0 (0) 11:0 bit
init_data[464] = {1'b1, 8'h00}; // PHASE_LIN_COEFF1_11 = 0 (0) 23:12 bit
init_data[465] = {1'b1, 8'h00}; //
init_data[466] = WRITE_TO_OPT_TOF_5C; //
init_data[467] = {1'b1, 8'h97}; //
init_data[468] = {1'b1, 8'h00}; // PHASE_LIN_COEFF1_12 = 0 (0) 11:0 bit
init_data[469] = {1'b1, 8'h00}; // PHASE_LIN_COEFF1_13 = 0 (0) 23:12 bit
init_data[470] = {1'b1, 8'h00}; //
init_data[471] = WRITE_TO_OPT_TOF_5C; //
init_data[472] = {1'b1, 8'h98}; //
init_data[473] = {1'b1, 8'h00}; // PHASE_LIN_COEFF1_14 = 0 (0) 11:0 bit
init_data[474] = {1'b1, 8'h00}; // PHASE_LIN_COEFF1_15 = 0 (0) 23:12 bit
init_data[475] = {1'b1, 8'h00}; //
init_data[476] = WRITE_TO_OPT_TOF_58; //
init_data[477] = {1'b1, 8'h81}; //
init_data[478] = {1'b1, 8'b1010_0000}; // SLAVE_MODE = 0 (0) 0:0 bit
init_data[479] = {1'b1, 8'b0000_0000}; // SYNC_MODE = 0 (0) 12:12 bit
init_data[480] = {1'b1, 8'b0000_0000}; //
init_data[481] = WRITE_TO_OPT_TOF_5C; //
init_data[482] = {1'b1, 8'h33}; //
init_data[483] = {1'b1, 8'b0011_0000}; //
init_data[484] = {1'b1, 8'b0000_0000}; //
init_data[485] = {1'b1, 8'b0000_0000}; // SYSCLK_IN_FREQ = 0 (0) 23:16 bit
init_data[486] = WRITE_TO_OPT_TOF_58; //
init_data[487] = {1'b1, 8'h12}; //
init_data[488] = {1'b1, 8'b0000_0000}; // QUAD_HOP_EN = false (0) 7:7 bit
init_data[489] = {1'b1, 8'b0000_0000}; // QUAD_HOP_OFFSET_F1 = 0 (0) 10:8 bit, QUAD_HOP_OFFSET_F2 = 0 (0) 13:11 bit
init_data[490] = {1'b1, 8'b0000_0000}; //
init_data[491] = WRITE_TO_OPT_TOF_5C; //
init_data[492] = {1'b1, 8'h62}; //
init_data[493] = {1'b1, 8'h39}; // TILLUM = 57 (39h) 7:0 bit
init_data[494] = {1'b1, 8'h00}; //
init_data[495] = {1'b1, 8'h00}; //
init_data[496] = WRITE_TO_OPT_TOF_5C; //
init_data[497] = {1'b1, 8'h63}; // ?????
init_data[498] = {1'b1, 8'b0000_1111}; // DDR_CONTROLLER_FLAG = true (1) 0:0 bit, DDR_CALIBRATION_FLAG = true (1) 1:1 bit, LVDS_PLL_LOCK = true (1) 2:2 bit, MASTER_PLL_LOCK = true (1) 3:3 bit
init_data[499] = {1'b1, 8'b0000_0000}; //
init_data[500] = {1'b1, 8'b0000_0000}; // OP_OVERFLOW = false (0) 20:20 bit, OP_UNDERFLOW = 0 (0) 21:21 bit, PIX_CNT_MAX_SET_FAILED = false (0) 22:22 bit, INTG_DUTY_CYCLE_SET_FAILED = false (0) 23:23 bit
init_data[501] = WRITE_TO_OPT_TOF_5C; //
init_data[502] = {1'b1, 8'h61}; //
init_data[503] = {1'b1, 8'h36}; // TSENSOR = 54 (36h) 7:0 bit
init_data[504] = {1'b1, 8'h00}; //
init_data[505] = {1'b1, 8'h00}; //
init_data[506] = WRITE_TO_OPT_TOF_5C; //
init_data[507] = {1'b1, 8'h51}; //
init_data[508] = {1'b1, 8'h00}; // TILLUM_CALIB = 0 (0) 7:0 bit
init_data[509] = {1'b1, 8'h00}; // TSENSOR_CALIB = 0 (0) 8:15 bit
init_data[510] = {1'b1, 8'b0001_0100}; // DISABLE_OFFSET_CORR = 0 (0) 16:16 bit, DISABLE_TEMP_CORR = 0 (0) 17:17 bit, CALIB_PREC = true (1) 20:20 bit
init_data[511] = WRITE_TO_OPT_TOF_5C; //
init_data[512] = {1'b1, 8'h40}; //
init_data[513] = {1'b1, 8'b0101_0101}; // HD_POL = true (1) 2:2 bit, VD_POL = true (1) 6:6 bit,
init_data[514] = {1'b1, 8'b0100_0100}; // PHASE_AUX_EN = false (0) 8:8 bit, PHASE_AUX_POL = true (1) 10:10 bit, OP_CS_POL = true (1) 14:14 bit
init_data[515] = {1'b1, 8'b0000_0101}; // FE_POL = true (1) 18:18 bit, FE_LAST_CYCLE = false (0) 20:20 bit
init_data[516] = WRITE_TO_OPT_TOF_5C; //
init_data[517] = {1'b1, 8'h2e}; //
init_data[518] = {1'b1, 8'b0000_0000}; // TILLUM_SLV_ADDR = 0 (0) 6:0 bit
init_data[519] = {1'b1, 8'b0000_1000}; //
init_data[520] = {1'b1, 8'b0000_0000}; //
init_data[521] = WRITE_TO_OPT_TOF_5C; //
init_data[522] = {1'b1, 8'h36}; //
init_data[523] = {1'b1, 8'b0000_0001}; // AMPLITUDE_THRESHOLD = 1 (1) 11:0 bit
init_data[524] = {1'b1, 8'b0000_0000}; // SATURATION_THRESHOLD = 0 (0) 23:12 bit
init_data[525] = {1'b1, 8'b0000_0000}; //
init_data[526] = WRITE_TO_OPT_TOF_5C; //
init_data[527] = {1'b1, 8'hb0}; //
init_data[528] = {1'b1, 8'h64}; // SENSOR_OVTEMP_THRESH = 100 (64h) 7:0 bit
init_data[529] = {1'b1, 8'h5A}; // ILLUM_OVTEMP_THRESH = 90 (5A) 15:8 bit
init_data[530] = {1'b1, 8'h00}; //
init_data[531] = WRITE_TO_OPT_TOF_5C; //
init_data[532] = {1'b1, 8'h27}; //
init_data[533] = {1'b1, 8'b0000_0000}; //
init_data[534] = {1'b1, 8'b0010_0000}; // PIXEL_DATA_SIZE = 4 (100) 14:11 bit
init_data[535] = {1'b1, 8'b0000_0000}; //
init_data[536] = WRITE_TO_OPT_TOF_5C; //
init_data[537] = {1'b1, 8'haf}; //
init_data[538] = {1'b1, 8'b0000_0000}; // DDR_CONTROLLER_INTR_DIS = false (0) 1:1 bit, DDR_CALIBRATION_INTR_DIS = false (0) 2:2 bit, LVDS_PLL_LOCK_INTR_DIS = false (0) 3:3 bit, MASTER_PLL_LOCK_INTR_DIS = false (0) 4:4 dis
init_data[539] = {1'b1, 8'b0000_0000}; //
init_data[540] = {1'b1, 8'b0000_0000}; // SENSOR_OVTEMP_INTR_DIS = false (0) 18:18 bit, ILLUM_OVTEMP_INTR_DIS = false (0) 19:19 bit, OP_OVERFLOW_INTR_DIS = false (0) 20:20 bit, OP_UNDERFLOW_INTR_DIS = false (0) 21:21 bit
init_data[541] = WRITE_TO_OPT_TOF_5C; //
init_data[542] = {1'b1, 8'h65}; //
init_data[543] = {1'b1, 8'h00}; //
init_data[544] = {1'b1, 8'h00}; // ILLUM_FB_ERROR_CNT = 0 (0) 23:12 bit
init_data[545] = {1'b1, 8'h00}; //
init_data[546] = WRITE_TO_OPT_TOF_5C; //
init_data[547] = {1'b1, 8'h66}; //
init_data[548] = {1'b1, 8'h00}; //
init_data[549] = {1'b1, 8'h00}; // COMP_FB_ERROR_CNT = 0 (0) 23:12 bit
init_data[550] = {1'b1, 8'h00}; //
init_data[551] = WRITE_TO_OPT_TOF_5C; //
init_data[552] = {1'b1, 8'h47}; //
init_data[553] = {1'b1, 8'h00}; // COEFF_ILLUM = 0 (0) 11:0 bit
init_data[554] = {1'b1, 8'h00}; //
init_data[555] = {1'b1, 8'h00}; //
init_data[556] = WRITE_TO_OPT_TOF_5C; //
init_data[557] = {1'b1, 8'h29}; //phy_test
init_data[558] = {1'b1, 8'b0000_0000}; // PHY_TEST_ENABLE = false (0) 1:1 bit, IND_FREQ_DATA_SEL = 0 (0) 3:3 bit
init_data[559] = {1'b1, 8'b0100_0000}; //
init_data[560] = {1'b1, 8'b0011_0000}; //
init_data[561] = WRITE_TO_OPT_TOF_5C; //
init_data[562] = {1'b1, 8'h3e}; ///
init_data[563] = {1'b1, 8'b1111_0000}; // VD_ACTIVE = 15 4:23bits
init_data[564] = {1'b1, 8'b0000_0000}; //
init_data[565] = {1'b1, 8'b0000_0000}; //
init_data[566] = WRITE_TO_OPT_TOF_5C; //
init_data[567] = {1'b1, 8'hb0}; ///
init_data[568] = {1'b1, 8'b0110_0100}; // sensor_ovtemp_thresh = 100 (01100100) 7:0 bit
init_data[569] = {1'b1, 8'b0101_1010}; // illum_ovtemp_thresh = 90 (01011010) 15:8 bit
init_data[570] = {1'b1, 8'b0000_0000}; //
init_data[571] = WRITE_TO_OPT_TOF_58; //
init_data[572] = {1'b1, 8'h80}; // tg_dis = 0
init_data[573] = {1'b1, 8'h00}; //
init_data[574] = {1'b1, 8'h00}; //
init_data[575] = {1'b1, 8'h00}; //
init_data[576] = WRITE_TO_OPT_TOF_58; //
init_data[577] = {1'b1, 8'h02}; // mod_pll_update = 1
init_data[578] = {1'b1, 8'h1C}; // was init_data[248] = {1'b1, 8'h1C};
init_data[579] = {1'b1, 8'h00}; //
init_data[580] = {1'b1, 8'h00}; //
init_data[581] = PAUSE;
init_data[582] = PAUSE;
init_data[583] = PAUSE;
init_data[584] = WRITE_TO_OPT_TOF_58; //
init_data[585] = {1'b1, 8'h02}; /// mod_pll_update = 0
init_data[586] = {1'b1, 8'h18}; // was init_data[254] = {1'b1, 8'h18};
init_data[587] = {1'b1, 8'h00}; //
init_data[588] = {1'b1, 8'h00}; //
/* some code */