UART RX interrupt

Hi Wojciech, 

Few things to check:

For the M0 to recognize the UART interrupt, the corresponding interrupt needs to be enabled within the M0. By default, our reference firmware enables this interrupt.

Are there other interrupts being generated and processed in the device?

Frequency of operation of the M0.  If there are other interrupt sources enabled and processed, depending on the frequency of operation of M0, the M0 may not have bandwidth to process all interrupt sources.

As I mentioned my program is based on TI RTD sensor. The board is connected to the PGA900EVM board for programming and debugging according to table 3 of the TIDUB84 document.

Here are functions which are related to the UART:

in 'void main(void)'

M0_ConfigClock(CLK_4MHZ);                  // I tried CLK_1MHZ as well

UART_Reset_Init();

UART_Config(0x00,12);                             // calling UART_PIN_MUX_SELECT() and setting the baud rate

UART_ENABLE();

UART_RX_INT_ENABLE();                        // UART_INTERRUPT_ENABLE is equal to 0x01

I am assuming that all these functions are setting the M0 processor.

other interrupts enabled:

ADC_Config(ADC_CFG_1_ADC_ENABLE);                                                                                       // ADC is enabled

SYST_Config(SYSTICK_RELOAD_CNT, ST_CLKSOURCE | ST_TICKINT | ST_ENABLE);     // to enable the timer (SYST_Handler is triggered every 50 msec) 

UART interrupt handler:

interrupt void UART_Handler(void)

{

      TestRxChars++; // received characters counter

     if(UART_INTERRUPT_STATUS & UART_RXRDY_I)

     {

            UART_INTERRUPT_STATUS |= 0x01;

            UART_RxBuf[0] = UART_RX_BUF;

            UART_Line_Status = UART_LINE_STATUS;

     }

}

The TestRxChars value remains always 0, so the RX interrupt was never triggered.

When the character is received the RX_READY bit of UART_LINE_STATUS is changed to 1 and the UART_RXRDY_I bit of UART_INTERRUPT_STATUS is also changed to 1 – the character is received.

The UART_INTERRUPT_STATUS |= 0x01; instruction is correctly resetting the RX interrupt.

The UART setting is OK, as the data is correctly received by the PC and I can read each character in the main loop after detecting the change of UART_LINE_STATUS or UART_INTERRUPT_STATUS register.

I noticed another strange thing. Even as the UART_TXCOMPLETE_INT_EN bit of UART_INTERRUPT_ENABLE register is not set the UART_TXCOMPLETE_I bit of UART_INTERRUPT_STATUS is set after each character send.

In the pga900_isr.c file, did you adjust the NVIC_ENABLE0 = 0x02; value? 0x02 only enables the TADC interrupt. If you also want the UART interrupt that should be adjusted to 0x12. 

For your other question, the UART_TXCOMPLETE_I bit is a status bit and gets set independent of the UART_TXCOMPLETE_INT_EN bit. The UART_TXCOMPLETE_INT_EN bit only enables generation of interrupt.

Thank You.

After the change You suggested the UART interrupt is working. The register NVIC_ENABLE0 is not documented.
Additionally the register name is changed: NVIC_ENABLE0 is really ISER on the Cortex_M0 processor (same address).

On page 77 of PGA900 datasheet there is a reference to 'RM_M0_User_guide.pdf' from www.arm.com.
This document does not exist any more. I downloaded two other manuals: Cortex_M0 Generic User Manual and Technical Reference Manual.
In both documents the register ISER is listed without any details (like bits description).

Thank's for clarifications about the UART_TXCOMPLETE_I.