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Part Number: AWR1642
Tool/software: TI C/C++ Compiler
In the sdk, I see the QSPIFlash_sectorEarse() function
//write the write enable;
//write the earse cmd;
//write the address;
split the sector earse request to 2 parts(cmd and address)
the question is:
1. the CS go high after writing cmd,how can the address be writen into the flash? The flash datesheet says,the cmd is followed by address in a CS enable.
2. the frameLen parameter of QSPIFlash_chipEarse() function is 0, but in the QSPI_cfgWrite(), the SPI CMD_REG[11:0] is writen with (numWords-1),a unsigned int data 0 substract 1?
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1. As per one of the datasheet, it says command will be transferred first then address. (section 4.2 & 4.2.1) and SDK driver follows the same flow.
2. Section 9 of this same datasheet explains about commands explains that for chip erase there is only 1 byte (instruction), so driver sends only command which doesn't follow any address in contrast to sectorErase/BlockErase. Go over the table 9.1 for these functionality to get more info about no. of bytes. In the SDK driver calling an QSPI_cfgWrite() with 0 means, it sends only cmd (instruction) whereas for SectorErase it sends total 4 bytes.
Are you facing any error/issue with current implementation of this QSPI driver.
In reply to Jitendra Gupta:
In reply to user1607004:
I have only one issue. This is a mistake to write 0xFFF to the bit11~0 of the spi register if someone need to erase the whole chip.
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