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IWR1443: CLK measurement

Prodigy 125 points

Replies: 5

Views: 72

Part Number: IWR1443

Hi 

In order to check our custom produced IWR1443 boards we measured the clk on clkm, clkp and OSC_CLKOUT pin. The clkp and clkm signal look good to us, but we can not receive any signal from the OSC_CLKOUT pin (A14). Do we need to enable this port by software or is it not functional at all? We use Silicon 3.0.

Best, Marcel

  • Hello,

        Typically,  OSC_CLKOUT is used for the Cascading configuration in AWR1243, where in master device would provide the clock to slave device on the OSC_CLKOUT pin.  Were you able to get the radar operational? i.e. Running out of box demo on the custom hardware?

    Specifically, if you want to look at the clock then, In this case you may want to enable MCU_CLKOUT  by issuing below API. 

    Thanks and regards,

    CHETHAN KUMAR Y.B.

  • In reply to CHETHAN KUMAR Y.B.:

    Hi

    Yes we got the device fully functional including flashing, jtag, uart spi and out of box demo. We wanted to use the A14 Pin to measure the clock conveniently with a connector and see that it is very close to 40MHz indeed and otherwise adapt the applied capacitors.

    Ok I understand that we could use the MCU Clk pin, but this Pin is very badly located on the device..

    Are you sure that it is not possible to output the clk on this A14 Pin? Because on the "Figure 6-2. Clock Subsystem" in the device datasheet it shows quite clear that the CLK should be available there.

    Thanks, Marcel
  • In reply to Marcel Friesch:

    Hello,

        Thanks for the confirmation, and glad to hear custom board is working well. 

    40MHz Clock is available on the OSC_CLKOUT pin, To get this we need to issue Multi-chip master API shown below from the Radar Interface control document.

    From application point of view this is used in cascade configuration.  

    Thanks and regards,

    CHETHAN KUMAR Y.B.

  • In reply to CHETHAN KUMAR Y.B.:

    Hi Chethan

    Thank you for advising on how to enable the clk output.

    I am uncertain though, whether it is possible to bring an IWR1443 device into Multichip Master mode, since from the screenshots you posted is says clearly that only xx1243 devices can do so?

    Would be nice to get a confirmation on this.

    We also need the Sync in and Sync out features to trigger frames externally, does this work with IWr1443? And can you give us some Code examples for this?

    Thank you very much.

    Marcel

  • In reply to Marcel Friesch:

    Hello,

        Multi-chip master API is supported on 1243 device family only.

    Sync_in signal is used for hardware triggering.

    Please refer below documentation from Radar interface control document:

    Frame trigger API need to select hardware trigger option instead of software trigger option. 

    On the SYNC_IN pin you need to follow below timing diagram requirement as specified in the datasheet shown below .

     

    With is option Radar frame trigger would be based on the timings of Sync_in signal. This is supported in IWR1443 device family. 

    For the Sync_out signal it's used typically in Cascaded application scenario in AWR1243 device families.

    For that you need to issue muti-master API then master device sends out Sync_out signal to Slave at frame boundary.

    This may not be applicable for IWR1443 device as cascade feature is not supported. 

    Thanks and regards,

    CHETHAN KUMAR Y.B.