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Compiler/AWR1642: about Flash Earse with QSPI

AlbertYip
Prodigy 190 points
Part Number: AWR1642

Tool/software: TI C/C++ Compiler

In the sdk, I see the QSPIFlash_sectorEarse() function

   //write the write enable;

  //write the earse cmd;

  //write the address;

split the sector earse request to 2 parts(cmd and address)

the question is:

1. the CS go high after writing cmd,how can the address be writen into the flash? The flash datesheet says,the cmd is followed by address in a CS enable.

2. the frameLen parameter of QSPIFlash_chipEarse() function is 0, but in the QSPI_cfgWrite(), the SPI CMD_REG[11:0] is writen with (numWords-1),a unsigned int data 0 substract 1?

  • 0
    TI__Guru 68160 points
    Hi,
    Let me check this at my end and get back to you.

    Regards,
    Jitendra
  • 0
    TI__Guru 68160 points

    Hi,

    1. As per one of the datasheet, it says command will be transferred first then address. (section 4.2  & 4.2.1) and SDK driver follows the same flow.

    2. Section 9 of this same datasheet explains about commands explains that for chip erase there is only 1 byte (instruction), so driver sends only command which doesn't follow any address in contrast to sectorErase/BlockErase. Go over the table 9.1 for these functionality to get more info about no. of bytes. In the SDK driver calling an QSPI_cfgWrite() with 0 means, it sends only cmd (instruction) whereas for SectorErase  it sends total 4 bytes.

    Are you facing any error/issue with current implementation of this QSPI driver.

    Regards,

    Jitendra

  • 0 in reply to Jitendra Gupta
    Prodigy 190 points
    I understand your mean,but i have checked the sdk code again, when the code calls the QSPIFlash_chipErase() function, it give a enter parameter 0:
    QSPIFlash_chipErase(0);
    then the QSPIFlash_chipErase call the QSPI_cfgWrite(0), in the QSPI_cfgWrite function,the '0 - 1'(numWords) give to the bit[11:0] of CMD_REG.
    in my opinion, call the QSPIFlash_chipErase,the parameter should be 1.
    How do you think?
  • 0 in reply to AlbertYip
    TI__Guru 68160 points
    To erase whole chip no. of words doesn't matter, so giving '0-1' is don't care.

    May I know what are you planning to do with QSPI driver and is it causing any issue to you?

    Regards,
    Jitendra
  • 0 in reply to Jitendra Gupta
    Prodigy 190 points
    the result of "unsigned int 0 - 1" is 65535, then the value is given the spi register, so whether the QSPI will send 65535 bytes or not?
    I don't use the chip erase command, just ask about the parameter of chip erase command
    thank you for replying
  • 0 in reply to AlbertYip
    TI__Guru 68160 points
    In this case SPI_CMD will be set to max value for frame length, so chip erase cmd will contain frame length 0xFFF for ptrQSPIRegs->SPI_CMD[11:0].


    Regards,
    Jitendra
  • 0 in reply to Jitendra Gupta
    Prodigy 190 points
    yes, i agree with you, but in my opinion, it should not to send frame length 0xFFF, the chip erase command should be sent as a 4 bytes commnd(8 bits command and 24 bits address),how do you think?
  • 0 in reply to AlbertYip
    TI__Guru 68160 points
    Hi,
    For whole Chip erase it doesn't require address, just chip erase command should be enough. That is what qspi driver does in the SDK.
    I recommend you to go over the driver source code and understand how it sends command/data to sFlash via qspi registers.

    Are you facing any issue with the existing driver else we can close this thread.

    Thanks,
    Jitendra
  • 0 in reply to Jitendra Gupta
    Prodigy 190 points

    thank you!

    I have only one issue. This is a mistake to write 0xFFF to the bit11~0 of the spi register if someone need to erase the whole chip.