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AWR1843: Question on AR_PMIC_CLKOUT_SOP2 & PMIC_CLK usages.

Part Number: AWR1843
Other Parts Discussed in Thread: LP87702-Q1,

Hi,

The reference design has the signal, AR_PMIC_CLKOUT_SOP2 pulled down for "FUNC" mode and could be connected to the PMIC_CLK (to the LP87702-Q1's CLKIN) via R97, but this function, "PMIC_CLK' is disabled on the EVM. 

Please let us know  
1) If this feature has been tested on the EVM?
2) Currently, we enable this function on our board because we have only 1 pull down resistor instead of 2 as the EVM, any special notes/steps we need to have in terms of controlling this signal and other associated signals with this function between AWR1843 and LP87702-Q1 for proper operations during power-up and normal modes?
Kind regards,
Long
  • Hello Long,

    Yes we have tested the PMIC CLKOUT option. You need to configure and enable the PMIC CLKOUT  in your 1843 application.

    If you are using the functional mode the SOP2 signal will have a weak pull down (10K resister or so). Before the pull down resister this signal can be tapped to connect to the PMIC CLKIN pin. Below is the image depicting the connection.

    Could you let us know why you intend to use the PMIC CLKOUT for the LP8770?

    Regards,

    Vivek

  • Hi Vivek,

    Thank you for your response. Our boards was done before my time. Now, I'm supporting, updating, and creating additional derivatives.

    In that case, please let us know what this feature (PMIC CLKOUT for the LP8770 or for AWR1843) was designed for - the usage cases. Is it for safety critical, redundancy, ...? So, we can properly determine if we need/should use this feature.

    Also, if we only has 1 pull down, 10K resistor for both SOP mode and PMIC_CLK connect to PMIC CLK_IN (so the WD feature is enable)

    1) would that work for both modes: programing and normal operations for both the AWR and the PMIC.

    2) If we have the above connections, but have not configured and enabled the PMIC CLKOUT  in your 1843 application/firmware - is it a good/bad idea?

    Kind regards,

    Long  

  • Hello Long,

    Please find my reply below.

    >>In that case, please let us know what this feature (PMIC CLKOUT for the LP8770 or for AWR1843) was designed for - the usage cases. Is it for safety >>critical, redundancy, ...? So, we can properly determine if we need/should use this feature.

    This feature is useful only if for some reason you want to the PMIC clock to be well synchronized with the Awr clock. Also this feature can be used to dither the PMIC clock since the PMIC CLKOUT signal from the AWR device allows modulation on this clock.

    >>Also, if we only has 1 pull down, 10K resistor for both SOP mode and PMIC_CLK connect to PMIC CLK_IN (so the WD feature is enable)

    >>1) would that work for both modes: programing and normal operations for both the AWR and the PMIC.

    For programming mode you would anyway have to disable the WD of the PMIC. Else it will time out and reset the AWR device. 

    >>2) If we have the above connections, but have not configured and enabled the PMIC CLKOUT  in your 1843 application/firmware - is it a good/bad idea?

    If you don't want to use the PMIC CLKOUT option you don't have to connect this signal to the CLK IN pin of the PMIC.

    regards,

    Vivek