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Part Number: SN74TVC3306
I have one question about SN74TVC3306 may need your help.
Can it be used for 0.6V->3.3V voltage level translation? In datasheet, if setting VREF=0V, the voltage can be as low to 0.6V, but no margin left.
You may use the SN74TVC3306 device for level translation.
In the application circuit you can see that the Vddref 3.3V will begin to bias the gate the FET until the FET turns on with Vgs >~0.6 V. Once the FET turns on it will begin to pass the signal to from the drain to the source until 0.6V becomes Vref +0.6.
Once the gate of the FET is biased at 0.6V the clamp voltage for the signal path becomes Vref or 0V. With the clamp voltage at 0V you can place 0.6V on the source of the FET and then the pull up voltage on the drain will pull up the node to 3.3 V.
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