Part Number: SN74LVC1G3157
I am using SN74LVC1G3157 with Vcc = 3.3V Page 3 of the datasheet recommends that the maximum of dt/dv = 10ns/V
However, I2C signal's falling time could be as long as 300ns, far exceeding the recommended maximum of dt/dv =10ns/V. The input signal slew rates matter for clocked flip flops or latches.
My questions are: (1) Is "the maximum of dt/dv =10ns/V" a hard requirement? (2) What happens if my inputs do not meet this requirement of " the maximum of dt/dv =10ns/V"?
Δt/Δv applies only to digital inputs, i.e., only to the S pin of this device.
The A/B1/B2 pins can handle analog signals with any voltage at any speed.
(For I²C, consider using a two-channel device like the TS3A5223.)
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In reply to Clemens Ladisch:
The dv/dt spec represents the rate of change of the input voltage waveform during a logic transition (low-to-high or high-to-low).To avoid output-waveform abnormalities, input voltage transitions should be within the range set forth in the recommended operating conditions. (10ns/V for SN74LVC1G3157).
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